From: Huacai Chen <chenhuacai@gmail.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Huacai Chen <chenhuacai@loongson.cn>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>,
Arnd Bergmann <arnd@arndb.de>, Waiman Long <longman@redhat.com>,
Boqun Feng <boqun.feng@gmail.com>, Guo Ren <guoren@kernel.org>,
Linux-Arch <linux-arch@vger.kernel.org>,
Rui Wang <wangrui@loongson.cn>,
Xuefeng Li <lixuefeng@loongson.cn>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH RFC 1/2] arch: Introduce ARCH_HAS_HW_XCHG_SMALL
Date: Mon, 26 Jul 2021 16:56:49 +0800 [thread overview]
Message-ID: <CAAhV-H4aNr2BuG1imx6RcfEQtarjbrUU+-_PbGRg4jX5ygr_iA@mail.gmail.com> (raw)
In-Reply-To: <CAMuHMdU8o2r0Tybz_z3hKLoMyNqL5A_RZ9DnCYR0pHeRMpgvWA@mail.gmail.com>
Hi, Geert,
On Mon, Jul 26, 2021 at 4:36 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Huacai,
>
> On Sat, Jul 24, 2021 at 2:36 PM Huacai Chen <chenhuacai@loongson.cn> wrote:
> > Introduce a new Kconfig option ARCH_HAS_HW_XCHG_SMALL, which means arch
> > has hardware sub-word xchg/cmpxchg support. This option will be used as
> > an indicator to select the bit-field definition in the qspinlock data
> > structure.
> >
> > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>
> Thanks for your patch!
>
> > --- a/arch/Kconfig
> > +++ b/arch/Kconfig
> > @@ -228,6 +228,10 @@ config ARCH_HAS_FORTIFY_SOURCE
> > An architecture should select this when it can successfully
> > build and run with CONFIG_FORTIFY_SOURCE.
> >
> > +# Select if arch has hardware sub-word xchg/cmpxchg support
> > +config ARCH_HAS_HW_XCHG_SMALL
>
> What do you mean by "hardware"?
> Does a software fallback count?
This new option is supposed as an indicator to select bit-field
definition of qspinlock, software fallback is not helpful in this
case.
>
> > --- a/arch/m68k/Kconfig
> > +++ b/arch/m68k/Kconfig
> > @@ -5,6 +5,7 @@ config M68K
> > select ARCH_32BIT_OFF_T
> > select ARCH_HAS_BINFMT_FLAT
> > select ARCH_HAS_DMA_PREP_COHERENT if HAS_DMA && MMU && !COLDFIRE
> > + select ARCH_HAS_HW_XCHG_SMALL
>
> M68k CPUs which support the CAS (Compare And Set) instruction do
> support this on 8-bit, 16-bit, and 32-bit quantities.
> M68k CPUs which lack CAS use a software implementation, which
> supports the same quantities.
>
> As CAS is used only if CONFIG_RMW_INSNS=y, perhaps this needs
> a dependency?
OK, I think this dependency is needed.
Huacai
>
> select ARCH_HAS_HW_XCHG_SMALL if RMW_INSNS
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
next prev parent reply other threads:[~2021-07-26 8:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-24 12:36 [PATCH RFC 1/2] arch: Introduce ARCH_HAS_HW_XCHG_SMALL Huacai Chen
2021-07-24 12:36 ` [PATCH RFC 2/2] qspinlock: Use ARCH_HAS_HW_XCHG_SMALL to select _Q_PENDING_BITS definition Huacai Chen
2021-07-24 19:24 ` [PATCH RFC 1/2] arch: Introduce ARCH_HAS_HW_XCHG_SMALL Arnd Bergmann
2021-07-25 3:06 ` Jiaxun Yang
2021-07-25 10:08 ` Arnd Bergmann
2021-07-26 8:36 ` Geert Uytterhoeven
2021-07-26 8:56 ` Huacai Chen [this message]
2021-07-26 10:39 ` Boqun Feng
2021-07-26 16:41 ` Guo Ren
2021-07-26 17:03 ` Boqun Feng
2021-07-26 21:20 ` Waiman Long
2021-07-27 1:27 ` Guo Ren
2021-07-27 2:29 ` Boqun Feng
2021-07-27 2:46 ` Waiman Long
2021-07-27 11:05 ` Peter Zijlstra
2021-07-28 10:40 ` Huacai Chen
2021-07-28 11:01 ` Peter Zijlstra
2021-07-29 16:38 ` Huacai Chen
2021-07-27 10:17 ` Peter Zijlstra
2021-07-27 1:07 ` Guo Ren
2021-07-27 1:52 ` Wang Rui
2021-07-27 11:03 ` Peter Zijlstra
2021-07-27 2:00 ` Boqun Feng
2021-07-27 10:50 ` Peter Zijlstra
2021-07-27 10:12 ` Peter Zijlstra
2021-07-26 9:00 ` Arnd Bergmann
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