* [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module
@ 2015-02-20 18:33 Michael Grzeschik
2015-02-20 18:33 ` [PATCH 2/2] ARM: dts: imx6: add support for technexion toucan board Michael Grzeschik
2015-02-20 18:53 ` [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Robert Schwebel
0 siblings, 2 replies; 8+ messages in thread
From: Michael Grzeschik @ 2015-02-20 18:33 UTC (permalink / raw)
To: linux-arm-kernel
Thw Wandboard is using the EDM1-CF-IMX6 module which is
defined under the edm standard.
http://www.edm-standard.org/
As this module is used on more boards this patch moves the default
pinmux settings into the special file imx6qdl-edm1.dtsi.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
arch/arm/boot/dts/imx6qdl-edm1.dtsi | 231 +++++++++++++++++++++++++++++++
arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 99 +------------
2 files changed, 233 insertions(+), 97 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6qdl-edm1.dtsi
diff --git a/arch/arm/boot/dts/imx6qdl-edm1.dtsi b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
new file mode 100644
index 0000000..b42605b
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
@@ -0,0 +1,231 @@
+&iomuxc {
+ pinctrl-names = "default";
+
+ imx6qdl-edm1 {
+
+ pinctrl_audmux: audmuxgrp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
+ MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
+ MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
+ MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b1
+ MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_spdif: spdifgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart1_rtscts: uart1_rtsctsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+
+ pinctrl_uart2_rtscts: uart2_rtsctsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x17059
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
+ >;
+ };
+
+ pinctrl_usbh1: usbh1grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
+ MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+ MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
+ >;
+ };
+
+ pinctrl_pwm3: pwm3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x80000000
+ >;
+ };
+
+ pinctrl_disp0_1: disp0grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
+ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
+ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
+ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
+ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10
+ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
+ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
+ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
+ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
+ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
+ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
+ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
+ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
+ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
+ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
+ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
+ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
+ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
+ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
+ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
+ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
+ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
+ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
+ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
+ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
+ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
+ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
+ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
+ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
+ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x10
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x10
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
+ MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
+ >;
+ };
+ };
+};
+
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index 5fb0916..4cc9251 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -9,6 +9,8 @@
*
*/
+#include "imx6qdl-edm1.dtsi"
+
/ {
regulators {
compatible = "simple-bus";
@@ -94,64 +96,6 @@
imx6qdl-wandboard {
- pinctrl_audmux: audmuxgrp {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
- MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
- MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
- MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
- >;
- };
-
- pinctrl_enet: enetgrp {
- fsl,pins = <
- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
- MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
- >;
- };
-
- pinctrl_i2c2: i2c2grp {
- fsl,pins = <
- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
- >;
- };
-
- pinctrl_spdif: spdifgrp {
- fsl,pins = <
- MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
- >;
- };
-
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
@@ -160,45 +104,6 @@
MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
>;
};
-
- pinctrl_usbotg: usbotggrp {
- fsl,pins = <
- MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
- >;
- };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] ARM: dts: imx6: add support for technexion toucan board
2015-02-20 18:33 [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Michael Grzeschik
@ 2015-02-20 18:33 ` Michael Grzeschik
2015-03-03 1:05 ` Shawn Guo
2015-02-20 18:53 ` [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Robert Schwebel
1 sibling, 1 reply; 8+ messages in thread
From: Michael Grzeschik @ 2015-02-20 18:33 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds the second user of the edm1 module.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-toucan.dts | 203 ++++++++++++++++++++++++++++++++++++
2 files changed, 204 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-toucan.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd..bea96c8 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -234,6 +234,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-tx6dl-comtft.dtb \
imx6dl-tx6u-801x.dtb \
imx6dl-tx6u-811x.dtb \
+ imx6dl-toucan.dtb \
imx6dl-wandboard.dtb \
imx6dl-wandboard-revb1.dtb \
imx6q-arm2.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-toucan.dts b/arch/arm/boot/dts/imx6dl-toucan.dts
new file mode 100644
index 0000000..c801774
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-toucan.dts
@@ -0,0 +1,203 @@
+/*
+ * Copyright 2015 Michael Grzeschik <mgr@pengutronix.de>, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-edm1.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Technexion Toucan";
+ compatible = "technexion,toucan", "fsl,imx6dl";
+
+ memory {
+ reg = <0x10000000 0x40000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_usbotg_vbus: regulator at 0 {
+ compatible = "regulator-fixed";
+ reg = <7>;
+ regulator-name = "usbotg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ pinctrl-names = "default";
+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_2p5v: regulator at 1 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator at 2 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+
+ sound {
+ compatible = "fsl,imx6-toucan-sgtl5000",
+ "fsl,imx-audio-sgtl5000";
+ model = "imx6-toucan-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <3>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-toucan {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x0b0b0
+ MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x0b0b0
+ MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x0b0b0
+ MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x0b0b0
+ MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x0b0b0
+ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x0b0b0
+ MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x0b0b0
+ MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x0b0b0
+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x0b0b0
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x0b0b0
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x17059
+ >;
+ };
+ };
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rgmii";
+ phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&usbh1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1>;
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usbotg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ dr_mode = "peripheral";
+ disable-over-current;
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ status = "okay";
+};
+
+&can2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ status = "okay";
+};
+
+&ssi1 {
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c1>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks 201>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_rtscts>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2 &pinctrl_uart2_rtscts>;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ bus-width = <4>;
+ no-1-8-v;
+ cd-gpios = <&gpio1 2 0>;
+ fsl,wp-controller;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ bus-width = <4>;
+ no-1-8-v;
+ fsl,wp-controller;
+ status = "okay";
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module
2015-02-20 18:33 [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Michael Grzeschik
2015-02-20 18:33 ` [PATCH 2/2] ARM: dts: imx6: add support for technexion toucan board Michael Grzeschik
@ 2015-02-20 18:53 ` Robert Schwebel
2015-02-21 16:19 ` Fabio Estevam
2015-03-08 16:13 ` Michael Grzeschik
1 sibling, 2 replies; 8+ messages in thread
From: Robert Schwebel @ 2015-02-20 18:53 UTC (permalink / raw)
To: linux-arm-kernel
Adding Fabio to Cc, who brought Wandboard into the kernel. Could you
give Michael's patch a try? We don't have a Wandboard here for testing,
so this should get a Tested-By from you (or somebody else with hardware)
before applying.
rsc
On Fri, Feb 20, 2015 at 07:33:14PM +0100, Michael Grzeschik wrote:
> Thw Wandboard is using the EDM1-CF-IMX6 module which is
> defined under the edm standard.
>
> http://www.edm-standard.org/
>
> As this module is used on more boards this patch moves the default
> pinmux settings into the special file imx6qdl-edm1.dtsi.
>
> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
> ---
> arch/arm/boot/dts/imx6qdl-edm1.dtsi | 231 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 99 +------------
> 2 files changed, 233 insertions(+), 97 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6qdl-edm1.dtsi
>
> diff --git a/arch/arm/boot/dts/imx6qdl-edm1.dtsi b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
> new file mode 100644
> index 0000000..b42605b
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
> @@ -0,0 +1,231 @@
> +&iomuxc {
> + pinctrl-names = "default";
> +
> + imx6qdl-edm1 {
> +
> + pinctrl_audmux: audmuxgrp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
> + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
> + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
> + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_enet: enetgrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
> + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b1
> + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_spdif: spdifgrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
> + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart1_rtscts: uart1_rtsctsgrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
> + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
> + >;
> + };
> +
> +
> + pinctrl_uart2_rtscts: uart2_rtsctsgrp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
> + MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbotg: usbotggrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x17059
> + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
> + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
> + >;
> + };
> +
> + pinctrl_usbh1: usbh1grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
> + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
> + >;
> + };
> +
> + pinctrl_usdhc1: usdhc1grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
> + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
> + >;
> + };
> +
> + pinctrl_usdhc2: usdhc2grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
> + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
> + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
> + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
> + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
> + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc3: usdhc3grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
> + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
> + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
> + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
> + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
> + MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
> + >;
> + };
> +
> + pinctrl_gpmi_nand: gpminandgrp {
> + fsl,pins = <
> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
> + >;
> + };
> +
> + pinctrl_pwm3: pwm3grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x80000000
> + >;
> + };
> +
> + pinctrl_disp0_1: disp0grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
> + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
> + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
> + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
> + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10
> + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
> + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
> + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
> + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
> + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
> + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
> + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
> + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
> + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
> + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
> + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
> + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
> + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
> + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
> + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
> + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
> + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
> + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
> + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
> + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
> + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
> + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
> + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
> + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
> + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x10
> + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x10
> + >;
> + };
> +
> + pinctrl_flexcan1: flexcan1grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
> + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
> + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
> + >;
> + };
> +
> + pinctrl_flexcan2: flexcan2grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
> + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
> + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
> + >;
> + };
> + };
> +};
> +
> diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
> index 5fb0916..4cc9251 100644
> --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
> @@ -9,6 +9,8 @@
> *
> */
>
> +#include "imx6qdl-edm1.dtsi"
> +
> / {
> regulators {
> compatible = "simple-bus";
> @@ -94,64 +96,6 @@
>
> imx6qdl-wandboard {
>
> - pinctrl_audmux: audmuxgrp {
> - fsl,pins = <
> - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
> - MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
> - MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
> - MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
> - >;
> - };
> -
> - pinctrl_enet: enetgrp {
> - fsl,pins = <
> - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
> - MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
> - >;
> - };
> -
> - pinctrl_i2c1: i2c1grp {
> - fsl,pins = <
> - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> - >;
> - };
> -
> - pinctrl_i2c2: i2c2grp {
> - fsl,pins = <
> - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> - >;
> - };
> -
> - pinctrl_spdif: spdifgrp {
> - fsl,pins = <
> - MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
> - >;
> - };
> -
> - pinctrl_uart1: uart1grp {
> - fsl,pins = <
> - MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
> - MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
> - >;
> - };
> -
> pinctrl_uart3: uart3grp {
> fsl,pins = <
> MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
> @@ -160,45 +104,6 @@
> MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
> >;
> };
> -
> - pinctrl_usbotg: usbotggrp {
> - fsl,pins = <
> - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
> - >;
> - };
> -
> - pinctrl_usdhc1: usdhc1grp {
> - fsl,pins = <
> - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
> - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
> - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
> - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
> - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
> - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
> - >;
> - };
> -
> - pinctrl_usdhc2: usdhc2grp {
> - fsl,pins = <
> - MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
> - MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
> - MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
> - MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
> - MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
> - MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
> - >;
> - };
> -
> - pinctrl_usdhc3: usdhc3grp {
> - fsl,pins = <
> - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
> - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
> - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
> - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
> - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
> - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
> - >;
> - };
> };
> };
>
> --
> 2.1.4
>
>
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module
2015-02-20 18:53 ` [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Robert Schwebel
@ 2015-02-21 16:19 ` Fabio Estevam
2015-02-24 1:22 ` Alfonso Tamés
2015-03-08 16:13 ` Michael Grzeschik
1 sibling, 1 reply; 8+ messages in thread
From: Fabio Estevam @ 2015-02-21 16:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi Robert,
On Fri, Feb 20, 2015 at 4:53 PM, Robert Schwebel
<r.schwebel@pengutronix.de> wrote:
> Adding Fabio to Cc, who brought Wandboard into the kernel. Could you
> give Michael's patch a try? We don't have a Wandboard here for testing,
> so this should get a Tested-By from you (or somebody else with hardware)
> before applying.
I don't have access to my Wandboard currently, but I am adding Alfonso
and John in case they could test this patch.
Regards,
Fabio Estevam
> rsc
>
> On Fri, Feb 20, 2015 at 07:33:14PM +0100, Michael Grzeschik wrote:
>> Thw Wandboard is using the EDM1-CF-IMX6 module which is
>> defined under the edm standard.
>>
>> http://www.edm-standard.org/
>>
>> As this module is used on more boards this patch moves the default
>> pinmux settings into the special file imx6qdl-edm1.dtsi.
>>
>> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
>> ---
>> arch/arm/boot/dts/imx6qdl-edm1.dtsi | 231 +++++++++++++++++++++++++++++++
>> arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 99 +------------
>> 2 files changed, 233 insertions(+), 97 deletions(-)
>> create mode 100644 arch/arm/boot/dts/imx6qdl-edm1.dtsi
>>
>> diff --git a/arch/arm/boot/dts/imx6qdl-edm1.dtsi b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
>> new file mode 100644
>> index 0000000..b42605b
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
>> @@ -0,0 +1,231 @@
>> +&iomuxc {
>> + pinctrl-names = "default";
>> +
>> + imx6qdl-edm1 {
>> +
>> + pinctrl_audmux: audmuxgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
>> + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
>> + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
>> + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>> + >;
>> + };
>> +
>> + pinctrl_enet: enetgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
>> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
>> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
>> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
>> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>> + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>> + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0
>> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b1
>> + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c1: i2c1grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> +
>> + pinctrl_i2c2: i2c2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> +
>> + pinctrl_i2c3: i2c3grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
>> + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_spdif: spdifgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
>> + >;
>> + };
>> +
>> + pinctrl_uart1: uart1grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_uart1_rtscts: uart1_rtsctsgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
>> + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_uart2: uart2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> +
>> + pinctrl_uart2_rtscts: uart2_rtsctsgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
>> + MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_usbotg: usbotggrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x17059
>> + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>> + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
>> + >;
>> + };
>> +
>> + pinctrl_usbh1: usbh1grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
>> + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
>> + >;
>> + };
>> +
>> + pinctrl_usdhc1: usdhc1grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
>> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
>> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
>> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
>> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
>> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>> + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
>> + >;
>> + };
>> +
>> + pinctrl_usdhc2: usdhc2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
>> + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
>> + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
>> + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
>> + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
>> + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3: usdhc3grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>> + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
>> + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
>> + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
>> + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>> + MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
>> + >;
>> + };
>> +
>> + pinctrl_gpmi_nand: gpminandgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
>> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
>> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
>> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
>> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
>> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
>> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
>> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
>> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
>> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
>> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
>> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
>> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
>> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
>> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
>> + >;
>> + };
>> +
>> + pinctrl_pwm3: pwm3grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x80000000
>> + >;
>> + };
>> +
>> + pinctrl_disp0_1: disp0grp-1 {
>> + fsl,pins = <
>> + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
>> + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
>> + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
>> + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
>> + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10
>> + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
>> + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
>> + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
>> + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
>> + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
>> + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
>> + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
>> + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
>> + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
>> + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
>> + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
>> + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
>> + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
>> + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
>> + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
>> + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
>> + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
>> + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
>> + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
>> + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
>> + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
>> + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
>> + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
>> + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>> + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x10
>> + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x10
>> + >;
>> + };
>> +
>> + pinctrl_flexcan1: flexcan1grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
>> + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
>> + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
>> + >;
>> + };
>> +
>> + pinctrl_flexcan2: flexcan2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
>> + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
>> + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
>> + >;
>> + };
>> + };
>> +};
>> +
>> diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
>> index 5fb0916..4cc9251 100644
>> --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
>> +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
>> @@ -9,6 +9,8 @@
>> *
>> */
>>
>> +#include "imx6qdl-edm1.dtsi"
>> +
>> / {
>> regulators {
>> compatible = "simple-bus";
>> @@ -94,64 +96,6 @@
>>
>> imx6qdl-wandboard {
>>
>> - pinctrl_audmux: audmuxgrp {
>> - fsl,pins = <
>> - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
>> - MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
>> - MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
>> - MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>> - >;
>> - };
>> -
>> - pinctrl_enet: enetgrp {
>> - fsl,pins = <
>> - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>> - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>> - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
>> - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
>> - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
>> - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
>> - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
>> - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
>> - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
>> - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
>> - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
>> - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
>> - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
>> - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
>> - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>> - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>> - MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>> - >;
>> - };
>> -
>> - pinctrl_i2c1: i2c1grp {
>> - fsl,pins = <
>> - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>> - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>> - >;
>> - };
>> -
>> - pinctrl_i2c2: i2c2grp {
>> - fsl,pins = <
>> - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>> - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>> - >;
>> - };
>> -
>> - pinctrl_spdif: spdifgrp {
>> - fsl,pins = <
>> - MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
>> - >;
>> - };
>> -
>> - pinctrl_uart1: uart1grp {
>> - fsl,pins = <
>> - MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
>> - MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>> - >;
>> - };
>> -
>> pinctrl_uart3: uart3grp {
>> fsl,pins = <
>> MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
>> @@ -160,45 +104,6 @@
>> MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
>> >;
>> };
>> -
>> - pinctrl_usbotg: usbotggrp {
>> - fsl,pins = <
>> - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>> - >;
>> - };
>> -
>> - pinctrl_usdhc1: usdhc1grp {
>> - fsl,pins = <
>> - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
>> - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
>> - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
>> - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
>> - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
>> - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>> - >;
>> - };
>> -
>> - pinctrl_usdhc2: usdhc2grp {
>> - fsl,pins = <
>> - MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
>> - MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
>> - MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
>> - MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
>> - MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
>> - MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>> - >;
>> - };
>> -
>> - pinctrl_usdhc3: usdhc3grp {
>> - fsl,pins = <
>> - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
>> - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
>> - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
>> - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
>> - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
>> - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>> - >;
>> - };
>> };
>> };
>>
>> --
>> 2.1.4
>>
>>
>>
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module
2015-02-21 16:19 ` Fabio Estevam
@ 2015-02-24 1:22 ` Alfonso Tamés
0 siblings, 0 replies; 8+ messages in thread
From: Alfonso Tamés @ 2015-02-24 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Thanks Fabio,
I?ll check it out this weekend and get back to you.
Regards,
Alfonso
> On Feb 21, 2015, at 10:19 AM, Fabio Estevam <festevam@gmail.com> wrote:
>
> Hi Robert,
>
> On Fri, Feb 20, 2015 at 4:53 PM, Robert Schwebel
> <r.schwebel@pengutronix.de> wrote:
>> Adding Fabio to Cc, who brought Wandboard into the kernel. Could you
>> give Michael's patch a try? We don't have a Wandboard here for testing,
>> so this should get a Tested-By from you (or somebody else with hardware)
>> before applying.
>
> I don't have access to my Wandboard currently, but I am adding Alfonso
> and John in case they could test this patch.
>
> Regards,
>
> Fabio Estevam
>
>> rsc
>>
>> On Fri, Feb 20, 2015 at 07:33:14PM +0100, Michael Grzeschik wrote:
>>> Thw Wandboard is using the EDM1-CF-IMX6 module which is
>>> defined under the edm standard.
>>>
>>> http://www.edm-standard.org/
>>>
>>> As this module is used on more boards this patch moves the default
>>> pinmux settings into the special file imx6qdl-edm1.dtsi.
>>>
>>> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
>>> ---
>>> arch/arm/boot/dts/imx6qdl-edm1.dtsi | 231 +++++++++++++++++++++++++++++++
>>> arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 99 +------------
>>> 2 files changed, 233 insertions(+), 97 deletions(-)
>>> create mode 100644 arch/arm/boot/dts/imx6qdl-edm1.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/imx6qdl-edm1.dtsi b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
>>> new file mode 100644
>>> index 0000000..b42605b
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
>>> @@ -0,0 +1,231 @@
>>> +&iomuxc {
>>> + pinctrl-names = "default";
>>> +
>>> + imx6qdl-edm1 {
>>> +
>>> + pinctrl_audmux: audmuxgrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
>>> + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
>>> + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
>>> + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>>> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>>> + >;
>>> + };
>>> +
>>> + pinctrl_enet: enetgrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>>> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>>> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
>>> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
>>> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
>>> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
>>> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
>>> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
>>> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
>>> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
>>> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
>>> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
>>> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
>>> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
>>> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>>> + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>>> + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0
>>> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b1
>>> + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>>> + >;
>>> + };
>>> +
>>> + pinctrl_i2c1: i2c1grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>>> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>>> + >;
>>> + };
>>> +
>>> +
>>> + pinctrl_i2c2: i2c2grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>>> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>>> + >;
>>> + };
>>> +
>>> +
>>> + pinctrl_i2c3: i2c3grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
>>> + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
>>> + >;
>>> + };
>>> +
>>> + pinctrl_spdif: spdifgrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
>>> + >;
>>> + };
>>> +
>>> + pinctrl_uart1: uart1grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
>>> + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>>> + >;
>>> + };
>>> +
>>> + pinctrl_uart1_rtscts: uart1_rtsctsgrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
>>> + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
>>> + >;
>>> + };
>>> +
>>> + pinctrl_uart2: uart2grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
>>> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>>> + >;
>>> + };
>>> +
>>> +
>>> + pinctrl_uart2_rtscts: uart2_rtsctsgrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
>>> + MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usbotg: usbotggrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x17059
>>> + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>>> + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usbh1: usbh1grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
>>> + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usdhc1: usdhc1grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
>>> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
>>> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
>>> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
>>> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
>>> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>>> + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usdhc2: usdhc2grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
>>> + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
>>> + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
>>> + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
>>> + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
>>> + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usdhc3: usdhc3grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
>>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
>>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
>>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
>>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
>>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>>> + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
>>> + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
>>> + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
>>> + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>>> + MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
>>> + >;
>>> + };
>>> +
>>> + pinctrl_gpmi_nand: gpminandgrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
>>> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
>>> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
>>> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
>>> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
>>> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
>>> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
>>> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
>>> + >;
>>> + };
>>> +
>>> + pinctrl_pwm3: pwm3grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x80000000
>>> + >;
>>> + };
>>> +
>>> + pinctrl_disp0_1: disp0grp-1 {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
>>> + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
>>> + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
>>> + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
>>> + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10
>>> + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
>>> + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
>>> + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
>>> + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
>>> + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
>>> + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
>>> + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
>>> + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
>>> + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
>>> + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
>>> + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
>>> + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
>>> + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
>>> + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
>>> + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
>>> + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
>>> + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
>>> + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
>>> + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
>>> + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
>>> + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
>>> + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
>>> + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
>>> + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>>> + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x10
>>> + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x10
>>> + >;
>>> + };
>>> +
>>> + pinctrl_flexcan1: flexcan1grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
>>> + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
>>> + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
>>> + >;
>>> + };
>>> +
>>> + pinctrl_flexcan2: flexcan2grp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
>>> + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
>>> + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
>>> + >;
>>> + };
>>> + };
>>> +};
>>> +
>>> diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
>>> index 5fb0916..4cc9251 100644
>>> --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
>>> +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
>>> @@ -9,6 +9,8 @@
>>> *
>>> */
>>>
>>> +#include "imx6qdl-edm1.dtsi"
>>> +
>>> / {
>>> regulators {
>>> compatible = "simple-bus";
>>> @@ -94,64 +96,6 @@
>>>
>>> imx6qdl-wandboard {
>>>
>>> - pinctrl_audmux: audmuxgrp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
>>> - MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
>>> - MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
>>> - MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>>> - >;
>>> - };
>>> -
>>> - pinctrl_enet: enetgrp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>>> - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>>> - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
>>> - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
>>> - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
>>> - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
>>> - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
>>> - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
>>> - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
>>> - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
>>> - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
>>> - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
>>> - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
>>> - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
>>> - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>>> - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>>> - MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>>> - >;
>>> - };
>>> -
>>> - pinctrl_i2c1: i2c1grp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>>> - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>>> - >;
>>> - };
>>> -
>>> - pinctrl_i2c2: i2c2grp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>>> - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>>> - >;
>>> - };
>>> -
>>> - pinctrl_spdif: spdifgrp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
>>> - >;
>>> - };
>>> -
>>> - pinctrl_uart1: uart1grp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
>>> - MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>>> - >;
>>> - };
>>> -
>>> pinctrl_uart3: uart3grp {
>>> fsl,pins = <
>>> MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
>>> @@ -160,45 +104,6 @@
>>> MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
>>>> ;
>>> };
>>> -
>>> - pinctrl_usbotg: usbotggrp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>>> - >;
>>> - };
>>> -
>>> - pinctrl_usdhc1: usdhc1grp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
>>> - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
>>> - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
>>> - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
>>> - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
>>> - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>>> - >;
>>> - };
>>> -
>>> - pinctrl_usdhc2: usdhc2grp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
>>> - MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
>>> - MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
>>> - MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
>>> - MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
>>> - MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>>> - >;
>>> - };
>>> -
>>> - pinctrl_usdhc3: usdhc3grp {
>>> - fsl,pins = <
>>> - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
>>> - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
>>> - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
>>> - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
>>> - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
>>> - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>>> - >;
>>> - };
>>> };
>>> };
>>>
>>> --
>>> 2.1.4
>>>
>>>
>>>
>>
>> --
>> Pengutronix e.K. | |
>> Industrial Linux Solutions | http://www.pengutronix.de/ |
>> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
>> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] ARM: dts: imx6: add support for technexion toucan board
2015-02-20 18:33 ` [PATCH 2/2] ARM: dts: imx6: add support for technexion toucan board Michael Grzeschik
@ 2015-03-03 1:05 ` Shawn Guo
2015-03-08 16:00 ` Michael Grzeschik
0 siblings, 1 reply; 8+ messages in thread
From: Shawn Guo @ 2015-03-03 1:05 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 20, 2015 at 07:33:15PM +0100, Michael Grzeschik wrote:
> This patch adds the second user of the edm1 module.
>
> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6dl-toucan.dts | 203 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 204 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6dl-toucan.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 91bd5bd..bea96c8 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -234,6 +234,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> imx6dl-tx6dl-comtft.dtb \
> imx6dl-tx6u-801x.dtb \
> imx6dl-tx6u-811x.dtb \
> + imx6dl-toucan.dtb \
'o' goes before 'x' in alphabet table.
> imx6dl-wandboard.dtb \
> imx6dl-wandboard-revb1.dtb \
> imx6q-arm2.dtb \
> diff --git a/arch/arm/boot/dts/imx6dl-toucan.dts b/arch/arm/boot/dts/imx6dl-toucan.dts
> new file mode 100644
> index 0000000..c801774
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6dl-toucan.dts
> @@ -0,0 +1,203 @@
> +/*
> + * Copyright 2015 Michael Grzeschik <mgr@pengutronix.de>, Pengutronix
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +/dts-v1/;
> +
> +#include "imx6dl.dtsi"
> +#include "imx6qdl-edm1.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + model = "Technexion Toucan";
> + compatible = "technexion,toucan", "fsl,imx6dl";
> +
> + memory {
> + reg = <0x10000000 0x40000000>;
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reg_usbotg_vbus: regulator at 0 {
> + compatible = "regulator-fixed";
> + reg = <7>;
'reg' value should match @unit-address.
> + regulator-name = "usbotg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + pinctrl-names = "default";
> + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_2p5v: regulator at 1 {
> + compatible = "regulator-fixed";
> + reg = <0>;
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator at 2 {
> + compatible = "regulator-fixed";
> + reg = <1>;
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> + };
> +
> + sound {
> + compatible = "fsl,imx6-toucan-sgtl5000",
> + "fsl,imx-audio-sgtl5000";
> + model = "imx6-toucan-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <3>;
> + };
Can generic simple-audio-card be used instead?
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + imx6qdl-toucan {
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x0b0b0
> + MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x0b0b0
> + MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x0b0b0
> + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x0b0b0
> + MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x0b0b0
> + MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x0b0b0
> + MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x0b0b0
> + MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x0b0b0
> + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x0b0b0
> + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x0b0b0
> + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x17059
> + >;
> + };
> + };
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet>;
> + phy-mode = "rgmii";
> + phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
> + status = "okay";
> +};
> +
> +&audmux {
Please sort these nodes alphabetically in label name.
Shawn
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbh1>;
> + dr_mode = "host";
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usbotg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg>;
> + dr_mode = "peripheral";
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + status = "okay";
> +};
> +
> +&can2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + status = "okay";
> +};
> +
> +&hdmi {
> + ddc-i2c-bus = <&i2c1>;
> + status = "okay";
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + clock-frequency = <400000>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + codec: sgtl5000 at 0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks 201>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + };
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_rtscts>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2 &pinctrl_uart2_rtscts>;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1>;
> + bus-width = <4>;
> + no-1-8-v;
> + cd-gpios = <&gpio1 2 0>;
> + fsl,wp-controller;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc3>;
> + bus-width = <4>;
> + no-1-8-v;
> + fsl,wp-controller;
> + status = "okay";
> +};
> --
> 2.1.4
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] ARM: dts: imx6: add support for technexion toucan board
2015-03-03 1:05 ` Shawn Guo
@ 2015-03-08 16:00 ` Michael Grzeschik
0 siblings, 0 replies; 8+ messages in thread
From: Michael Grzeschik @ 2015-03-08 16:00 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Mar 03, 2015 at 09:05:32AM +0800, Shawn Guo wrote:
> On Fri, Feb 20, 2015 at 07:33:15PM +0100, Michael Grzeschik wrote:
> > This patch adds the second user of the edm1 module.
> >
> > Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
> > ---
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/imx6dl-toucan.dts | 203 ++++++++++++++++++++++++++++++++++++
> > 2 files changed, 204 insertions(+)
> > create mode 100644 arch/arm/boot/dts/imx6dl-toucan.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 91bd5bd..bea96c8 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -234,6 +234,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> > imx6dl-tx6dl-comtft.dtb \
> > imx6dl-tx6u-801x.dtb \
> > imx6dl-tx6u-811x.dtb \
> > + imx6dl-toucan.dtb \
>
> 'o' goes before 'x' in alphabet table.
Will be fixed in v2.
>
> > imx6dl-wandboard.dtb \
> > imx6dl-wandboard-revb1.dtb \
> > imx6q-arm2.dtb \
> > diff --git a/arch/arm/boot/dts/imx6dl-toucan.dts b/arch/arm/boot/dts/imx6dl-toucan.dts
> > new file mode 100644
> > index 0000000..c801774
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6dl-toucan.dts
> > @@ -0,0 +1,203 @@
> > +/*
> > + * Copyright 2015 Michael Grzeschik <mgr@pengutronix.de>, Pengutronix
> > + *
> > + * The code contained herein is licensed under the GNU General Public
> > + * License. You may obtain a copy of the GNU General Public License
> > + * Version 2 or later at the following locations:
> > + *
> > + * http://www.opensource.org/licenses/gpl-license.html
> > + * http://www.gnu.org/copyleft/gpl.html
> > + */
> > +/dts-v1/;
> > +
> > +#include "imx6dl.dtsi"
> > +#include "imx6qdl-edm1.dtsi"
> > +#include <dt-bindings/gpio/gpio.h>
> > +
> > +/ {
> > + model = "Technexion Toucan";
> > + compatible = "technexion,toucan", "fsl,imx6dl";
> > +
> > + memory {
> > + reg = <0x10000000 0x40000000>;
> > + };
> > +
> > + regulators {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + reg_usbotg_vbus: regulator at 0 {
> > + compatible = "regulator-fixed";
> > + reg = <7>;
>
> 'reg' value should match @unit-address.
Will be fixed in v2.
>
> > + regulator-name = "usbotg_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + pinctrl-names = "default";
> > + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + };
> > +
> > + reg_2p5v: regulator at 1 {
> > + compatible = "regulator-fixed";
> > + reg = <0>;
> > + regulator-name = "2P5V";
> > + regulator-min-microvolt = <2500000>;
> > + regulator-max-microvolt = <2500000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_3p3v: regulator at 2 {
> > + compatible = "regulator-fixed";
> > + reg = <1>;
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-always-on;
> > + };
> > + };
> > +
> > + sound {
> > + compatible = "fsl,imx6-toucan-sgtl5000",
> > + "fsl,imx-audio-sgtl5000";
> > + model = "imx6-toucan-sgtl5000";
> > + ssi-controller = <&ssi1>;
> > + audio-codec = <&codec>;
> > + audio-routing =
> > + "MIC_IN", "Mic Jack",
> > + "Mic Jack", "Mic Bias",
> > + "Headphone Jack", "HP_OUT";
> > + mux-int-port = <1>;
> > + mux-ext-port = <3>;
> > + };
>
> Can generic simple-audio-card be used instead?
I don't know. Is it common to use simple-audio-card for sgtl5000?
The Wandboard is using the same nodes. It probably makes sense to keep
it as it is tested. So I will leave this as is for v2.
>
> > +};
> > +
> > +&iomuxc {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_hog>;
> > +
> > + imx6qdl-toucan {
> > + pinctrl_hog: hoggrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x0b0b0
> > + MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x0b0b0
> > + MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x0b0b0
> > + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x0b0b0
> > + MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x0b0b0
> > + MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x0b0b0
> > + MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x0b0b0
> > + MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x0b0b0
> > + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x0b0b0
> > + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x0b0b0
> > + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x17059
> > + >;
> > + };
> > + };
> > +};
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet>;
> > + phy-mode = "rgmii";
> > + phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
> > + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
> > + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
> > + status = "okay";
> > +};
> > +
> > +&audmux {
>
> Please sort these nodes alphabetically in label name.
Will change it in v2.
Thanks,
Michael
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module
2015-02-20 18:53 ` [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Robert Schwebel
2015-02-21 16:19 ` Fabio Estevam
@ 2015-03-08 16:13 ` Michael Grzeschik
1 sibling, 0 replies; 8+ messages in thread
From: Michael Grzeschik @ 2015-03-08 16:13 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 20, 2015 at 07:53:51PM +0100, Robert Schwebel wrote:
> Adding Fabio to Cc, who brought Wandboard into the kernel. Could you
> give Michael's patch a try? We don't have a Wandboard here for testing,
> so this should get a Tested-By from you (or somebody else with hardware)
> before applying.
>
> rsc
>
> On Fri, Feb 20, 2015 at 07:33:14PM +0100, Michael Grzeschik wrote:
> > Thw Wandboard is using the EDM1-CF-IMX6 module which is
> > defined under the edm standard.
> >
> > http://www.edm-standard.org/
> >
> > As this module is used on more boards this patch moves the default
> > pinmux settings into the special file imx6qdl-edm1.dtsi.
> >
> > Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
> > ---
> > arch/arm/boot/dts/imx6qdl-edm1.dtsi | 231 +++++++++++++++++++++++++++++++
> > arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 99 +------------
> > 2 files changed, 233 insertions(+), 97 deletions(-)
> > create mode 100644 arch/arm/boot/dts/imx6qdl-edm1.dtsi
> >
> > diff --git a/arch/arm/boot/dts/imx6qdl-edm1.dtsi b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
> > new file mode 100644
> > index 0000000..b42605b
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6qdl-edm1.dtsi
> > @@ -0,0 +1,231 @@
> > +&iomuxc {
> > + pinctrl-names = "default";
> > +
> > + imx6qdl-edm1 {
> > +
> > + pinctrl_audmux: audmuxgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
> > + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
> > + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
> > + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
> > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_enet: enetgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This seems somehow board revision
specific. It breaks the Toucan fec to
work. I will send v2 with this moved to
the hog pins of the wandboard revisions.
Thanks,
Michael
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2015-03-08 16:13 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-02-20 18:33 [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Michael Grzeschik
2015-02-20 18:33 ` [PATCH 2/2] ARM: dts: imx6: add support for technexion toucan board Michael Grzeschik
2015-03-03 1:05 ` Shawn Guo
2015-03-08 16:00 ` Michael Grzeschik
2015-02-20 18:53 ` [PATCH 1/2] ARM: dts: imx6: factor out pinmux for edm1 module Robert Schwebel
2015-02-21 16:19 ` Fabio Estevam
2015-02-24 1:22 ` Alfonso Tamés
2015-03-08 16:13 ` Michael Grzeschik
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).