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From: Yong Wu <yong.wu@mediatek.com>
To: Will Deacon <will@kernel.org>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
	chao.hao@mediatek.com, Joerg Roedel <joro@8bytes.org>,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
	Robin Murphy <robin.murphy@arm.com>,
	Matthias Kaehlcke <mka@chromium.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v9 08/21] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode
Date: Thu, 15 Aug 2019 18:18:38 +0800
Message-ID: <1565864318.14278.4.camel@mhfsdcap03> (raw)
In-Reply-To: <20190815095123.rzgtpklvhtjlqir4@willie-the-truck>

On Thu, 2019-08-15 at 10:51 +0100, Will Deacon wrote:
> On Thu, Aug 15, 2019 at 04:47:49PM +0800, Yong Wu wrote:
> > On Wed, 2019-08-14 at 15:41 +0100, Will Deacon wrote:
> > > On Sat, Aug 10, 2019 at 03:58:08PM +0800, Yong Wu wrote:
> > > > MediaTek extend the arm v7s descriptor to support the dram over 4GB.
> > > > 
> > > > In the mt2712 and mt8173, it's called "4GB mode", the physical address
> > > > is from 0x4000_0000 to 0x1_3fff_ffff, but from EMI point of view, it
> > > > is remapped to high address from 0x1_0000_0000 to 0x1_ffff_ffff, the
> > > > bit32 is always enabled. thus, in the M4U, we always enable the bit9
> > > > for all PTEs which means to enable bit32 of physical address. Here is
> > > > the detailed remap relationship in the "4GB mode":
> > > > CPU PA         ->    HW PA
> > > > 0x4000_0000          0x1_4000_0000 (Add bit32)
> > > > 0x8000_0000          0x1_8000_0000 ...
> > > > 0xc000_0000          0x1_c000_0000 ...
> > > > 0x1_0000_0000        0x1_0000_0000 (No change)
> > > 
> > > So in this example, there are no PAs below 0x4000_0000 yet you later
> > > add code to deal with that:
> > > 
> > > > +	/* Workaround for MTK 4GB Mode: Add BIT32 only when PA < 0x4000_0000.*/
> > > > +	if (cfg->oas == ARM_V7S_MTK_4GB_OAS && paddr < 0x40000000UL)
> > > > +		paddr |= BIT_ULL(32);
> > > 
> > > Why? Mainline currently doesn't do anything like this for the "4gb mode"
> > > support as far as I can tell. In fact, we currently unconditionally set
> > > bit 32 in the physical address returned by iova_to_phys() which wouldn't
> > > match your CPU PAs listed above, so I'm confused about how this is supposed
> > > to work.
> > 
> > Actually current mainline have a bug for this. So I tried to use another
> > special patch[1] for it in v8.
> 
> If you're fixing a bug in mainline, I'd prefer to see that as a separate
> patch.
> 
> > But the issue is not critical since MediaTek multimedia consumer(v4l2
> > and drm) don't call iommu_iova_to_phys currently.
> > 
> > > 
> > > The way I would like this quirk to work is that the io-pgtable code
> > > basically sets bit 9 in the pte when bit 32 is set in the physical address,
> > > and sets bit 4 in the pte when bit 33 is set in the physical address. It
> > > would then do the opposite when converting a pte to a physical address.
> > > 
> > > That way, your driver can call the page table code directly with the high
> > > addresses and we don't have to do any manual offsetting or range checking
> > > in the page table code.
> > 
> > In this case, the mt8183 can work successfully while the "4gb
> > mode"(mt8173/mt2712) can not.
> > 
> > In the "4gb mode", As the remap relationship above, we should always add
> > bit32 in pte as we did in [2]. and need add bit32 in the
> > "iova_to_phys"(Not always add.). That means the "4gb mode" has a special
> > flow:
> > a. Always add bit32 in paddr_to_iopte.
> > b. Add bit32 only when PA < 0x40000000 in iopte_to_paddr.
> 
> I think this is probably at the heart of my misunderstanding. What is so
> special about PAs (is this HW PA or CPU PA?) below 0x40000000? Is this RAM
> or something else?

SRAM and HW register that IOMMU can not access.

(sorry, My mailbox has something wrong.)


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  parent reply index

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-10  7:58 [PATCH v9 00/21] MT8183 IOMMU SUPPORT Yong Wu
2019-08-10  7:58 ` [PATCH v9 01/21] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI Yong Wu
2019-08-10  7:58 ` [PATCH v9 02/21] iommu/mediatek: Use a struct as the platform data Yong Wu
2019-08-10  7:58 ` [PATCH v9 03/21] memory: mtk-smi: Use a general config_port interface Yong Wu
2019-08-10  7:58 ` [PATCH v9 04/21] memory: mtk-smi: Use a struct for the platform data for smi-common Yong Wu
2019-08-10  7:58 ` [PATCH v9 05/21] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers Yong Wu
2019-08-10  7:58 ` [PATCH v9 06/21] iommu/io-pgtable-arm-v7s: Use ias/oas to check the valid iova/pa Yong Wu
2019-08-10  7:58 ` [PATCH v9 07/21] iommu/io-pgtable-arm-v7s: Rename the quirk from MTK_4GB to MTK_EXT Yong Wu
2019-08-10  7:58 ` [PATCH v9 08/21] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode Yong Wu
2019-08-14 14:41   ` Will Deacon
2019-08-15  8:47     ` Yong Wu
2019-08-15  9:51       ` Will Deacon
2019-08-15 10:03         ` Yong Wu
2019-08-15 10:04           ` Will Deacon
2019-08-15 10:18         ` Yong Wu [this message]
2019-08-15 11:50           ` Will Deacon
2019-08-16  7:22             ` Yong Wu
2019-08-19 11:24               ` Will Deacon
2019-08-10  7:58 ` [PATCH v9 09/21] iommu/mediatek: Add bclk can be supported optionally Yong Wu
2019-08-10  7:58 ` [PATCH v9 10/21] iommu/mediatek: Add larb-id remapped support Yong Wu
2019-08-10  7:58 ` [PATCH v9 11/21] iommu/mediatek: Refine protect memory definition Yong Wu
2019-08-10  7:58 ` [PATCH v9 12/21] iommu/mediatek: Move reset_axi into plat_data Yong Wu
2019-08-10  7:58 ` [PATCH v9 13/21] iommu/mediatek: Move vld_pa_rng " Yong Wu
2019-08-10  7:58 ` [PATCH v9 14/21] memory: mtk-smi: Add gals support Yong Wu
2019-08-10  7:58 ` [PATCH v9 15/21] iommu/mediatek: Add mt8183 IOMMU support Yong Wu
2019-08-10  7:58 ` [PATCH v9 16/21] iommu/mediatek: Add mmu1 support Yong Wu
2019-08-10  7:58 ` [PATCH v9 17/21] memory: mtk-smi: Invoke pm runtime_callback to enable clocks Yong Wu
2019-08-10  7:58 ` [PATCH v9 18/21] memory: mtk-smi: Add bus_sel for mt8183 Yong Wu
2019-08-10  7:58 ` [PATCH v9 19/21] iommu/mediatek: Fix VLD_PA_RNG register backup when suspend Yong Wu
2019-08-10  7:58 ` [PATCH v9 20/21] memory: mtk-smi: Get rid of need_larbid Yong Wu
2019-08-10  7:58 ` [PATCH v9 21/21] iommu/mediatek: Clean up struct mtk_smi_iommu Yong Wu
2019-08-14  8:18 ` [PATCH v9 00/21] MT8183 IOMMU SUPPORT Joerg Roedel
2019-08-14  8:24   ` Will Deacon

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