From: Nina Wu <nina-cm.wu@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Zhen Lei <thunder.leizhen@huawei.com>,
Nina Wu <Nina-CM.Wu@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <Jackson-kt.Chang@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v4 2/7] soc: mediatek: devapc: get 'vio_idx_num' info from DT
Date: Tue, 25 May 2021 13:53:01 +0800 [thread overview]
Message-ID: <1621921986-20578-2-git-send-email-nina-cm.wu@mediatek.com> (raw)
In-Reply-To: <1621921986-20578-1-git-send-email-nina-cm.wu@mediatek.com>
From: Nina Wu <Nina-CM.Wu@mediatek.com>
For new ICs, there are multiple devapc HWs for different subsys.
The number of devices controlled by each devapc (i.e. 'vio_idx_num')
will be set in DT for per devapc node.
On the other hand, for old ICs which have only one devapc HW, the
'vio_idx_num' info is set in compatible data.
To be backward compatible, the 'vio_idx_num' in compatible data is set
as the default value. Only when the default value is 0 will we get the
'vio_idx_num' from DT.
Signed-off-by: Nina Wu <Nina-CM.Wu@mediatek.com>
---
drivers/soc/mediatek/mtk-devapc.c | 25 +++++++++++++++++++------
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-devapc.c b/drivers/soc/mediatek/mtk-devapc.c
index f1cea04..71643d1 100644
--- a/drivers/soc/mediatek/mtk-devapc.c
+++ b/drivers/soc/mediatek/mtk-devapc.c
@@ -32,7 +32,7 @@ struct mtk_devapc_vio_dbgs {
};
struct mtk_devapc_data {
- /* numbers of violation index */
+ /* default numbers of violation index */
u32 vio_idx_num;
/* reg offset */
@@ -51,6 +51,9 @@ struct mtk_devapc_context {
void __iomem *infra_base;
struct clk *infra_clk;
const struct mtk_devapc_data *data;
+
+ /* numbers of violation index */
+ u32 vio_idx_num;
};
static void clear_vio_status(struct mtk_devapc_context *ctx)
@@ -60,10 +63,10 @@ static void clear_vio_status(struct mtk_devapc_context *ctx)
reg = ctx->infra_base + ctx->data->vio_sta_offset;
- for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->data->vio_idx_num) - 1; i++)
+ for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->vio_idx_num) - 1; i++)
writel(GENMASK(31, 0), reg + 4 * i);
- writel(GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1, 0),
+ writel(GENMASK(VIO_MOD_TO_REG_OFF(ctx->vio_idx_num) - 1, 0),
reg + 4 * i);
}
@@ -80,15 +83,15 @@ static void mask_module_irq(struct mtk_devapc_context *ctx, bool mask)
else
val = 0;
- for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->data->vio_idx_num) - 1; i++)
+ for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->vio_idx_num) - 1; i++)
writel(val, reg + 4 * i);
val = readl(reg + 4 * i);
if (mask)
- val |= GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1,
+ val |= GENMASK(VIO_MOD_TO_REG_OFF(ctx->vio_idx_num) - 1,
0);
else
- val &= ~GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1,
+ val &= ~GENMASK(VIO_MOD_TO_REG_OFF(ctx->vio_idx_num) - 1,
0);
writel(val, reg + 4 * i);
@@ -256,6 +259,16 @@ static int mtk_devapc_probe(struct platform_device *pdev)
if (!ctx->infra_base)
return -EINVAL;
+ /* Set vio_idx_num to default value.
+ * If the value is 0, get the info from DT.
+ */
+ ctx->vio_idx_num = ctx->data->vio_idx_num;
+ if (!ctx->vio_idx_num)
+ if (of_property_read_u32(node,
+ "vio-idx-num",
+ &ctx->vio_idx_num))
+ return -EINVAL;
+
devapc_irq = irq_of_parse_and_map(node, 0);
if (!devapc_irq)
return -EINVAL;
--
2.6.4
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next prev parent reply other threads:[~2021-05-25 6:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-25 5:53 [PATCH v4 1/7] dt-bindings: devapc: Add 'vio-idx-num' field to support mt8192 Nina Wu
2021-05-25 5:53 ` Nina Wu [this message]
2021-05-25 5:53 ` [PATCH v4 3/7] soc: mediatek: devapc: add shared flag to IRQ Nina Wu
2021-05-25 5:53 ` [PATCH v4 4/7] soc: mediatek: devapc: rename register variable infra_base Nina Wu
2021-05-25 5:53 ` [PATCH v4 5/7] soc: mediatek: devapc: add debug register for new IC support Nina Wu
2021-05-25 5:53 ` [PATCH v4 6/7] soc: mediatek: devapc: support mt8192 Nina Wu
2021-05-25 5:53 ` [PATCH v4 7/7] arm64: dts: mt8192: Add devapc node Nina Wu
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