From: Nina Wu <nina-cm.wu@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Zhen Lei <thunder.leizhen@huawei.com>,
Nina Wu <Nina-CM.Wu@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <Jackson-kt.Chang@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v4 7/7] arm64: dts: mt8192: Add devapc node
Date: Tue, 25 May 2021 13:53:06 +0800 [thread overview]
Message-ID: <1621921986-20578-7-git-send-email-nina-cm.wu@mediatek.com> (raw)
In-Reply-To: <1621921986-20578-1-git-send-email-nina-cm.wu@mediatek.com>
From: Nina Wu <Nina-CM.Wu@mediatek.com>
Add devapc nodes to mt8192.
Signed-off-by: Nina Wu <Nina-CM.Wu@mediatek.com>
---
This patch depends on "Add dt-bindings of MT8192 clocks" [1]
and "Add mt8192 clock controllers" [2]
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/20210524122053.17155-7-chun-jie.chen@mediatek.com/
[2] https://patchwork.kernel.org/project/linux-mediatek/patch/20210331083854.7650-2-chun-jie.chen@mediatek.com/
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 36 ++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index b0923de..6f5c8c5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -517,6 +517,33 @@
clock-names = "clk13m";
};
+ devapc_infra: devapc@10207000 {
+ compatible = "mediatek,mt8192-devapc";
+ reg = <0 0x10207000 0 0x1000>;
+ vio-idx-num = <367>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_DEVICE_APC>;
+ clock-names = "devapc-infra-clock";
+ };
+
+ devapc_peri: devapc@10274000 {
+ compatible = "mediatek,mt8192-devapc";
+ reg = <0 0x10274000 0 0x1000>;
+ vio-idx-num = <292>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_DEVICE_APC>;
+ clock-names = "devapc-infra-clock";
+ };
+
+ devapc_peri2: devapc@10275000 {
+ compatible = "mediatek,mt8192-devapc";
+ reg = <0 0x10275000 0 0x1000>;
+ vio-idx-num = <242>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_DEVICE_APC>;
+ clock-names = "devapc-infra-clock";
+ };
+
scp_adsp: syscon@10720000 {
compatible = "mediatek,mt8192-scp_adsp", "syscon";
reg = <0 0x10720000 0 0x1000>;
@@ -661,6 +688,15 @@
status = "disabled";
};
+ devapc_peri_par: devapc@11020000 {
+ compatible = "mediatek,mt8192-devapc";
+ reg = <0 0x11020000 0 0x1000>;
+ vio-idx-num = <58>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_DEVICE_APC>;
+ clock-names = "devapc-infra-clock";
+ };
+
nor_flash: spi@11234000 {
compatible = "mediatek,mt8192-nor";
reg = <0 0x11234000 0 0xe0>;
--
2.6.4
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prev parent reply other threads:[~2021-05-25 5:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-25 5:53 [PATCH v4 1/7] dt-bindings: devapc: Add 'vio-idx-num' field to support mt8192 Nina Wu
2021-05-25 5:53 ` [PATCH v4 2/7] soc: mediatek: devapc: get 'vio_idx_num' info from DT Nina Wu
2021-05-25 5:53 ` [PATCH v4 3/7] soc: mediatek: devapc: add shared flag to IRQ Nina Wu
2021-05-25 5:53 ` [PATCH v4 4/7] soc: mediatek: devapc: rename register variable infra_base Nina Wu
2021-05-25 5:53 ` [PATCH v4 5/7] soc: mediatek: devapc: add debug register for new IC support Nina Wu
2021-05-25 5:53 ` [PATCH v4 6/7] soc: mediatek: devapc: support mt8192 Nina Wu
2021-05-25 5:53 ` Nina Wu [this message]
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