From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems
Date: Wed, 13 Feb 2013 10:37:02 +0000 [thread overview]
Message-ID: <201302131037.02464.arnd@arndb.de> (raw)
In-Reply-To: <20130213104051.07bcffe0@skate>
On Wednesday 13 February 2013, Thomas Petazzoni wrote:
> > > Indeed. So maybe I should mark this resource as being IORESOURCE_MEM
> > > in the DT.
> >
> > The DT seems fine here, just the code that interprets it is a little
> > unusual. Maybe you can change the calling convention of that function
> > to pass the type of resource you want as an argument?
>
> Erm? The type of the resource is encoded into the DT:
>
> + 0x81000000 0 0 0xc0000000 0 0x00010000 /* downstream I/O */
> + 0x82000000 0 0 0xc1000000 0 0x08000000>; /* non-prefetchable memory */
>
> From http://devicetree.org/Device_Tree_Usage#PCI_Host_Bridge:
>
> phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr
> phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
> phys.low cell: llllllll llllllll llllllll llllllll
>
> ss: space code
>
> 00: configuration space
> 01: I/O space
> 10: 32 bit memory space
> 11: 64 bit memory space
>
> So the 0x81 at the beginning of the first line means I/O space, the
> 0x82 at the beginning of the second line means 32 bits memory space.
> The of_pci_process_ranges() function simply decodes those informations
> and fills the struct resource it returns with the appropriate resource
> type.
Yes, of course. And the ranges property tells you how to turn the first
address space into the second address space. So the above property
defines that the PCI bus I/O space range from 0 to 0x10000 gets converted
into the host MMIO range 0xc0000000 to 0xc0010000 on the host, and
the PCI bus memory space range from 0 to 0x08000000 gets converted to
the host MMIO range 0xc1000000 to 0xc9000000.
The output of your of_pci_process_ranges() function is the host MMIO
range, not the range in the bus address space, so it has to be
IORESOURCE_MEM.
Note that the memory range you have given in the example is a little
unconventional. Usually we try to have an identity mapping between
PCI bus memory space addresses and host MMIO space, which would
result in a zero sys->mem_offset value in addition to the sys->io_offset
value that is already zero.
Is there a limitation with the way that your address translation
windows are set up? What I would hope you could do is a memory window
like
<0x82000000 0 0xc1000000 0xc1000000 0 0x08000000>; /* non-prefetchable memory */
that translates the host MMIO range 0xc1000000-0xc9000000 into bus
address 0xc1000000-0xc9000000 instead of bus address 0x00000000-0x08000000.
Would it help if you switch the addresses around, so that the physical
location of the memory space window is naturally aligned at
0xc0000000-0xc8000000 and the I/O space window is at 0xc8000000-0xc8100000?
Arnd
next prev parent reply other threads:[~2013-02-13 10:37 UTC|newest]
Thread overview: 135+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-12 16:28 [PATCH v3] PCIe support for the Armada 370 and Armada XP SoCs Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 01/32] of/pci: Provide support for parsing PCI DT ranges property Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 02/32] of/pci: Add of_pci_get_devfn() function Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 03/32] of/pci: Add of_pci_parse_bus_range() function Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 04/32] ARM: pci: Allow passing per-controller private data Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 05/32] lib: devres: don't enclose pcim_*() functions in CONFIG_HAS_IOPORT Thomas Petazzoni
2013-02-12 18:00 ` Arnd Bergmann
2013-02-12 18:58 ` Thomas Petazzoni
2013-02-12 22:36 ` Arnd Bergmann
2013-03-04 16:28 ` Thomas Petazzoni
2013-03-04 20:30 ` Arnd Bergmann
2013-02-12 16:28 ` [PATCH 06/32] arm: pci: add a align_resource hook Thomas Petazzoni
2013-02-12 18:03 ` Arnd Bergmann
2013-02-12 19:01 ` Thomas Petazzoni
2013-02-12 19:49 ` Russell King - ARM Linux
2013-02-12 16:28 ` [PATCH 07/32] arm: mvebu: fix address-cells in mpic DT node Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 08/32] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 09/32] clk: mvebu: add more PCIe clocks for Armada XP Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 10/32] arm: plat-orion: introduce WIN_CTRL_ENABLE in address mapping code Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 11/32] arm: plat-orion: refactor the orion_disable_wins() function Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 12/32] plat-orion: introduce ORION_ADDR_MAP_NO_REMAP Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 13/32] arm: mach-dove: use ORION_ADDR_MAP_NO_REMAP Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 14/32] arm: mach-kirkwood: " Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 15/32] arm: mach-mvebu: " Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 16/32] arm: mach-orion5x: " Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 17/32] arm: plat-orion: convert 'int remap' to 'u32 remap' Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 18/32] arm: plat-orion: remove __init from addr-map functions needed after boot time Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 19/32] arm: plat-orion: introduce orion_{alloc, free}_cpu_win() functions Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 20/32] arm: plat-orion: remove __init from PCIe functions needed after boot time Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 21/32] arm: mvebu: add functions to alloc/free PCIe decoding windows Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 22/32] arm: plat-orion: make common PCIe code usable on mvebu Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 23/32] pci: infrastructure to add drivers in drivers/pci/host Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems Thomas Petazzoni
2013-02-12 18:30 ` Arnd Bergmann
2013-02-12 19:22 ` Thomas Petazzoni
2013-02-12 19:49 ` Jason Gunthorpe
2013-02-12 22:59 ` Arnd Bergmann
2013-02-13 0:41 ` Jason Gunthorpe
2013-02-13 9:18 ` Arnd Bergmann
2013-02-13 9:31 ` Thomas Petazzoni
2013-02-13 10:23 ` Arnd Bergmann
2013-02-13 8:23 ` Thomas Petazzoni
2013-02-13 9:29 ` Arnd Bergmann
2013-02-13 9:40 ` Thomas Petazzoni
2013-02-13 10:37 ` Arnd Bergmann [this message]
2013-03-06 9:50 ` Thomas Petazzoni
2013-03-06 10:43 ` Arnd Bergmann
2013-02-12 22:35 ` Jason Gunthorpe
2013-02-13 8:57 ` Thomas Petazzoni
2013-02-13 18:04 ` Jason Gunthorpe
2013-02-13 19:33 ` Arnd Bergmann
2013-03-06 9:54 ` Thomas Petazzoni
2013-03-06 12:11 ` Thierry Reding
2013-03-06 18:09 ` Jason Gunthorpe
2013-03-07 8:08 ` Thierry Reding
2013-03-07 17:49 ` Jason Gunthorpe
2013-03-07 19:48 ` Thierry Reding
2013-03-07 20:02 ` Jason Gunthorpe
2013-03-07 20:47 ` Thierry Reding
2013-03-08 0:05 ` Rob Herring
2013-03-08 7:14 ` Thierry Reding
2013-03-08 16:52 ` Jason Gunthorpe
2013-03-08 19:12 ` Thierry Reding
2013-03-08 19:43 ` Mitch Bradley
2013-03-08 20:02 ` Jason Gunthorpe
2013-03-08 20:13 ` Thierry Reding
2013-03-10 15:09 ` Thomas Petazzoni
2013-03-11 8:08 ` Thierry Reding
2013-03-08 23:46 ` Mitch Bradley
2013-03-09 1:31 ` Jason Gunthorpe
2013-03-10 4:52 ` Mitch Bradley
2013-03-10 6:55 ` Jason Gunthorpe
2013-03-11 5:46 ` Mitch Bradley
2013-03-11 7:46 ` Thierry Reding
2013-03-11 18:04 ` Mitch Bradley
2013-03-11 18:23 ` Jason Gunthorpe
2013-03-11 19:49 ` Mitch Bradley
2013-03-11 18:15 ` Jason Gunthorpe
2013-03-11 21:50 ` Mitch Bradley
2013-03-11 23:25 ` Jason Gunthorpe
2013-03-11 23:38 ` Mitch Bradley
2013-03-12 7:08 ` Thierry Reding
2013-03-12 15:57 ` Jason Gunthorpe
2013-03-12 20:38 ` Thierry Reding
2013-03-12 21:03 ` Jason Gunthorpe
2013-03-12 21:30 ` Thierry Reding
2013-03-12 22:08 ` Jason Gunthorpe
2013-03-12 23:25 ` Mitch Bradley
2013-03-13 8:18 ` Thierry Reding
2013-03-13 17:02 ` Jason Gunthorpe
2013-03-13 19:26 ` Thierry Reding
2013-03-13 19:59 ` Jason Gunthorpe
2013-03-13 20:54 ` Thierry Reding
2013-03-13 20:58 ` Mitch Bradley
2013-03-13 21:33 ` Thierry Reding
2013-03-13 22:48 ` Mitch Bradley
2013-03-14 0:43 ` Rob Herring
2013-03-14 1:20 ` Mitch Bradley
2013-03-14 7:11 ` Thierry Reding
2013-03-14 4:56 ` Stephen Warren
2013-03-13 22:02 ` Thierry Reding
2013-03-13 22:21 ` Jason Gunthorpe
2013-03-14 9:01 ` Thierry Reding
2013-03-14 17:25 ` Jason Gunthorpe
2013-03-14 20:38 ` Thierry Reding
2013-03-14 21:05 ` Jason Gunthorpe
2013-03-14 21:10 ` Mitch Bradley
2013-03-14 21:09 ` Thierry Reding
2013-03-14 21:29 ` Jason Gunthorpe
2013-03-14 21:37 ` Thierry Reding
2013-03-13 22:22 ` Jason Gunthorpe
2013-03-09 8:58 ` Thomas Petazzoni
2013-03-08 23:12 ` Rob Herring
2013-03-09 11:10 ` Thierry Reding
2013-03-10 5:04 ` Mitch Bradley
2013-03-10 15:06 ` Thomas Petazzoni
2013-03-10 18:33 ` Mitch Bradley
2013-02-15 0:36 ` Bjorn Helgaas
2013-02-15 5:06 ` Thomas Petazzoni
2013-02-15 16:26 ` Bjorn Helgaas
2013-02-15 16:44 ` Jason Gunthorpe
2013-02-12 16:28 ` [PATCH 25/32] arm: mvebu: PCIe support is now available on mvebu Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 26/32] arm: mvebu: add PCIe Device Tree informations for Armada 370 Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 27/32] arm: mvebu: add PCIe Device Tree informations for Armada XP Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 28/32] arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 29/32] arm: mvebu: PCIe Device Tree informations for Armada XP DB Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 30/32] arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 31/32] arm: mvebu: PCIe Device Tree informations for Armada 370 DB Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 32/32] arm: mvebu: update defconfig with PCI and USB support Thomas Petazzoni
2013-02-12 18:12 ` [PATCH v3] PCIe support for the Armada 370 and Armada XP SoCs Arnd Bergmann
2013-02-12 19:04 ` Thomas Petazzoni
2013-02-13 8:50 ` Thomas Petazzoni
2013-02-13 9:37 ` Arnd Bergmann
2013-02-13 15:27 ` Christophe Vu-Brugier
2013-02-13 15:30 ` Thomas Petazzoni
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