From: thierry.reding@avionic-design.de (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems
Date: Sat, 9 Mar 2013 12:10:03 +0100 [thread overview]
Message-ID: <20130309111003.GA495@avionic-0098.mockup.avionic-design.de> (raw)
In-Reply-To: <513A7044.1020700@gmail.com>
On Fri, Mar 08, 2013 at 05:12:04PM -0600, Rob Herring wrote:
> On 03/08/2013 01:14 AM, Thierry Reding wrote:
> > On Thu, Mar 07, 2013 at 06:05:33PM -0600, Rob Herring wrote:
> >> On 03/07/2013 02:47 PM, Thierry Reding wrote:
> > [...]
> >>> In a nutshell (since some of the context isn't quoted anymore) the
> >>> problem that we're trying to solve is that some of the embedded SoCs
> >>> require per-root-port registers for configuration. The PCI DT
> >>> specification doesn't make any provisions for this. A few alternatives
> >>> have been discussed so far:
> >>
> >> I'm not sure I follow. This is different than the host controller
> >> registers? Why would this not just be multiple entries in the reg property?
> >
> > Well the register regions are per root-port. On Tegra20 there's 2 of
> > them, Tegra30 has 3 and if I understand correctly Marvell can have up to
> > 10 (!). Adding all of them to the reg property of the host controller
> > could work but it needs some way to match the reg entry to the root port
> > similar to option 1 below.
>
> The compatible property of the PCI host controller can imply what each
> index of the reg property entries is for.
>
> >
> > Adding a property in the root port nodes seems like a cleaner and more
> > accurate representation of the hardware to me, but if that's not
> > acceptable perhaps we need to bite the bullet and add the code to look
> > the registers up from the parent's reg property.
>
> What I don't like is a new property defined to describe mmio addresses.
> We already have a property for that and it is "reg".
Okay, understood.
> But I think I'm still missing something:
>
> >>> pci at 0,1 {
> >>> ...
> >>> reg = <0x00000800 0 0 0 0>;
>
> Is this a PCI bus address?
Yes. The example is slightly wrong. pci at 0,1 should actually be pci at 1,0.
That means it is device 1, function 0 on the bus (implicitly 0 in this
case). That matches the values in the reg property, whose first cell is
defined as follows, quoting the PCI OF specification:
npt000ss bbbbbbbb dddddfff rrrrrrrr
Where:
n is 0 if the address is relocatable, 1 otherwise
p is 1 if the addressable region is "prefetchable", 0
otherwise
t is 1 if the address is aliased (for non-relocatable
I/O), below 1 MB (for Memory), or below 64 KB (for
relocatable I/O).
ss is the space code, denoting the address space
bbbbbbbb is the 8-bit Bus Number
ddddd is the 5-bit Device Number
fff is the 3-bit Function Number
rrrrrrrr is the 8-bit Register Number
Thierry
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next prev parent reply other threads:[~2013-03-09 11:10 UTC|newest]
Thread overview: 135+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-12 16:28 [PATCH v3] PCIe support for the Armada 370 and Armada XP SoCs Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 01/32] of/pci: Provide support for parsing PCI DT ranges property Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 02/32] of/pci: Add of_pci_get_devfn() function Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 03/32] of/pci: Add of_pci_parse_bus_range() function Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 04/32] ARM: pci: Allow passing per-controller private data Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 05/32] lib: devres: don't enclose pcim_*() functions in CONFIG_HAS_IOPORT Thomas Petazzoni
2013-02-12 18:00 ` Arnd Bergmann
2013-02-12 18:58 ` Thomas Petazzoni
2013-02-12 22:36 ` Arnd Bergmann
2013-03-04 16:28 ` Thomas Petazzoni
2013-03-04 20:30 ` Arnd Bergmann
2013-02-12 16:28 ` [PATCH 06/32] arm: pci: add a align_resource hook Thomas Petazzoni
2013-02-12 18:03 ` Arnd Bergmann
2013-02-12 19:01 ` Thomas Petazzoni
2013-02-12 19:49 ` Russell King - ARM Linux
2013-02-12 16:28 ` [PATCH 07/32] arm: mvebu: fix address-cells in mpic DT node Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 08/32] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 09/32] clk: mvebu: add more PCIe clocks for Armada XP Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 10/32] arm: plat-orion: introduce WIN_CTRL_ENABLE in address mapping code Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 11/32] arm: plat-orion: refactor the orion_disable_wins() function Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 12/32] plat-orion: introduce ORION_ADDR_MAP_NO_REMAP Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 13/32] arm: mach-dove: use ORION_ADDR_MAP_NO_REMAP Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 14/32] arm: mach-kirkwood: " Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 15/32] arm: mach-mvebu: " Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 16/32] arm: mach-orion5x: " Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 17/32] arm: plat-orion: convert 'int remap' to 'u32 remap' Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 18/32] arm: plat-orion: remove __init from addr-map functions needed after boot time Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 19/32] arm: plat-orion: introduce orion_{alloc, free}_cpu_win() functions Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 20/32] arm: plat-orion: remove __init from PCIe functions needed after boot time Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 21/32] arm: mvebu: add functions to alloc/free PCIe decoding windows Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 22/32] arm: plat-orion: make common PCIe code usable on mvebu Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 23/32] pci: infrastructure to add drivers in drivers/pci/host Thomas Petazzoni
2013-02-12 16:28 ` [PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems Thomas Petazzoni
2013-02-12 18:30 ` Arnd Bergmann
2013-02-12 19:22 ` Thomas Petazzoni
2013-02-12 19:49 ` Jason Gunthorpe
2013-02-12 22:59 ` Arnd Bergmann
2013-02-13 0:41 ` Jason Gunthorpe
2013-02-13 9:18 ` Arnd Bergmann
2013-02-13 9:31 ` Thomas Petazzoni
2013-02-13 10:23 ` Arnd Bergmann
2013-02-13 8:23 ` Thomas Petazzoni
2013-02-13 9:29 ` Arnd Bergmann
2013-02-13 9:40 ` Thomas Petazzoni
2013-02-13 10:37 ` Arnd Bergmann
2013-03-06 9:50 ` Thomas Petazzoni
2013-03-06 10:43 ` Arnd Bergmann
2013-02-12 22:35 ` Jason Gunthorpe
2013-02-13 8:57 ` Thomas Petazzoni
2013-02-13 18:04 ` Jason Gunthorpe
2013-02-13 19:33 ` Arnd Bergmann
2013-03-06 9:54 ` Thomas Petazzoni
2013-03-06 12:11 ` Thierry Reding
2013-03-06 18:09 ` Jason Gunthorpe
2013-03-07 8:08 ` Thierry Reding
2013-03-07 17:49 ` Jason Gunthorpe
2013-03-07 19:48 ` Thierry Reding
2013-03-07 20:02 ` Jason Gunthorpe
2013-03-07 20:47 ` Thierry Reding
2013-03-08 0:05 ` Rob Herring
2013-03-08 7:14 ` Thierry Reding
2013-03-08 16:52 ` Jason Gunthorpe
2013-03-08 19:12 ` Thierry Reding
2013-03-08 19:43 ` Mitch Bradley
2013-03-08 20:02 ` Jason Gunthorpe
2013-03-08 20:13 ` Thierry Reding
2013-03-10 15:09 ` Thomas Petazzoni
2013-03-11 8:08 ` Thierry Reding
2013-03-08 23:46 ` Mitch Bradley
2013-03-09 1:31 ` Jason Gunthorpe
2013-03-10 4:52 ` Mitch Bradley
2013-03-10 6:55 ` Jason Gunthorpe
2013-03-11 5:46 ` Mitch Bradley
2013-03-11 7:46 ` Thierry Reding
2013-03-11 18:04 ` Mitch Bradley
2013-03-11 18:23 ` Jason Gunthorpe
2013-03-11 19:49 ` Mitch Bradley
2013-03-11 18:15 ` Jason Gunthorpe
2013-03-11 21:50 ` Mitch Bradley
2013-03-11 23:25 ` Jason Gunthorpe
2013-03-11 23:38 ` Mitch Bradley
2013-03-12 7:08 ` Thierry Reding
2013-03-12 15:57 ` Jason Gunthorpe
2013-03-12 20:38 ` Thierry Reding
2013-03-12 21:03 ` Jason Gunthorpe
2013-03-12 21:30 ` Thierry Reding
2013-03-12 22:08 ` Jason Gunthorpe
2013-03-12 23:25 ` Mitch Bradley
2013-03-13 8:18 ` Thierry Reding
2013-03-13 17:02 ` Jason Gunthorpe
2013-03-13 19:26 ` Thierry Reding
2013-03-13 19:59 ` Jason Gunthorpe
2013-03-13 20:54 ` Thierry Reding
2013-03-13 20:58 ` Mitch Bradley
2013-03-13 21:33 ` Thierry Reding
2013-03-13 22:48 ` Mitch Bradley
2013-03-14 0:43 ` Rob Herring
2013-03-14 1:20 ` Mitch Bradley
2013-03-14 7:11 ` Thierry Reding
2013-03-14 4:56 ` Stephen Warren
2013-03-13 22:02 ` Thierry Reding
2013-03-13 22:21 ` Jason Gunthorpe
2013-03-14 9:01 ` Thierry Reding
2013-03-14 17:25 ` Jason Gunthorpe
2013-03-14 20:38 ` Thierry Reding
2013-03-14 21:05 ` Jason Gunthorpe
2013-03-14 21:10 ` Mitch Bradley
2013-03-14 21:09 ` Thierry Reding
2013-03-14 21:29 ` Jason Gunthorpe
2013-03-14 21:37 ` Thierry Reding
2013-03-13 22:22 ` Jason Gunthorpe
2013-03-09 8:58 ` Thomas Petazzoni
2013-03-08 23:12 ` Rob Herring
2013-03-09 11:10 ` Thierry Reding [this message]
2013-03-10 5:04 ` Mitch Bradley
2013-03-10 15:06 ` Thomas Petazzoni
2013-03-10 18:33 ` Mitch Bradley
2013-02-15 0:36 ` Bjorn Helgaas
2013-02-15 5:06 ` Thomas Petazzoni
2013-02-15 16:26 ` Bjorn Helgaas
2013-02-15 16:44 ` Jason Gunthorpe
2013-02-12 16:28 ` [PATCH 25/32] arm: mvebu: PCIe support is now available on mvebu Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 26/32] arm: mvebu: add PCIe Device Tree informations for Armada 370 Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 27/32] arm: mvebu: add PCIe Device Tree informations for Armada XP Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 28/32] arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 29/32] arm: mvebu: PCIe Device Tree informations for Armada XP DB Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 30/32] arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 31/32] arm: mvebu: PCIe Device Tree informations for Armada 370 DB Thomas Petazzoni
2013-02-12 16:29 ` [PATCH 32/32] arm: mvebu: update defconfig with PCI and USB support Thomas Petazzoni
2013-02-12 18:12 ` [PATCH v3] PCIe support for the Armada 370 and Armada XP SoCs Arnd Bergmann
2013-02-12 19:04 ` Thomas Petazzoni
2013-02-13 8:50 ` Thomas Petazzoni
2013-02-13 9:37 ` Arnd Bergmann
2013-02-13 15:27 ` Christophe Vu-Brugier
2013-02-13 15:30 ` Thomas Petazzoni
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