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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org
Cc: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 10/17] coresight: etm4x: Use explicit barriers on enable/disable
Date: Thu, 29 Aug 2019 14:28:35 -0600
Message-ID: <20190829202842.580-11-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20190829202842.580-1-mathieu.poirier@linaro.org>

From: Andrew Murray <andrew.murray@arm.com>

Synchronization is recommended before disabling the trace registers
to prevent any start or stop points being speculative at the point
of disabling the unit (section 7.3.77 of ARM IHI 0064D).

Synchronization is also recommended after programming the trace
registers to ensure all updates are committed prior to normal code
resuming (section 4.3.7 of ARM IHI 0064D).

Let's ensure these syncronization points are present in the code
and clearly commented.

Note that we could rely on the barriers in CS_LOCK and
coresight_disclaim_device_unlocked or the context switch to user
space - however coresight may be of use in the kernel.

On armv8 the mb macro is defined as dsb(sy) - Given that the etm4x is
only used on armv8 let's directly use dsb(sy) instead of mb(). This
removes some ambiguity and makes it easier to correlate the code with
the TRM.

Signed-off-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
[Fixed capital letter for "use" in title]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm4x.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 7ad15651e069..ec9468880c71 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -188,6 +188,13 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
 		dev_err(etm_dev,
 			"timeout while waiting for Idle Trace Status\n");
 
+	/*
+	 * As recommended by section 4.3.7 ("Synchronization when using the
+	 * memory-mapped interface") of ARM IHI 0064D
+	 */
+	dsb(sy);
+	isb();
+
 done:
 	CS_LOCK(drvdata->base);
 
@@ -453,8 +460,12 @@ static void etm4_disable_hw(void *info)
 	/* EN, bit[0] Trace unit enable bit */
 	control &= ~0x1;
 
-	/* make sure everything completes before disabling */
-	mb();
+	/*
+	 * Make sure everything completes before disabling, as recommended
+	 * by section 7.3.77 ("TRCVICTLR, ViewInst Main Control Register,
+	 * SSTATUS") of ARM IHI 0064D
+	 */
+	dsb(sy);
 	isb();
 	writel_relaxed(control, drvdata->base + TRCPRGCTLR);
 
-- 
2.17.1


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  parent reply index

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-29 20:28 [PATCH 00/17] coresight: next v5.3-rc6 Mathieu Poirier
2019-08-29 20:28 ` [PATCH 01/17] coresight: etm4x: Two function calls less Mathieu Poirier
2019-08-29 20:28 ` [PATCH 02/17] coresight: etm4x: Add ETM PIDs for SDM845 and MSM8996 Mathieu Poirier
2019-08-29 20:28 ` [PATCH 03/17] coresight: cpu-debug: Add support for Qualcomm Kryo Mathieu Poirier
2019-08-29 20:28 ` [PATCH 04/17] coresight: etr_buf: Consolidate refcount initialization Mathieu Poirier
2019-08-29 20:28 ` [PATCH 05/17] coresight: tmc-etr: Handle memory errors Mathieu Poirier
2019-08-29 20:28 ` [PATCH 06/17] coresight: tmc-etr: Check if non-secure access is enabled Mathieu Poirier
2019-08-29 20:28 ` [PATCH 07/17] coresight: Convert pr_warn to dev_warn for obsolete bindings Mathieu Poirier
2019-08-29 20:28 ` [PATCH 08/17] coresight: acpi: Static funnel support Mathieu Poirier
2019-08-29 20:28 ` [PATCH 09/17] coresight: etm4x: Remove superfluous setting of os_unlock Mathieu Poirier
2019-08-29 20:28 ` Mathieu Poirier [this message]
2019-08-29 20:28 ` [PATCH 11/17] coresight: etm4x: use module_param instead of module_param_named Mathieu Poirier
2019-08-29 20:28 ` [PATCH 12/17] coresight: etm4x: improve clarity of etm4_os_unlock comment Mathieu Poirier
2019-08-29 20:28 ` [PATCH 13/17] coresight: tmc-etr: Fix updating buffer in not-snapshot mode Mathieu Poirier
2019-08-29 20:28 ` [PATCH 14/17] coresight: tmc-etr: Fix perf_data check Mathieu Poirier
2019-08-29 20:28 ` [PATCH 15/17] coresight: tmc: Make memory width mask computation into a function Mathieu Poirier
2019-08-29 20:28 ` [PATCH 16/17] coresight: tmc-etr: Decouple buffer sync and barrier packet insertion Mathieu Poirier
2019-08-29 20:28 ` [PATCH 17/17] coresight: tmc-etr: Add barrier packets when moving offset forward Mathieu Poirier
2019-09-03 20:02 ` [PATCH 00/17] coresight: next v5.3-rc6 Greg KH

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