* [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay @ 2019-08-25 13:03 Jernej Skrabec 2019-08-27 13:34 ` Maxime Ripard 0 siblings, 1 reply; 4+ messages in thread From: Jernej Skrabec @ 2019-08-25 13:03 UTC (permalink / raw) To: mripard, wens Cc: mark.rutland, devicetree, Ondrej Jirman, linux-kernel, linux-sunxi, robh+dt, linux-arm-kernel Depending on kernel and bootloader configuration, it's possible that Realtek ethernet PHY isn't powered on properly. It needs some time before it can be used. Fix that by adding 100ms ramp delay to regulator responsible for powering PHY. Fixes: 94dcfdc77fc5 ("arm64: allwinner: pine64-plus: Enable dwmac-sun8i") Suggested-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts index 24f1aac366d6..9612a34c1762 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts @@ -63,3 +63,7 @@ reg = <1>; }; }; + +®_dc1sw { + regulator-enable-ramp-delay = <100000>; +}; -- 2.23.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay 2019-08-25 13:03 [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay Jernej Skrabec @ 2019-08-27 13:34 ` Maxime Ripard 2019-08-27 13:48 ` Ondřej Jirman 0 siblings, 1 reply; 4+ messages in thread From: Maxime Ripard @ 2019-08-27 13:34 UTC (permalink / raw) To: Jernej Skrabec Cc: mark.rutland, devicetree, Ondrej Jirman, linux-sunxi, linux-kernel, wens, robh+dt, linux-arm-kernel [-- Attachment #1.1: Type: text/plain, Size: 690 bytes --] On Sun, Aug 25, 2019 at 03:03:36PM +0200, Jernej Skrabec wrote: > Depending on kernel and bootloader configuration, it's possible that > Realtek ethernet PHY isn't powered on properly. It needs some time > before it can be used. > > Fix that by adding 100ms ramp delay to regulator responsible for > powering PHY. > > Fixes: 94dcfdc77fc5 ("arm64: allwinner: pine64-plus: Enable dwmac-sun8i") > Suggested-by: Ondrej Jirman <megous@megous.com> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> How was that delay found? It should at least have a comment explaining why it's there. Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay 2019-08-27 13:34 ` Maxime Ripard @ 2019-08-27 13:48 ` Ondřej Jirman 2019-09-02 11:38 ` Maxime Ripard 0 siblings, 1 reply; 4+ messages in thread From: Ondřej Jirman @ 2019-08-27 13:48 UTC (permalink / raw) To: Maxime Ripard Cc: mark.rutland, devicetree, Jernej Skrabec, linux-sunxi, linux-kernel, wens, robh+dt, linux-arm-kernel Hi, On Tue, Aug 27, 2019 at 03:34:43PM +0200, Maxime Ripard wrote: > On Sun, Aug 25, 2019 at 03:03:36PM +0200, Jernej Skrabec wrote: > > Depending on kernel and bootloader configuration, it's possible that > > Realtek ethernet PHY isn't powered on properly. It needs some time > > before it can be used. > > > > Fix that by adding 100ms ramp delay to regulator responsible for > > powering PHY. > > > > Fixes: 94dcfdc77fc5 ("arm64: allwinner: pine64-plus: Enable dwmac-sun8i") > > Suggested-by: Ondrej Jirman <megous@megous.com> > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > How was that delay found? I suggested it. There's no delay in the dwmac-sun8i driver, so after enabling the phy power, it will start accessing it over MDIO right away, which is not good. I suggested the value based on post-reset delay in the PHY's datasheet (30ms). Multiplied ~3x (if I remember correctly) to get some safety margin. Chip has more to do then after the HW reset, and regulator also needs some time to ramp-up. regards, o. > It should at least have a comment explaining why it's there. > > Thanks! > Maxime > > -- > Maxime Ripard, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay 2019-08-27 13:48 ` Ondřej Jirman @ 2019-09-02 11:38 ` Maxime Ripard 0 siblings, 0 replies; 4+ messages in thread From: Maxime Ripard @ 2019-09-02 11:38 UTC (permalink / raw) To: Jernej Skrabec, wens, robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel, linux-sunxi On Tue, Aug 27, 2019 at 03:48:06PM +0200, Ondřej Jirman wrote: > Hi, > > On Tue, Aug 27, 2019 at 03:34:43PM +0200, Maxime Ripard wrote: > > On Sun, Aug 25, 2019 at 03:03:36PM +0200, Jernej Skrabec wrote: > > > Depending on kernel and bootloader configuration, it's possible that > > > Realtek ethernet PHY isn't powered on properly. It needs some time > > > before it can be used. > > > > > > Fix that by adding 100ms ramp delay to regulator responsible for > > > powering PHY. > > > > > > Fixes: 94dcfdc77fc5 ("arm64: allwinner: pine64-plus: Enable dwmac-sun8i") > > > Suggested-by: Ondrej Jirman <megous@megous.com> > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > > > How was that delay found? > > I suggested it. There's no delay in the dwmac-sun8i driver, so after enabling > the phy power, it will start accessing it over MDIO right away, which is not > good. > > I suggested the value based on post-reset delay in the PHY's datasheet (30ms). > Multiplied ~3x (if I remember correctly) to get some safety margin. Chip has > more to do then after the HW reset, and regulator also needs some time to > ramp-up. That sounds reasonable, can you add that as a comment? Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-09-02 11:39 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-08-25 13:03 [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay Jernej Skrabec 2019-08-27 13:34 ` Maxime Ripard 2019-08-27 13:48 ` Ondřej Jirman 2019-09-02 11:38 ` Maxime Ripard
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