Linux-ARM-Kernel Archive on lore.kernel.org
 help / color / Atom feed
* [PATCH v1 0/7] PCI: dt: Remove magic numbers for legacy PCI IRQ interrupts
@ 2019-11-04 16:38 Andrew Murray
  2019-11-04 16:38 ` [PATCH v1 2/7] arm64: dts: Use IRQ flags " Andrew Murray
                   ` (2 more replies)
  0 siblings, 3 replies; 13+ messages in thread
From: Andrew Murray @ 2019-11-04 16:38 UTC (permalink / raw)
  To: devicetree, linux-arm-kernel, linux-arm-kernel, linux-arm-msm,
	linux-mediatek, linux-omap, linux-pci, linuxppc-dev,
	linux-rockchip, linux-xtensa, rfi

PCI devices can trigger interrupts via 4 physical/virtual lines known
as INTA, INTB, INTC or INTD. Due to interrupt swizzling it is often
required to describe the interrupt mapping in the device tree. Let's
avoid the existing magic numbers and replace them with a #define to
improve clarity.

Based on v5.4-rc5, compile tested

Signed-off-by: Andrew Murray <andrew.murray@arm.com>


Andrew Murray (7):
  PCI: dt: Add legacy PCI IRQ defines
  arm64: dts: Use IRQ flags for legacy PCI IRQ interrupts
  arm: dts: Use IRQ flags for legacy PCI IRQ interrupts
  xtensa: dts: Use IRQ flags for legacy PCI IRQ interrupts
  powerpc: dts: fsl: Use IRQ flags for legacy PCI IRQ interrupts
  powerpc: dts: Use IRQ flags for legacy PCI IRQ interrupts
  dt-bindings: PCI: Use IRQ flags for legacy PCI IRQ interrupts

 .../devicetree/bindings/pci/83xx-512x-pci.txt |  18 +--
 .../devicetree/bindings/pci/aardvark-pci.txt  |  10 +-
 .../devicetree/bindings/pci/altera-pcie.txt   |  10 +-
 .../bindings/pci/axis,artpec6-pcie.txt        |  10 +-
 .../bindings/pci/cdns,cdns-pcie-host.txt      |  10 +-
 .../bindings/pci/faraday,ftpci100.txt         |  68 ++++----
 .../bindings/pci/fsl,imx6q-pcie.txt           |  10 +-
 .../bindings/pci/hisilicon-pcie.txt           |  20 +--
 .../bindings/pci/host-generic-pci.txt         |  10 +-
 .../devicetree/bindings/pci/kirin-pcie.txt    |  10 +-
 .../bindings/pci/layerscape-pci.txt           |  10 +-
 .../devicetree/bindings/pci/mediatek-pcie.txt |  40 ++---
 .../devicetree/bindings/pci/mobiveil-pcie.txt |   8 +-
 .../devicetree/bindings/pci/pci-rcar-gen2.txt |   8 +-
 .../bindings/pci/pci-thunder-pem.txt          |  10 +-
 .../devicetree/bindings/pci/pcie-al.txt       |   4 +-
 .../devicetree/bindings/pci/qcom,pcie.txt     |  20 +--
 .../bindings/pci/ralink,rt3883-pci.txt        |  18 +--
 .../bindings/pci/rockchip-pcie-host.txt       |  10 +-
 .../devicetree/bindings/pci/ti-pci.txt        |  10 +-
 .../devicetree/bindings/pci/uniphier-pcie.txt |  10 +-
 .../bindings/pci/v3-v360epc-pci.txt           |  34 ++--
 .../devicetree/bindings/pci/versatile.txt     |  40 ++---
 .../devicetree/bindings/pci/xgene-pci-msi.txt |  10 +-
 .../devicetree/bindings/pci/xgene-pci.txt     |  10 +-
 .../bindings/pci/xilinx-nwl-pcie.txt          |  10 +-
 .../devicetree/bindings/pci/xilinx-pcie.txt   |  20 +--
 arch/arm/boot/dts/alpine.dtsi                 |   6 +-
 arch/arm/boot/dts/artpec6.dtsi                |  10 +-
 arch/arm/boot/dts/gemini-dlink-dir-685.dts    |  34 ++--
 arch/arm/boot/dts/gemini-sl93512r.dts         |  34 ++--
 arch/arm/boot/dts/gemini-sq201.dts            |  34 ++--
 arch/arm/boot/dts/gemini-wbd111.dts           |  34 ++--
 arch/arm/boot/dts/gemini-wbd222.dts           |  34 ++--
 arch/arm/boot/dts/imx6qdl.dtsi                |  10 +-
 arch/arm/boot/dts/imx6sx.dtsi                 |  10 +-
 arch/arm/boot/dts/integratorap.dts            |  36 +++--
 arch/arm/boot/dts/keystone-k2e.dtsi           |  11 +-
 arch/arm/boot/dts/keystone.dtsi               |  10 +-
 arch/arm/boot/dts/qcom-apq8064.dtsi           |  10 +-
 arch/arm/boot/dts/qcom-ipq4019.dtsi           |  10 +-
 arch/arm/boot/dts/versatile-pb.dts            |  36 +++--
 arch/arm64/boot/dts/al/alpine-v2.dtsi         |   6 +-
 .../boot/dts/amd/amd-overdrive-rev-b0.dts     |   2 +-
 .../boot/dts/amd/amd-overdrive-rev-b1.dts     |   2 +-
 arch/arm64/boot/dts/amd/amd-overdrive.dts     |   2 +-
 arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi  |  12 +-
 arch/arm64/boot/dts/amd/husky.dts             |   2 +-
 arch/arm64/boot/dts/arm/fvp-base-revc.dts     |  10 +-
 arch/arm64/boot/dts/arm/juno-base.dtsi        |  12 +-
 arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi |  10 +-
 .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi |  10 +-
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi     |  10 +-
 arch/arm64/boot/dts/hisilicon/hip06.dtsi      |  10 +-
 arch/arm64/boot/dts/qcom/msm8998.dtsi         |  10 +-
 arch/arm64/boot/dts/qcom/qcs404.dtsi          |  10 +-
 arch/arm64/boot/dts/rockchip/rk3399.dtsi      |  10 +-
 .../boot/dts/socionext/uniphier-ld20.dtsi     |  11 +-
 .../boot/dts/socionext/uniphier-pxs3.dtsi     |  11 +-
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi        |  12 +-
 arch/powerpc/boot/dts/bluestone.dts           |  12 +-
 arch/powerpc/boot/dts/charon.dts              |  12 +-
 arch/powerpc/boot/dts/digsy_mtc.dts           |  12 +-
 arch/powerpc/boot/dts/fsl/b4420qds.dts        |   4 +-
 arch/powerpc/boot/dts/fsl/b4420si-post.dtsi   |   2 +-
 arch/powerpc/boot/dts/fsl/b4860qds.dts        |   4 +-
 arch/powerpc/boot/dts/fsl/b4860si-post.dtsi   |   2 +-
 arch/powerpc/boot/dts/fsl/b4qds.dtsi          |   2 +-
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi      |  12 +-
 arch/powerpc/boot/dts/fsl/bsc9132qds.dts      |   2 +-
 arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi |  12 +-
 arch/powerpc/boot/dts/fsl/c293pcie.dts        |   2 +-
 arch/powerpc/boot/dts/fsl/c293si-post.dtsi    |  12 +-
 arch/powerpc/boot/dts/fsl/gef_sbc310.dts      |  12 +-
 arch/powerpc/boot/dts/fsl/mpc8536ds.dts       |  12 +-
 arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dts   |  12 +-
 arch/powerpc/boot/dts/fsl/mpc8540ads.dts      | 100 ++++++------
 arch/powerpc/boot/dts/fsl/mpc8544ds.dts       |  22 +--
 arch/powerpc/boot/dts/fsl/mpc8544ds.dtsi      |  22 +--
 arch/powerpc/boot/dts/fsl/mpc8548cds_32b.dts  |  14 +-
 arch/powerpc/boot/dts/fsl/mpc8548cds_36b.dts  |  14 +-
 arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi |  12 +-
 arch/powerpc/boot/dts/fsl/mpc8560ads.dts      | 100 ++++++------
 arch/powerpc/boot/dts/fsl/mpc8568mds.dts      |  22 +--
 arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi |  12 +-
 arch/powerpc/boot/dts/fsl/mpc8569mds.dts      |   2 +-
 arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi |  12 +-
 arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts    | 150 +++++++++---------
 .../powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts | 150 +++++++++---------
 arch/powerpc/boot/dts/fsl/p2020ds.dts         |   2 +-
 arch/powerpc/boot/dts/fsl/p2020ds.dtsi        |  46 +++---
 arch/powerpc/boot/dts/fsl/ppa8548.dts         |   2 +-
 arch/powerpc/boot/dts/fsl/sbc8641d.dts        |   4 +-
 arch/powerpc/boot/dts/haleakala.dts           |  12 +-
 arch/powerpc/boot/dts/holly.dts               |  42 ++---
 arch/powerpc/boot/dts/hotfoot.dts             |  12 +-
 arch/powerpc/boot/dts/kuroboxHD.dts           |  28 ++--
 arch/powerpc/boot/dts/kuroboxHG.dts           |  28 ++--
 arch/powerpc/boot/dts/lite5200.dts            |  12 +-
 arch/powerpc/boot/dts/lite5200b.dts           |  22 +--
 arch/powerpc/boot/dts/media5200.dts           |  26 +--
 arch/powerpc/boot/dts/mpc5121ads.dts          |  20 +--
 arch/powerpc/boot/dts/mpc8308rdb.dts          |  12 +-
 arch/powerpc/boot/dts/mpc8313erdb.dts         |  20 +--
 arch/powerpc/boot/dts/mpc832x_mds.dts         |  60 +++----
 arch/powerpc/boot/dts/mpc832x_rdb.dts         |  22 +--
 arch/powerpc/boot/dts/mpc8349emitxgp.dts      |   8 +-
 arch/powerpc/boot/dts/mpc836x_mds.dts         |  60 +++----
 arch/powerpc/boot/dts/mpc836x_rdk.dts         |  16 +-
 arch/powerpc/boot/dts/mucmc52.dts             |  12 +-
 arch/powerpc/boot/dts/mvme5100.dts            |  48 +++---
 arch/powerpc/boot/dts/pcm030.dts              |  22 +--
 arch/powerpc/boot/dts/pcm032.dts              |  22 +--
 arch/powerpc/boot/dts/pq2fads.dts             |  28 ++--
 arch/powerpc/boot/dts/socrates.dts            |   8 +-
 arch/powerpc/boot/dts/storcenter.dts          |  28 ++--
 arch/powerpc/boot/dts/stx_gp3_8560.dts        |  36 +++--
 arch/powerpc/boot/dts/taishan.dts             |  20 +--
 arch/powerpc/boot/dts/tqm5200.dts             |  12 +-
 arch/powerpc/boot/dts/tqm8540.dts             |  16 +-
 arch/powerpc/boot/dts/tqm8541.dts             |  16 +-
 arch/powerpc/boot/dts/tqm8555.dts             |  16 +-
 arch/powerpc/boot/dts/tqm8560.dts             |  16 +-
 arch/powerpc/boot/dts/virtex440-ml510.dts     |  43 ++---
 arch/powerpc/boot/dts/xcalibur1501.dts        |  13 +-
 arch/powerpc/boot/dts/xpedite5200.dts         |   8 +-
 arch/xtensa/boot/dts/virt.dts                 |  12 +-
 .../dt-bindings/interrupt-controller/irq.h    |   8 +
 128 files changed, 1326 insertions(+), 1189 deletions(-)

-- 
2.21.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [PATCH v1 2/7] arm64: dts: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 [PATCH v1 0/7] PCI: dt: Remove magic numbers for legacy PCI IRQ interrupts Andrew Murray
@ 2019-11-04 16:38 ` " Andrew Murray
  2019-11-06 10:03   ` Liviu Dudau
                     ` (2 more replies)
  2019-11-04 16:38 ` [PATCH v1 3/7] arm: " Andrew Murray
  2019-11-04 16:38 ` [PATCH v1 7/7] dt-bindings: PCI: " Andrew Murray
  2 siblings, 3 replies; 13+ messages in thread
From: Andrew Murray @ 2019-11-04 16:38 UTC (permalink / raw)
  To: Tsahee Zidenberg, Antoine Tenart, Rob Herring, Mark Rutland,
	Brijesh Singh, Suravee Suthikulpanit, Tom Lendacky, Liviu Dudau,
	Sudeep Holla, Lorenzo Pieralisi, Robert Richter, Jayachandran C,
	Shawn Guo, Li Yang, Wei Xu, Andy Gross, Heiko Stuebner,
	Masahiro Yamada, Michal Simek
  Cc: devicetree, linux-rockchip, linux-arm-kernel, linux-arm-msm

Replace magic numbers used to describe legacy PCI IRQ interrupts
with #define.

Signed-off-by: Andrew Murray <andrew.murray@arm.com>
---
 arch/arm64/boot/dts/al/alpine-v2.dtsi            |  6 +++---
 arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts |  2 +-
 arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts |  2 +-
 arch/arm64/boot/dts/amd/amd-overdrive.dts        |  2 +-
 arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi     | 12 +++++++-----
 arch/arm64/boot/dts/amd/husky.dts                |  2 +-
 arch/arm64/boot/dts/arm/fvp-base-revc.dts        | 10 +++++-----
 arch/arm64/boot/dts/arm/juno-base.dtsi           | 12 +++++++-----
 arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi    | 10 +++++-----
 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi   | 10 +++++-----
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi        | 10 +++++-----
 arch/arm64/boot/dts/hisilicon/hip06.dtsi         | 10 +++++-----
 arch/arm64/boot/dts/qcom/msm8998.dtsi            | 10 +++++-----
 arch/arm64/boot/dts/qcom/qcs404.dtsi             | 10 +++++-----
 arch/arm64/boot/dts/rockchip/rk3399.dtsi         | 10 +++++-----
 arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 11 ++++++-----
 arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 11 ++++++-----
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi           | 12 +++++++-----
 18 files changed, 80 insertions(+), 72 deletions(-)

diff --git a/arch/arm64/boot/dts/al/alpine-v2.dtsi b/arch/arm64/boot/dts/al/alpine-v2.dtsi
index d5e7e2bb4e6c..35a540090026 100644
--- a/arch/arm64/boot/dts/al/alpine-v2.dtsi
+++ b/arch/arm64/boot/dts/al/alpine-v2.dtsi
@@ -132,10 +132,10 @@
 			#address-cells = <3>;
 			#interrupt-cells = <1>;
 			reg = <0x0 0xfbc00000 0x0 0x100000>;
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			/* add legacy interrupts for SATA only */
-			interrupt-map = <0x4000 0 0 1 &gic 0 53 4>,
-					<0x4800 0 0 1 &gic 0 54 4>;
+			interrupt-map = <0x4000 0 0 IRQ_INTA &gic 0 53 4>,
+					<0x4800 0 0 IRQ_INTA &gic 0 54 4>;
 			/* 32 bit non prefetchable memory space */
 			ranges = <0x2000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
 			bus-range = <0x00 0x00>;
diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
index 8e341be9a399..d4a8d3a5eebb 100644
--- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
+++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
@@ -8,7 +8,7 @@
 
 /dts-v1/;
 
-/include/ "amd-seattle-soc.dtsi"
+#include "amd-seattle-soc.dtsi"
 
 / {
 	model = "AMD Seattle (Rev.B0) Development Board (Overdrive)";
diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
index 92cef05c6b74..e55254e714f2 100644
--- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
+++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
@@ -8,7 +8,7 @@
 
 /dts-v1/;
 
-/include/ "amd-seattle-soc.dtsi"
+#include "amd-seattle-soc.dtsi"
 
 / {
 	model = "AMD Seattle (Rev.B1) Development Board (Overdrive)";
diff --git a/arch/arm64/boot/dts/amd/amd-overdrive.dts b/arch/arm64/boot/dts/amd/amd-overdrive.dts
index 41b3a6c0993d..4e09c9a2ceda 100644
--- a/arch/arm64/boot/dts/amd/amd-overdrive.dts
+++ b/arch/arm64/boot/dts/amd/amd-overdrive.dts
@@ -7,7 +7,7 @@
 
 /dts-v1/;
 
-/include/ "amd-seattle-soc.dtsi"
+#include "amd-seattle-soc.dtsi"
 
 / {
 	model = "AMD Seattle Development Board (Overdrive)";
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index b664e7af74eb..efc6f42f3bd1 100644
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -5,6 +5,8 @@
  * Copyright (C) 2014 Advanced Micro Devices, Inc.
  */
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
 	compatible = "amd,seattle";
 	interrupt-parent = <&gic0>;
@@ -213,12 +215,12 @@
 			msi-parent = <&v2m0>;
 			reg = <0 0xf0000000 0 0x10000000>;
 
-			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map-mask = <0xf800 0x0 0x0 IRQ_INT_ALL>;
 			interrupt-map =
-				<0x1000 0x0 0x0 0x1 &gic0 0x0 0x0 0x0 0x120 0x1>,
-				<0x1000 0x0 0x0 0x2 &gic0 0x0 0x0 0x0 0x121 0x1>,
-				<0x1000 0x0 0x0 0x3 &gic0 0x0 0x0 0x0 0x122 0x1>,
-				<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
+				<0x1000 0x0 0x0 IRQ_INTA &gic0 0x0 0x0 0x0 0x120 0x1>,
+				<0x1000 0x0 0x0 IRQ_INTB &gic0 0x0 0x0 0x0 0x121 0x1>,
+				<0x1000 0x0 0x0 IRQ_INTC &gic0 0x0 0x0 0x0 0x122 0x1>,
+				<0x1000 0x0 0x0 IRQ_INTD &gic0 0x0 0x0 0x0 0x123 0x1>;
 
 			dma-coherent;
 			dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
diff --git a/arch/arm64/boot/dts/amd/husky.dts b/arch/arm64/boot/dts/amd/husky.dts
index 7acde34772cb..5463e89b2811 100644
--- a/arch/arm64/boot/dts/amd/husky.dts
+++ b/arch/arm64/boot/dts/amd/husky.dts
@@ -8,7 +8,7 @@
 
 /dts-v1/;
 
-/include/ "amd-seattle-soc.dtsi"
+#include "amd-seattle-soc.dtsi"
 
 / {
 	model = "Linaro 96Boards Enterprise Edition Server (Husky) Board";
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 62ab0d54ff71..8352c3ad43ab 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -161,11 +161,11 @@
 		bus-range = <0x0 0x1>;
 		reg = <0x0 0x40000000 0x0 0x10000000>;
 		ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>;
-		interrupt-map = <0 0 0 1 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 2 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 3 &gic GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 4 &gic GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+		interrupt-map = <0 0 0 IRQ_INTA &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTB &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTC &gic GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTD &gic GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
 		msi-map = <0x0 &its 0x0 0x10000>;
 		iommu-map = <0x0 &smmu 0x0 0x10000>;
 
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 26a039a028b8..b01a922a9fbf 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -1,4 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/interrupt-controller/irq.h>
+
 #include "juno-clocks.dtsi"
 #include "juno-motherboard.dtsi"
 
@@ -519,11 +521,11 @@
 			 <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
 			 <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 2 &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 3 &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 4 &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTB &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTC &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTD &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
 		msi-parent = <&v2m_0>;
 		status = "disabled";
 		iommu-map-mask = <0x0>;	/* RC has no means to output PCI RID */
diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
index dfb41705a9a9..6776b116e3db 100644
--- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
@@ -115,13 +115,13 @@
 		  <0x02000000    0 0x40000000    0 0x40000000    0 0x20000000
 		   0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
 		bus-range = <0 0xff>;
-		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
 		interrupt-map =
 		      /* addr  pin  ic   icaddr  icintr */
-			<0 0 0  1  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-			 0 0 0  2  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-			 0 0 0  3  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-			 0 0 0  4  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			<0 0 0  IRQ_INTA  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+			 0 0 0  IRQ_INTB  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+			 0 0 0  IRQ_INTC  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+			 0 0 0  IRQ_INTD  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 		msi-parent = <&gicits>;
 		dma-coherent;
 	};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 337919366dc8..662cbf7c6588 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -492,11 +492,11 @@
 				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 			msi-parent = <&msi>;
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
-					<0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
-					<0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
-					<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0000 0 0 IRQ_INTA &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 IRQ_INTB &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 IRQ_INTC &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
+					<0000 0 0 IRQ_INTD &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
 	};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 253cc345f143..9469e1c935c0 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1013,14 +1013,14 @@
 			#interrupt-cells = <1>;
 			interrupts = <0 283 4>;
 			interrupt-names = "msi";
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <0x0 0 0 1
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0x0 0 0 IRQ_INTA
 					 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
-					<0x0 0 0 2
+					<0x0 0 0 IRQ_INTB
 					 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
-					<0x0 0 0 3
+					<0x0 0 0 IRQ_INTC
 					 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
-					<0x0 0 0 4
+					<0x0 0 0 IRQ_INTD
 					 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
 				 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 50ceaa959bdc..179a61e171de 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -741,11 +741,11 @@
 				 0x5ff0000 0x01000000 0 0 0 0xb7ff0000
 				 0 0x10000>;
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4
-					0x0 0 0 2 &mbigen_pcie0 650 4
-					0x0 0 0 3 &mbigen_pcie0 650 4
-					0x0 0 0 4 &mbigen_pcie0 650 4>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0x0 0 0 IRQ_INTA &mbigen_pcie0 650 4
+					0x0 0 0 IRQ_INTB &mbigen_pcie0 650 4
+					0x0 0 0 IRQ_INTC &mbigen_pcie0 650 4
+					0x0 0 0 IRQ_INTD &mbigen_pcie0 650 4>;
 			status = "disabled";
 		};
 
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index c6f81431983e..63e72069d21e 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -867,11 +867,11 @@
 			#interrupt-cells = <1>;
 			interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi";
-			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map =	<0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 2 &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 3 &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 4 &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map =	<0 0 0 IRQ_INTA &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTB &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTC &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTD &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
 
 			clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
 				 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index a97eeb4569c0..8e0a9fa37c82 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -980,11 +980,11 @@
 			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi";
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map = <0 0 0 1 &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-					<0 0 0 2 &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-					<0 0 0 3 &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-					<0 0 0 4 &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTB &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTC &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTD &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
 				 <&gcc GCC_PCIE_0_AUX_CLK>,
 				 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index cede1ad81be2..bb68826bac6f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -242,11 +242,11 @@
 			     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
 			     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
 		interrupt-names = "sys", "legacy", "client";
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie0_intc 0>,
-				<0 0 0 2 &pcie0_intc 1>,
-				<0 0 0 3 &pcie0_intc 2>,
-				<0 0 0 4 &pcie0_intc 3>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &pcie0_intc 0>,
+				<0 0 0 IRQ_INTB &pcie0_intc 1>,
+				<0 0 0 IRQ_INTC &pcie0_intc 2>,
+				<0 0 0 IRQ_INTD &pcie0_intc 3>;
 		linux,pci-domain = <0>;
 		max-link-speed = <1>;
 		msi-map = <0x0 &its 0x0 0x1000>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index b658f2b641e2..8a1a3e5bb11c 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -7,6 +7,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/uniphier-gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/thermal/thermal.h>
 
 / {
@@ -900,11 +901,11 @@
 			#interrupt-cells = <1>;
 			interrupt-names = "dma", "msi";
 			interrupts = <0 224 4>, <0 225 4>;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc 0>,	/* INTA */
-					<0 0 0 2 &pcie_intc 1>,	/* INTB */
-					<0 0 0 3 &pcie_intc 2>,	/* INTC */
-					<0 0 0 4 &pcie_intc 3>;	/* INTD */
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 0>,
+					<0 0 0 IRQ_INTB &pcie_intc 1>,
+					<0 0 0 IRQ_INTC &pcie_intc 2>,
+					<0 0 0 IRQ_INTD &pcie_intc 3>;
 			phy-names = "pcie-phy";
 			phys = <&pcie_phy>;
 
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index d6f6cee4d549..ec20417fbd31 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -7,6 +7,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/uniphier-gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
 	compatible = "socionext,uniphier-pxs3";
@@ -758,11 +759,11 @@
 			#interrupt-cells = <1>;
 			interrupt-names = "dma", "msi";
 			interrupts = <0 224 4>, <0 225 4>;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc 0>,	/* INTA */
-					<0 0 0 2 &pcie_intc 1>,	/* INTB */
-					<0 0 0 3 &pcie_intc 2>,	/* INTC */
-					<0 0 0 4 &pcie_intc 3>;	/* INTD */
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 0>,
+					<0 0 0 IRQ_INTB &pcie_intc 1>,
+					<0 0 0 IRQ_INTC &pcie_intc 2>,
+					<0 0 0 IRQ_INTD &pcie_intc 3>;
 			phy-names = "pcie-phy";
 			phys = <&pcie_phy>;
 
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 9aa67340a4d8..30c9b0b275de 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -12,6 +12,8 @@
  * the License, or (at your option) any later version.
  */
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
 	compatible = "xlnx,zynqmp";
 	#address-cells = <2>;
@@ -462,11 +464,11 @@
 			ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000	/* non-prefetchable memory */
 				  0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
 			bus-range = <0x00 0xff>;
-			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-			interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
-					<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
-					<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
-					<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
+			interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
+			interrupt-map = <0x0 0x0 0x0 IRQ_INTA &pcie_intc 0x1>,
+					<0x0 0x0 0x0 IRQ_INTB &pcie_intc 0x2>,
+					<0x0 0x0 0x0 IRQ_INTC &pcie_intc 0x3>,
+					<0x0 0x0 0x0 IRQ_INTD &pcie_intc 0x4>;
 			pcie_intc: legacy-interrupt-controller {
 				interrupt-controller;
 				#address-cells = <0>;
-- 
2.21.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [PATCH v1 3/7] arm: dts: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 [PATCH v1 0/7] PCI: dt: Remove magic numbers for legacy PCI IRQ interrupts Andrew Murray
  2019-11-04 16:38 ` [PATCH v1 2/7] arm64: dts: Use IRQ flags " Andrew Murray
@ 2019-11-04 16:38 ` " Andrew Murray
  2019-11-05 15:06   ` Linus Walleij
  2019-11-05 17:20   ` Jesper Nilsson
  2019-11-04 16:38 ` [PATCH v1 7/7] dt-bindings: PCI: " Andrew Murray
  2 siblings, 2 replies; 13+ messages in thread
From: Andrew Murray @ 2019-11-04 16:38 UTC (permalink / raw)
  To: Tsahee Zidenberg, Antoine Tenart, Rob Herring, Mark Rutland,
	Jesper Nilsson, Lars Persson, Shawn Guo, Sascha Hauer,
	Linus Walleij, Santosh Shilimkar, Andy Gross
  Cc: devicetree, linux-arm-msm, linux-arm-kernel, NXP Linux Team,
	Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel

Replace magic numbers used to describe legacy PCI IRQ interrupts
with #define.

Signed-off-by: Andrew Murray <andrew.murray@arm.com>
---
 arch/arm/boot/dts/alpine.dtsi              |  6 ++--
 arch/arm/boot/dts/artpec6.dtsi             | 10 +++---
 arch/arm/boot/dts/gemini-dlink-dir-685.dts | 34 ++++++++++----------
 arch/arm/boot/dts/gemini-sl93512r.dts      | 34 ++++++++++----------
 arch/arm/boot/dts/gemini-sq201.dts         | 34 ++++++++++----------
 arch/arm/boot/dts/gemini-wbd111.dts        | 34 ++++++++++----------
 arch/arm/boot/dts/gemini-wbd222.dts        | 34 ++++++++++----------
 arch/arm/boot/dts/imx6qdl.dtsi             | 10 +++---
 arch/arm/boot/dts/imx6sx.dtsi              | 10 +++---
 arch/arm/boot/dts/integratorap.dts         | 36 ++++++++++++----------
 arch/arm/boot/dts/keystone-k2e.dtsi        | 11 ++++---
 arch/arm/boot/dts/keystone.dtsi            | 10 +++---
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 10 +++---
 arch/arm/boot/dts/qcom-ipq4019.dtsi        | 10 +++---
 arch/arm/boot/dts/versatile-pb.dts         | 36 ++++++++++++----------
 15 files changed, 162 insertions(+), 157 deletions(-)

diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
index d3036ea823d1..51d8a7d1e569 100644
--- a/arch/arm/boot/dts/alpine.dtsi
+++ b/arch/arm/boot/dts/alpine.dtsi
@@ -152,10 +152,10 @@
 			#address-cells = <3>;
 			#interrupt-cells = <1>;
 			reg = <0x0 0xfbc00000 0x0 0x100000>;
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			/* Add legacy interrupts for SATA devices only */
-			interrupt-map =	<0x4000 0 0 1 &gic 0 43 4>,
-					<0x4800 0 0 1 &gic 0 44 4>;
+			interrupt-map =	<0x4000 0 0 IRQ_INTA &gic 0 43 4>,
+					<0x4800 0 0 IRQ_INTA &gic 0 44 4>;
 
 			/* 32 bit non prefetchable memory space */
 			ranges = <0x02000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi
index 037157e6c5ee..b2cf3d656ba4 100644
--- a/arch/arm/boot/dts/artpec6.dtsi
+++ b/arch/arm/boot/dts/artpec6.dtsi
@@ -177,11 +177,11 @@
 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "msi";
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 0x7>;
-		interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
-				<0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTB &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTC &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTD &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
 		axis,syscon-pcie = <&syscon>;
 		status = "disabled";
 	};
diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
index e2030ba16512..826022a9949b 100644
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -407,24 +407,24 @@
 
 		pci@50000000 {
 			status = "okay";
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			interrupt-map =
-				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
-				<0x4800 0 0 2 &pci_intc 1>,
-				<0x4800 0 0 3 &pci_intc 2>,
-				<0x4800 0 0 4 &pci_intc 3>,
-				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
-				<0x5000 0 0 2 &pci_intc 2>,
-				<0x5000 0 0 3 &pci_intc 3>,
-				<0x5000 0 0 4 &pci_intc 0>,
-				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
-				<0x5800 0 0 2 &pci_intc 3>,
-				<0x5800 0 0 3 &pci_intc 0>,
-				<0x5800 0 0 4 &pci_intc 1>,
-				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
-				<0x6000 0 0 2 &pci_intc 0>,
-				<0x6000 0 0 3 &pci_intc 1>,
-				<0x6000 0 0 4 &pci_intc 2>;
+				<0x4800 0 0 IRQ_INTA &pci_intc 0>, /* Slot 9 */
+				<0x4800 0 0 IRQ_INTB &pci_intc 1>,
+				<0x4800 0 0 IRQ_INTC &pci_intc 2>,
+				<0x4800 0 0 IRQ_INTD &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTA &pci_intc 1>, /* Slot 10 */
+				<0x5000 0 0 IRQ_INTB &pci_intc 2>,
+				<0x5000 0 0 IRQ_INTC &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTD &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTA &pci_intc 2>, /* Slot 11 */
+				<0x5800 0 0 IRQ_INTB &pci_intc 3>,
+				<0x5800 0 0 IRQ_INTC &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTD &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTA &pci_intc 3>, /* Slot 12 */
+				<0x6000 0 0 IRQ_INTB &pci_intc 0>,
+				<0x6000 0 0 IRQ_INTC &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTD &pci_intc 2>;
 		};
 
 		ethernet@60000000 {
diff --git a/arch/arm/boot/dts/gemini-sl93512r.dts b/arch/arm/boot/dts/gemini-sl93512r.dts
index a98af0351906..e80c59174431 100644
--- a/arch/arm/boot/dts/gemini-sl93512r.dts
+++ b/arch/arm/boot/dts/gemini-sl93512r.dts
@@ -256,24 +256,24 @@
 
 		pci@50000000 {
 			status = "okay";
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			interrupt-map =
-				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
-				<0x4800 0 0 2 &pci_intc 1>,
-				<0x4800 0 0 3 &pci_intc 2>,
-				<0x4800 0 0 4 &pci_intc 3>,
-				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
-				<0x5000 0 0 2 &pci_intc 2>,
-				<0x5000 0 0 3 &pci_intc 3>,
-				<0x5000 0 0 4 &pci_intc 0>,
-				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
-				<0x5800 0 0 2 &pci_intc 3>,
-				<0x5800 0 0 3 &pci_intc 0>,
-				<0x5800 0 0 4 &pci_intc 1>,
-				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
-				<0x6000 0 0 2 &pci_intc 0>,
-				<0x6000 0 0 3 &pci_intc 1>,
-				<0x6000 0 0 4 &pci_intc 2>;
+				<0x4800 0 0 IRQ_INTA &pci_intc 0>, /* Slot 9 */
+				<0x4800 0 0 IRQ_INTB &pci_intc 1>,
+				<0x4800 0 0 IRQ_INTC &pci_intc 2>,
+				<0x4800 0 0 IRQ_INTD &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTA &pci_intc 1>, /* Slot 10 */
+				<0x5000 0 0 IRQ_INTB &pci_intc 2>,
+				<0x5000 0 0 IRQ_INTC &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTD &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTA &pci_intc 2>, /* Slot 11 */
+				<0x5800 0 0 IRQ_INTB &pci_intc 3>,
+				<0x5800 0 0 IRQ_INTC &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTD &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTA &pci_intc 3>, /* Slot 12 */
+				<0x6000 0 0 IRQ_INTB &pci_intc 0>,
+				<0x6000 0 0 IRQ_INTC &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTD &pci_intc 2>;
 		};
 
 		ethernet@60000000 {
diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts
index 239dfacaae4d..95deff80446a 100644
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -252,24 +252,24 @@
 
 		pci@50000000 {
 			status = "okay";
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			interrupt-map =
-				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
-				<0x4800 0 0 2 &pci_intc 1>,
-				<0x4800 0 0 3 &pci_intc 2>,
-				<0x4800 0 0 4 &pci_intc 3>,
-				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
-				<0x5000 0 0 2 &pci_intc 2>,
-				<0x5000 0 0 3 &pci_intc 3>,
-				<0x5000 0 0 4 &pci_intc 0>,
-				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
-				<0x5800 0 0 2 &pci_intc 3>,
-				<0x5800 0 0 3 &pci_intc 0>,
-				<0x5800 0 0 4 &pci_intc 1>,
-				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
-				<0x6000 0 0 2 &pci_intc 0>,
-				<0x6000 0 0 3 &pci_intc 1>,
-				<0x6000 0 0 4 &pci_intc 2>;
+				<0x4800 0 0 IRQ_INTA &pci_intc 0>, /* Slot 9 */
+				<0x4800 0 0 IRQ_INTB &pci_intc 1>,
+				<0x4800 0 0 IRQ_INTC &pci_intc 2>,
+				<0x4800 0 0 IRQ_INTD &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTA &pci_intc 1>, /* Slot 10 */
+				<0x5000 0 0 IRQ_INTB &pci_intc 2>,
+				<0x5000 0 0 IRQ_INTC &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTD &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTA &pci_intc 2>, /* Slot 11 */
+				<0x5800 0 0 IRQ_INTB &pci_intc 3>,
+				<0x5800 0 0 IRQ_INTC &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTD &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTA &pci_intc 3>, /* Slot 12 */
+				<0x6000 0 0 IRQ_INTB &pci_intc 0>,
+				<0x6000 0 0 IRQ_INTC &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTD &pci_intc 2>;
 		};
 
 		ethernet@60000000 {
diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts
index 3a2761dd460f..832b58739d4e 100644
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -140,24 +140,24 @@
 
 		pci@50000000 {
 			status = "okay";
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			interrupt-map =
-				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
-				<0x4800 0 0 2 &pci_intc 1>,
-				<0x4800 0 0 3 &pci_intc 2>,
-				<0x4800 0 0 4 &pci_intc 3>,
-				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
-				<0x5000 0 0 2 &pci_intc 2>,
-				<0x5000 0 0 3 &pci_intc 3>,
-				<0x5000 0 0 4 &pci_intc 0>,
-				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
-				<0x5800 0 0 2 &pci_intc 3>,
-				<0x5800 0 0 3 &pci_intc 0>,
-				<0x5800 0 0 4 &pci_intc 1>,
-				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
-				<0x6000 0 0 2 &pci_intc 0>,
-				<0x6000 0 0 3 &pci_intc 1>,
-				<0x6000 0 0 4 &pci_intc 2>;
+				<0x4800 0 0 IRQ_INTA &pci_intc 0>, /* Slot 9 */
+				<0x4800 0 0 IRQ_INTB &pci_intc 1>,
+				<0x4800 0 0 IRQ_INTC &pci_intc 2>,
+				<0x4800 0 0 IRQ_INTD &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTA &pci_intc 1>, /* Slot 10 */
+				<0x5000 0 0 IRQ_INTB &pci_intc 2>,
+				<0x5000 0 0 IRQ_INTC &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTD &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTA &pci_intc 2>, /* Slot 11 */
+				<0x5800 0 0 IRQ_INTB &pci_intc 3>,
+				<0x5800 0 0 IRQ_INTC &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTD &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTA &pci_intc 3>, /* Slot 12 */
+				<0x6000 0 0 IRQ_INTB &pci_intc 0>,
+				<0x6000 0 0 IRQ_INTC &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTD &pci_intc 2>;
 		};
 
 		ethernet@60000000 {
diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts
index 52b4dbc0c072..19776090a920 100644
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -151,24 +151,24 @@
 
 		pci@50000000 {
 			status = "okay";
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			interrupt-map =
-				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
-				<0x4800 0 0 2 &pci_intc 1>,
-				<0x4800 0 0 3 &pci_intc 2>,
-				<0x4800 0 0 4 &pci_intc 3>,
-				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
-				<0x5000 0 0 2 &pci_intc 2>,
-				<0x5000 0 0 3 &pci_intc 3>,
-				<0x5000 0 0 4 &pci_intc 0>,
-				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
-				<0x5800 0 0 2 &pci_intc 3>,
-				<0x5800 0 0 3 &pci_intc 0>,
-				<0x5800 0 0 4 &pci_intc 1>,
-				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
-				<0x6000 0 0 2 &pci_intc 0>,
-				<0x6000 0 0 3 &pci_intc 1>,
-				<0x6000 0 0 4 &pci_intc 2>;
+				<0x4800 0 0 IRQ_INTA &pci_intc 0>, /* Slot 9 */
+				<0x4800 0 0 IRQ_INTB &pci_intc 1>,
+				<0x4800 0 0 IRQ_INTC &pci_intc 2>,
+				<0x4800 0 0 IRQ_INTD &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTA &pci_intc 1>, /* Slot 10 */
+				<0x5000 0 0 IRQ_INTB &pci_intc 2>,
+				<0x5000 0 0 IRQ_INTC &pci_intc 3>,
+				<0x5000 0 0 IRQ_INTD &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTA &pci_intc 2>, /* Slot 11 */
+				<0x5800 0 0 IRQ_INTB &pci_intc 3>,
+				<0x5800 0 0 IRQ_INTC &pci_intc 0>,
+				<0x5800 0 0 IRQ_INTD &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTA &pci_intc 3>, /* Slot 12 */
+				<0x6000 0 0 IRQ_INTB &pci_intc 0>,
+				<0x6000 0 0 IRQ_INTC &pci_intc 1>,
+				<0x6000 0 0 IRQ_INTD &pci_intc 2>;
 		};
 
 		ethernet@60000000 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index e6b4b8525f98..e3f52e20bc5f 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -282,11 +282,11 @@
 			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi";
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTB &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTC &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTD &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
 				 <&clks IMX6QDL_CLK_LVDS1_GATE>,
 				 <&clks IMX6QDL_CLK_PCIE_REF_125M>;
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 531a52c1e987..5549820dbca4 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1377,11 +1377,11 @@
 			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi";
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTB &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTC &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTD &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clks IMX6SX_CLK_PCIE_AXI>,
 				 <&clks IMX6SX_CLK_LVDS1_OUT>,
 				 <&clks IMX6SX_CLK_PCIE_REF_125M>,
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index 94d2ff9836d0..ea35a90123c6 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -6,6 +6,8 @@
 /dts-v1/;
 /include/ "integrator.dtsi"
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
 	model = "ARM Integrator/AP";
 	compatible = "arm,integrator-ap";
@@ -174,28 +176,28 @@
 			0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
 			0x02000000 0 0x80000000 /* Core module alias memory */
 			0x80000000 0 0x40000000>; /* 1GB @ LB 80000000 */
-		interrupt-map-mask = <0xf800 0 0 0x7>;
+		interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 		interrupt-map = <
 		/* IDSEL 9 */
-		0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
-		0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
-		0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
-		0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
+		0x4800 0 0 IRQ_INTA &pic 13 /* INT A on slot 9 is irq 13 */
+		0x4800 0 0 IRQ_INTB &pic 14 /* INT B on slot 9 is irq 14 */
+		0x4800 0 0 IRQ_INTC &pic 15 /* INT C on slot 9 is irq 15 */
+		0x4800 0 0 IRQ_INTD &pic 16 /* INT D on slot 9 is irq 16 */
 		/* IDSEL 10 */
-		0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
-		0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
-		0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
-		0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
+		0x5000 0 0 IRQ_INTA &pic 14 /* INT A on slot 10 is irq 14 */
+		0x5000 0 0 IRQ_INTB &pic 15 /* INT B on slot 10 is irq 15 */
+		0x5000 0 0 IRQ_INTC &pic 16 /* INT C on slot 10 is irq 16 */
+		0x5000 0 0 IRQ_INTD &pic 13 /* INT D on slot 10 is irq 13 */
 		/* IDSEL 11 */
-		0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
-		0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
-		0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
-		0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */
+		0x5800 0 0 IRQ_INTA &pic 15 /* INT A on slot 11 is irq 15 */
+		0x5800 0 0 IRQ_INTB &pic 16 /* INT B on slot 11 is irq 16 */
+		0x5800 0 0 IRQ_INTC &pic 13 /* INT C on slot 11 is irq 13 */
+		0x5800 0 0 IRQ_INTD &pic 14 /* INT D on slot 11 is irq 14 */
 		/* IDSEL 12 */
-		0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */
-		0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */
-		0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */
-		0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */
+		0x6000 0 0 IRQ_INTA &pic 16 /* INT A on slot 12 is irq 16 */
+		0x6000 0 0 IRQ_INTB &pic 13 /* INT B on slot 12 is irq 13 */
+		0x6000 0 0 IRQ_INTC &pic 14 /* INT C on slot 12 is irq 14 */
+		0x6000 0 0 IRQ_INTD &pic 15 /* INT D on slot 12 is irq 15 */
 		>;
 	};
 
diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 085e7326ea8e..d612aaac3759 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -5,6 +5,7 @@
  * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
  */
 
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/reset/ti-syscon.h>
 
 / {
@@ -153,11 +154,11 @@
 			/* error interrupt */
 			interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
-					<0 0 0 2 &pcie_intc1 1>, /* INT B */
-					<0 0 0 3 &pcie_intc1 2>, /* INT C */
-					<0 0 0 4 &pcie_intc1 3>; /* INT D */
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc1 0>,
+					<0 0 0 IRQ_INTB &pcie_intc1 1>,
+					<0 0 0 IRQ_INTC &pcie_intc1 2>,
+					<0 0 0 IRQ_INTD &pcie_intc1 3>;
 
 			pcie_msi_intc1: msi-interrupt-controller {
 				interrupt-controller;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index c298675a29a5..c7c8f3f58cfb 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -313,11 +313,11 @@
 			/* error interrupt */
 			interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */
-					<0 0 0 2 &pcie_intc0 1>, /* INT B */
-					<0 0 0 3 &pcie_intc0 2>, /* INT C */
-					<0 0 0 4 &pcie_intc0 3>; /* INT D */
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc0 0>,
+					<0 0 0 IRQ_INTB &pcie_intc0 1>,
+					<0 0 0 IRQ_INTC &pcie_intc0 2>,
+					<0 0 0 IRQ_INTD &pcie_intc0 3>;
 
 			pcie_msi_intc0: msi-interrupt-controller {
 				interrupt-controller;
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 8b79b4112ee1..2a80fc9d2c67 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1391,11 +1391,11 @@
 			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi";
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-					<0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-					<0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-					<0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTB &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTC &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTD &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&gcc PCIE_A_CLK>,
 				 <&gcc PCIE_H_CLK>,
 				 <&gcc PCIE_PHY_REF_CLK>;
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 56f51599852d..d95f6bc2705e 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -398,11 +398,11 @@
 			interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi";
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-					<0 0 0 2 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-					<0 0 0 3 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-					<0 0 0 4 &intc 0 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &intc 0 142 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTB &intc 0 143 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTC &intc 0 144 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 IRQ_INTD &intc 0 145 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&gcc GCC_PCIE_AHB_CLK>,
 				 <&gcc GCC_PCIE_AXI_M_CLK>,
 				 <&gcc GCC_PCIE_AXI_S_CLK>;
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 06a0fdf24026..ec91e3b81972 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0
 #include "versatile-ab.dts"
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
 	model = "ARM Versatile PB";
 	compatible = "arm,versatile-pb";
@@ -55,26 +57,26 @@
 				  0x02000000 0 0x50000000 0x50000000 0 0x10000000   /* non-prefetchable memory */
 				  0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
 
-			interrupt-map-mask = <0x1800 0 0 7>;
-			interrupt-map = <0x1800 0 0 1 &sic 28
-					 0x1800 0 0 2 &sic 29
-					 0x1800 0 0 3 &sic 30
-					 0x1800 0 0 4 &sic 27
+			interrupt-map-mask = <0x1800 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0x1800 0 0 IRQ_INTA &sic 28
+					 0x1800 0 0 IRQ_INTB &sic 29
+					 0x1800 0 0 IRQ_INTC &sic 30
+					 0x1800 0 0 IRQ_INTD &sic 27
 
-					 0x1000 0 0 1 &sic 27
-					 0x1000 0 0 2 &sic 28
-					 0x1000 0 0 3 &sic 29
-					 0x1000 0 0 4 &sic 30
+					 0x1000 0 0 IRQ_INTA &sic 27
+					 0x1000 0 0 IRQ_INTB &sic 28
+					 0x1000 0 0 IRQ_INTC &sic 29
+					 0x1000 0 0 IRQ_INTD &sic 30
 
-					 0x0800 0 0 1 &sic 30
-					 0x0800 0 0 2 &sic 27
-					 0x0800 0 0 3 &sic 28
-					 0x0800 0 0 4 &sic 29
+					 0x0800 0 0 IRQ_INTA &sic 30
+					 0x0800 0 0 IRQ_INTB &sic 27
+					 0x0800 0 0 IRQ_INTC &sic 28
+					 0x0800 0 0 IRQ_INTD &sic 29
 
-					 0x0000 0 0 1 &sic 29
-					 0x0000 0 0 2 &sic 30
-					 0x0000 0 0 3 &sic 27
-					 0x0000 0 0 4 &sic 28>;
+					 0x0000 0 0 IRQ_INTA &sic 29
+					 0x0000 0 0 IRQ_INTB &sic 30
+					 0x0000 0 0 IRQ_INTC &sic 27
+					 0x0000 0 0 IRQ_INTD &sic 28>;
 		};
 
 		fpga {
-- 
2.21.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [PATCH v1 7/7] dt-bindings: PCI: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 [PATCH v1 0/7] PCI: dt: Remove magic numbers for legacy PCI IRQ interrupts Andrew Murray
  2019-11-04 16:38 ` [PATCH v1 2/7] arm64: dts: Use IRQ flags " Andrew Murray
  2019-11-04 16:38 ` [PATCH v1 3/7] arm: " Andrew Murray
@ 2019-11-04 16:38 ` " Andrew Murray
  2019-11-05 15:08   ` Linus Walleij
  2019-11-06 23:47   ` Rob Herring
  2 siblings, 2 replies; 13+ messages in thread
From: Andrew Murray @ 2019-11-04 16:38 UTC (permalink / raw)
  To: Bjorn Helgaas, Rob Herring, Mark Rutland, Thomas Petazzoni,
	Ley Foon Tan, Jesper Nilsson, Tom Joseph, Richard Zhu,
	Lucas Stach, Shawn Guo, Sascha Hauer, Zhou Wang, Will Deacon,
	Xiaowei Song, Binghui Wang, Ryder Lee, Karthikeyan Mitran,
	Hou Zhiqiang, David Daney, Jonathan Chocron, Andy Gross,
	Shawn Lin, Heiko Stuebner, Kishon Vijay Abraham I,
	Kunihiko Hayashi, Masahiro Yamada, Linus Walleij, Toan Le,
	Michal Simek, Matthias Brugger
  Cc: devicetree, linux-pci, rfi, linux-arm-kernel, linux-rockchip,
	linux-mediatek, NXP Linux Team, Pengutronix Kernel Team,
	linux-arm-msm, linux-omap, Fabio Estevam, linux-arm-kernel

Replace magic numbers used to describe legacy PCI IRQ interrupts
with #define.

Signed-off-by: Andrew Murray <andrew.murray@arm.com>
---
 .../devicetree/bindings/pci/83xx-512x-pci.txt | 18 ++---
 .../devicetree/bindings/pci/aardvark-pci.txt  | 10 +--
 .../devicetree/bindings/pci/altera-pcie.txt   | 10 +--
 .../bindings/pci/axis,artpec6-pcie.txt        | 10 +--
 .../bindings/pci/cdns,cdns-pcie-host.txt      | 10 +--
 .../bindings/pci/faraday,ftpci100.txt         | 68 +++++++++----------
 .../bindings/pci/fsl,imx6q-pcie.txt           | 10 +--
 .../bindings/pci/hisilicon-pcie.txt           | 20 +++---
 .../bindings/pci/host-generic-pci.txt         | 10 +--
 .../devicetree/bindings/pci/kirin-pcie.txt    | 10 +--
 .../bindings/pci/layerscape-pci.txt           | 10 +--
 .../devicetree/bindings/pci/mediatek-pcie.txt | 40 +++++------
 .../devicetree/bindings/pci/mobiveil-pcie.txt |  8 +--
 .../devicetree/bindings/pci/pci-rcar-gen2.txt |  8 +--
 .../bindings/pci/pci-thunder-pem.txt          | 10 +--
 .../devicetree/bindings/pci/pcie-al.txt       |  4 +-
 .../devicetree/bindings/pci/qcom,pcie.txt     | 20 +++---
 .../bindings/pci/ralink,rt3883-pci.txt        | 18 ++---
 .../bindings/pci/rockchip-pcie-host.txt       | 10 +--
 .../devicetree/bindings/pci/ti-pci.txt        | 10 +--
 .../devicetree/bindings/pci/uniphier-pcie.txt | 10 +--
 .../bindings/pci/v3-v360epc-pci.txt           | 34 +++++-----
 .../devicetree/bindings/pci/versatile.txt     | 40 +++++------
 .../devicetree/bindings/pci/xgene-pci-msi.txt | 10 +--
 .../devicetree/bindings/pci/xgene-pci.txt     | 10 +--
 .../bindings/pci/xilinx-nwl-pcie.txt          | 10 +--
 .../devicetree/bindings/pci/xilinx-pcie.txt   | 20 +++---
 27 files changed, 224 insertions(+), 224 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt b/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
index 3abeecf4983f..cb80b9e49a2b 100644
--- a/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
+++ b/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
@@ -9,19 +9,19 @@ Freescale 83xx and 512x SOCs include the same PCI bridge core.
 
 Example (MPC8313ERDB)
 	pci0: pci@e0008500 {
-		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+		interrupt-map-mask = <0xf800 0x0 0x0 IRQ_INT_ALL>;
 		interrupt-map = <
 				/* IDSEL 0x0E -mini PCI */
-				 0x7000 0x0 0x0 0x1 &ipic 18 0x8
-				 0x7000 0x0 0x0 0x2 &ipic 18 0x8
-				 0x7000 0x0 0x0 0x3 &ipic 18 0x8
-				 0x7000 0x0 0x0 0x4 &ipic 18 0x8
+				 0x7000 0x0 0x0 IRQ_INTA &ipic 18 0x8
+				 0x7000 0x0 0x0 IRQ_INTB &ipic 18 0x8
+				 0x7000 0x0 0x0 IRQ_INTC &ipic 18 0x8
+				 0x7000 0x0 0x0 IRQ_INTD &ipic 18 0x8
 
 				/* IDSEL 0x0F - PCI slot */
-				 0x7800 0x0 0x0 0x1 &ipic 17 0x8
-				 0x7800 0x0 0x0 0x2 &ipic 18 0x8
-				 0x7800 0x0 0x0 0x3 &ipic 17 0x8
-				 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
+				 0x7800 0x0 0x0 IRQ_INTA &ipic 17 0x8
+				 0x7800 0x0 0x0 IRQ_INTB &ipic 18 0x8
+				 0x7800 0x0 0x0 IRQ_INTC &ipic 17 0x8
+				 0x7800 0x0 0x0 IRQ_INTD &ipic 18 0x8>;
 		interrupt-parent = <&ipic>;
 		interrupts = <66 0x8>;
 		bus-range = <0x0 0x0>;
diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt
index 310ef7145c47..ca8fe542edc9 100644
--- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt
+++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt
@@ -43,11 +43,11 @@ Example:
 		msi-parent = <&pcie0>;
 		ranges = <0x82000000 0 0xe8000000   0 0xe8000000 0 0x1000000 /* Port 0 MEM */
 			  0x81000000 0 0xe9000000   0 0xe9000000 0 0x10000>; /* Port 0 IO*/
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie_intc 0>,
-				<0 0 0 2 &pcie_intc 1>,
-				<0 0 0 3 &pcie_intc 2>,
-				<0 0 0 4 &pcie_intc 3>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 0>,
+				<0 0 0 IRQ_INTB &pcie_intc 1>,
+				<0 0 0 IRQ_INTC &pcie_intc 2>,
+				<0 0 0 IRQ_INTD &pcie_intc 3>;
 		pcie_intc: interrupt-controller {
 			interrupt-controller;
 			#interrupt-cells = <1>;
diff --git a/Documentation/devicetree/bindings/pci/altera-pcie.txt b/Documentation/devicetree/bindings/pci/altera-pcie.txt
index 816b244a221e..f9902dca1a03 100644
--- a/Documentation/devicetree/bindings/pci/altera-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/altera-pcie.txt
@@ -40,11 +40,11 @@ Example
 		msi-parent = <&msi_to_gic_gen_0>;
 		#address-cells = <3>;
 		#size-cells = <2>;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie_0 1>,
-			            <0 0 0 2 &pcie_0 2>,
-			            <0 0 0 3 &pcie_0 3>,
-			            <0 0 0 4 &pcie_0 4>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &pcie_0 1>,
+			            <0 0 0 IRQ_INTB &pcie_0 2>,
+			            <0 0 0 IRQ_INTC &pcie_0 3>,
+			            <0 0 0 IRQ_INTD &pcie_0 4>;
 		ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000
 			  0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>;
 	};
diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
index 979dc7b6cfe8..c71dbe94f0eb 100644
--- a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
@@ -41,10 +41,10 @@ Example:
 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "msi";
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 0x7>;
-		interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
-		                <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
-		                <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
-		                <0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+		                <0 0 0 IRQ_INTB &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+		                <0 0 0 IRQ_INTC &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+		                <0 0 0 IRQ_INTD &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
 		axis,syscon-pcie = <&syscon>;
 	};
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt
index 91de69c713a9..67845103c8f0 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt
@@ -52,12 +52,12 @@ pcie@fb000000 {
 
 	#interrupt-cells = <0x1>;
 
-	interrupt-map = <0x0 0x0 0x0  0x1  &gic  0x0 0x0 0x0 14 0x1
-			 0x0 0x0 0x0  0x2  &gic  0x0 0x0 0x0 15 0x1
-			 0x0 0x0 0x0  0x3  &gic  0x0 0x0 0x0 16 0x1
-			 0x0 0x0 0x0  0x4  &gic  0x0 0x0 0x0 17 0x1>;
+	interrupt-map = <0x0 0x0 0x0  IRQ_INTA  &gic  0x0 0x0 0x0 14 0x1
+			 0x0 0x0 0x0  IRQ_INTB  &gic  0x0 0x0 0x0 15 0x1
+			 0x0 0x0 0x0  IRQ_INTC  &gic  0x0 0x0 0x0 16 0x1
+			 0x0 0x0 0x0  IRQ_INTD  &gic  0x0 0x0 0x0 17 0x1>;
 
-	interrupt-map-mask = <0x0 0x0 0x0  0x7>;
+	interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
 
 	msi-parent = <&its_pci>;
 
diff --git a/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt b/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt
index 5f8cb4962f8d..b267d4853773 100644
--- a/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt
+++ b/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt
@@ -61,24 +61,24 @@ variant) interrupts assigns the default interrupt mapping/swizzling has
 typically been like this, doing the swizzling on the interrupt controller side
 rather than in the interconnect:
 
-interrupt-map-mask = <0xf800 0 0 7>;
+interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 interrupt-map =
-	<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
-	<0x4800 0 0 2 &pci_intc 1>,
-	<0x4800 0 0 3 &pci_intc 2>,
-	<0x4800 0 0 4 &pci_intc 3>,
-	<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
-	<0x5000 0 0 2 &pci_intc 2>,
-	<0x5000 0 0 3 &pci_intc 3>,
-	<0x5000 0 0 4 &pci_intc 0>,
-	<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
-	<0x5800 0 0 2 &pci_intc 3>,
-	<0x5800 0 0 3 &pci_intc 0>,
-	<0x5800 0 0 4 &pci_intc 1>,
-	<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
-	<0x6000 0 0 2 &pci_intc 0>,
-	<0x6000 0 0 3 &pci_intc 1>,
-	<0x6000 0 0 4 &pci_intc 2>;
+	<0x4800 0 0 IRQ_INTA &pci_intc 0>, /* Slot 9 */
+	<0x4800 0 0 IRQ_INTB &pci_intc 1>,
+	<0x4800 0 0 IRQ_INTC &pci_intc 2>,
+	<0x4800 0 0 IRQ_INTD &pci_intc 3>,
+	<0x5000 0 0 IRQ_INTA &pci_intc 1>, /* Slot 10 */
+	<0x5000 0 0 IRQ_INTB &pci_intc 2>,
+	<0x5000 0 0 IRQ_INTC &pci_intc 3>,
+	<0x5000 0 0 IRQ_INTD &pci_intc 0>,
+	<0x5800 0 0 IRQ_INTA &pci_intc 2>, /* Slot 11 */
+	<0x5800 0 0 IRQ_INTB &pci_intc 3>,
+	<0x5800 0 0 IRQ_INTC &pci_intc 0>,
+	<0x5800 0 0 IRQ_INTD &pci_intc 1>,
+	<0x6000 0 0 IRQ_INTA &pci_intc 3>, /* Slot 12 */
+	<0x6000 0 0 IRQ_INTB &pci_intc 0>,
+	<0x6000 0 0 IRQ_INTC &pci_intc 1>,
+	<0x6000 0 0 IRQ_INTD &pci_intc 2>;
 
 Example:
 
@@ -108,24 +108,24 @@ pci@50000000 {
 	/* 64MiB at 0x00000000-0x03ffffff */
 	<0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
 
-	interrupt-map-mask = <0xf800 0 0 7>;
+	interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 	interrupt-map =
-		<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
-		<0x4800 0 0 2 &pci_intc 1>,
-		<0x4800 0 0 3 &pci_intc 2>,
-		<0x4800 0 0 4 &pci_intc 3>,
-		<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
-		<0x5000 0 0 2 &pci_intc 2>,
-		<0x5000 0 0 3 &pci_intc 3>,
-		<0x5000 0 0 4 &pci_intc 0>,
-		<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
-		<0x5800 0 0 2 &pci_intc 3>,
-		<0x5800 0 0 3 &pci_intc 0>,
-		<0x5800 0 0 4 &pci_intc 1>,
-		<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
-		<0x6000 0 0 2 &pci_intc 0>,
-		<0x6000 0 0 3 &pci_intc 0>,
-		<0x6000 0 0 4 &pci_intc 0>;
+		<0x4800 0 0 IRQ_INTA &pci_intc 0>, /* Slot 9 */
+		<0x4800 0 0 IRQ_INTB &pci_intc 1>,
+		<0x4800 0 0 IRQ_INTC &pci_intc 2>,
+		<0x4800 0 0 IRQ_INTD &pci_intc 3>,
+		<0x5000 0 0 IRQ_INTA &pci_intc 1>, /* Slot 10 */
+		<0x5000 0 0 IRQ_INTB &pci_intc 2>,
+		<0x5000 0 0 IRQ_INTC &pci_intc 3>,
+		<0x5000 0 0 IRQ_INTD &pci_intc 0>,
+		<0x5800 0 0 IRQ_INTA &pci_intc 2>, /* Slot 11 */
+		<0x5800 0 0 IRQ_INTB &pci_intc 3>,
+		<0x5800 0 0 IRQ_INTC &pci_intc 0>,
+		<0x5800 0 0 IRQ_INTD &pci_intc 1>,
+		<0x6000 0 0 IRQ_INTA &pci_intc 3>, /* Slot 12 */
+		<0x6000 0 0 IRQ_INTB &pci_intc 0>,
+		<0x6000 0 0 IRQ_INTC &pci_intc 0>,
+		<0x6000 0 0 IRQ_INTD &pci_intc 0>;
 	pci_intc: interrupt-controller {
 		interrupt-parent = <&intcon>;
 		interrupt-controller;
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index de4b2baf91e8..dc331885124a 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -77,11 +77,11 @@ Example:
 		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "msi";
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 0x7>;
-		interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-		                <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
-		                <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
-		                <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+		                <0 0 0 IRQ_INTB &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+		                <0 0 0 IRQ_INTC &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+		                <0 0 0 IRQ_INTD &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&clks 144>, <&clks 206>, <&clks 189>;
 		clock-names = "pcie", "pcie_bus", "pcie_phy";
 	};
diff --git a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
index 0dcb87d6554f..3e809c7d9b07 100644
--- a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
@@ -35,11 +35,11 @@ Hip05 Example (note that Hip06 is the same except compatible):
 		num-lanes = <8>;
 		port-id = <1>;
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0xf800 0 0 7>;
-		interrupt-map = <0x0 0 0 1 &mbigen_pcie 1 10
-				 0x0 0 0 2 &mbigen_pcie 2 11
-				 0x0 0 0 3 &mbigen_pcie 3 12
-				 0x0 0 0 4 &mbigen_pcie 4 13>;
+		interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0x0 0 0 IRQ_INTA &mbigen_pcie 1 10
+				 0x0 0 0 IRQ_INTB &mbigen_pcie 2 11
+				 0x0 0 0 IRQ_INTC &mbigen_pcie 3 12
+				 0x0 0 0 IRQ_INTD &mbigen_pcie 4 13>;
 	};
 
 HiSilicon Hip06/Hip07 PCIe host bridge DT (almost-ECAM) description.
@@ -77,9 +77,9 @@ Example:
 		ranges = <0x02000000 0 0xb2000000 0x0 0xb2000000 0 0x5ff0000
 			  0x01000000 0 0 0 0xb7ff0000 0 0x10000>;
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0xf800 0 0 7>;
-		interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4
-				 0x0 0 0 2 &mbigen_pcie0 650 4
-				 0x0 0 0 3 &mbigen_pcie0 650 4
-				 0x0 0 0 4 &mbigen_pcie0 650 4>;
+		interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0x0 0 0 IRQ_INTA &mbigen_pcie0 650 4
+				 0x0 0 0 IRQ_INTB &mbigen_pcie0 650 4
+				 0x0 0 0 IRQ_INTC &mbigen_pcie0 650 4
+				 0x0 0 0 IRQ_INTD &mbigen_pcie0 650 4>;
 	};
diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.txt b/Documentation/devicetree/bindings/pci/host-generic-pci.txt
index 614b594f4e72..51a56ad3f1a9 100644
--- a/Documentation/devicetree/bindings/pci/host-generic-pci.txt
+++ b/Documentation/devicetree/bindings/pci/host-generic-pci.txt
@@ -91,11 +91,11 @@ pci {
     #interrupt-cells = <0x1>;
 
     // PCI_DEVICE(3)  INT#(1)  CONTROLLER(PHANDLE)  CONTROLLER_DATA(3)
-    interrupt-map = <  0x0 0x0 0x0  0x1  &gic  0x0 0x4 0x1
-                     0x800 0x0 0x0  0x1  &gic  0x0 0x5 0x1
-                    0x1000 0x0 0x0  0x1  &gic  0x0 0x6 0x1
-                    0x1800 0x0 0x0  0x1  &gic  0x0 0x7 0x1>;
+    interrupt-map = <  0x0 0x0 0x0 IRQ_INTA  &gic  0x0 0x4 0x1
+                     0x800 0x0 0x0 IRQ_INTA  &gic  0x0 0x5 0x1
+                    0x1000 0x0 0x0 IRQ_INTA  &gic  0x0 0x6 0x1
+                    0x1800 0x0 0x0 IRQ_INTA  &gic  0x0 0x7 0x1>;
 
     // PCI_DEVICE(3)  INT#(1)
-    interrupt-map-mask = <0xf800 0x0 0x0  0x7>;
+    interrupt-map-mask = <0xf800 0x0 0x0 IRQ_MAP_ALL>;
 }
diff --git a/Documentation/devicetree/bindings/pci/kirin-pcie.txt b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
index 6bbe43818ad5..7da640d6578e 100644
--- a/Documentation/devicetree/bindings/pci/kirin-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
@@ -34,11 +34,11 @@ Example based on kirin960:
 		ranges = <0x02000000 0x0 0x00000000 0x0 0xf5000000 0x0 0x2000000>;
 		num-lanes = <1>;
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0xf800 0 0 7>;
-		interrupt-map = <0x0 0 0 1 &gic 0 0 0  282 4>,
-				<0x0 0 0 2 &gic 0 0 0  283 4>,
-				<0x0 0 0 3 &gic 0 0 0  284 4>,
-				<0x0 0 0 4 &gic 0 0 0  285 4>;
+		interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0x0 0 0 IRQ_INTA &gic 0 0 0  282 4>,
+				<0x0 0 0 IRQ_INTB &gic 0 0 0  283 4>,
+				<0x0 0 0 IRQ_INTC &gic 0 0 0  284 4>,
+				<0x0 0 0 IRQ_INTD &gic 0 0 0  285 4>;
 		clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
 			 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
 			 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index e20ceaab9b38..1016e9f8982a 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -56,9 +56,9 @@ Example:
 			  0xc2000000 0x0 0x20000000 0x40 0x20000000 0x0 0x20000000   /* prefetchable memory */
 			  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0000 0 0 1 &gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH>,
-				<0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
-				<0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
-				<0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0000 0 0 IRQ_INTA &gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH>,
+				<0000 0 0 IRQ_INTB &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+				<0000 0 0 IRQ_INTC &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+				<0000 0 0 IRQ_INTD &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 	};
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
index 7468d666763a..00728cdad957 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
@@ -169,11 +169,11 @@ Examples for MT2712:
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
-					<0 0 0 2 &pcie_intc0 1>,
-					<0 0 0 3 &pcie_intc0 2>,
-					<0 0 0 4 &pcie_intc0 3>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc0 0>,
+					<0 0 0 IRQ_INTB &pcie_intc0 1>,
+					<0 0 0 IRQ_INTC &pcie_intc0 2>,
+					<0 0 0 IRQ_INTD &pcie_intc0 3>;
 			pcie_intc0: interrupt-controller {
 				interrupt-controller;
 				#address-cells = <0>;
@@ -187,11 +187,11 @@ Examples for MT2712:
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-					<0 0 0 2 &pcie_intc1 1>,
-					<0 0 0 3 &pcie_intc1 2>,
-					<0 0 0 4 &pcie_intc1 3>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc1 0>,
+					<0 0 0 IRQ_INTB &pcie_intc1 1>,
+					<0 0 0 IRQ_INTC &pcie_intc1 2>,
+					<0 0 0 IRQ_INTD &pcie_intc1 3>;
 			pcie_intc1: interrupt-controller {
 				interrupt-controller;
 				#address-cells = <0>;
@@ -240,11 +240,11 @@ Examples for MT7622:
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
-					<0 0 0 2 &pcie_intc0 1>,
-					<0 0 0 3 &pcie_intc0 2>,
-					<0 0 0 4 &pcie_intc0 3>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc0 0>,
+					<0 0 0 IRQ_INTB &pcie_intc0 1>,
+					<0 0 0 IRQ_INTC &pcie_intc0 2>,
+					<0 0 0 IRQ_INTD &pcie_intc0 3>;
 			pcie_intc0: interrupt-controller {
 				interrupt-controller;
 				#address-cells = <0>;
@@ -258,11 +258,11 @@ Examples for MT7622:
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges;
-			interrupt-map-mask = <0 0 0 7>;
-			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
-					<0 0 0 2 &pcie_intc1 1>,
-					<0 0 0 3 &pcie_intc1 2>,
-					<0 0 0 4 &pcie_intc1 3>;
+			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc1 0>,
+					<0 0 0 IRQ_INTB &pcie_intc1 1>,
+					<0 0 0 IRQ_INTC &pcie_intc1 2>,
+					<0 0 0 IRQ_INTD &pcie_intc1 3>;
 			pcie_intc1: interrupt-controller {
 				interrupt-controller;
 				#address-cells = <0>;
diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
index 64156993e052..03070b3bfda1 100644
--- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
@@ -62,11 +62,11 @@ Example:
 		interrupt-parent = <&gic>;
 		#interrupt-cells = <1>;
 		interrupts = < 0 89 4 >;
-		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
 		interrupt-map = <0 0 0 0 &pci_express 0>,
-				<0 0 0 1 &pci_express 1>,
-				<0 0 0 2 &pci_express 2>,
-				<0 0 0 3 &pci_express 3>;
+				<0 0 0 IRQ_INTA &pci_express 1>,
+				<0 0 0 IRQ_INTB &pci_express 2>,
+				<0 0 0 IRQ_INTC &pci_express 3>;
 		ranges = < 0x83000000 0 0x00000000 0xa8000000 0 0x8000000>;
 
 	};
diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
index b94078f58d8e..7c6a19e0b131 100644
--- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
+++ b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
@@ -56,10 +56,10 @@ Example SoC configuration:
 		#size-cells = <2>;
 		#interrupt-cells = <1>;
 		dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
-		interrupt-map-mask = <0xff00 0 0 0x7>;
-		interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
-				 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
-				 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-map-mask = <0xff00 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0x0000 0 0 IRQ_INTA &gic 0 108 IRQ_TYPE_LEVEL_HIGH
+				 0x0800 0 0 IRQ_INTA &gic 0 108 IRQ_TYPE_LEVEL_HIGH
+				 0x1000 0 0 IRQ_INTB &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
 
 		usb@1,0 {
 			reg = <0x800 0 0 0 0>;
diff --git a/Documentation/devicetree/bindings/pci/pci-thunder-pem.txt b/Documentation/devicetree/bindings/pci/pci-thunder-pem.txt
index f131faea3b7c..edfaedfe8c8c 100644
--- a/Documentation/devicetree/bindings/pci/pci-thunder-pem.txt
+++ b/Documentation/devicetree/bindings/pci/pci-thunder-pem.txt
@@ -35,9 +35,9 @@ Example:
 		 <0x03000000 0x87e0 0xc2f00000 0x87e0 0xc2000000 0x00 0x00100000>; /* mem64 PEM BAR4 */
 
 	#interrupt-cells = <1>;
-	interrupt-map-mask = <0 0 0 7>;
-	interrupt-map = <0 0 0 1 &gic0 0 0 0 24 4>, /* INTA */
-			<0 0 0 2 &gic0 0 0 0 25 4>, /* INTB */
-			<0 0 0 3 &gic0 0 0 0 26 4>, /* INTC */
-			<0 0 0 4 &gic0 0 0 0 27 4>; /* INTD */
+	interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+	interrupt-map = <0 0 0 IRQ_INTA &gic0 0 0 0 24 4>,
+			<0 0 0 IRQ_INTB &gic0 0 0 0 25 4>,
+			<0 0 0 IRQ_INTC &gic0 0 0 0 26 4>,
+			<0 0 0 IRQ_INTD &gic0 0 0 0 27 4>;
     };
diff --git a/Documentation/devicetree/bindings/pci/pcie-al.txt b/Documentation/devicetree/bindings/pci/pcie-al.txt
index 557a5089229d..8bb3d935d3fa 100644
--- a/Documentation/devicetree/bindings/pci/pcie-al.txt
+++ b/Documentation/devicetree/bindings/pci/pcie-al.txt
@@ -40,7 +40,7 @@ Example:
 		#size-cells = <2>;
 		#interrupt-cells = <1>;
 		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-map-mask = <0x00 0 0 7>;
-		interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; /* INTa */
+		interrupt-map-mask = <0x00 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0x0000 0 0 IRQ_INTA &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 		ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0 0x07ff0000>;
 	};
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
index ada80b01bf0c..898599eed2e5 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
@@ -251,11 +251,11 @@
 		interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
 		interrupt-names = "msi";
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 0x7>;
-		interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-				<0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-				<0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-				<0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTB &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTC &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTD &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&gcc PCIE_A_CLK>,
 			 <&gcc PCIE_H_CLK>,
 			 <&gcc PCIE_PHY_CLK>;
@@ -289,11 +289,11 @@
 		interrupts = <GIC_SPI 243 IRQ_TYPE_NONE>;
 		interrupt-names = "msi";
 		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 0 0x7>;
-		interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-				<0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-				<0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-				<0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTB &intc 0 245 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTC &intc 0 247 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 0 IRQ_INTD &intc 0 248 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
 			 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
 			 <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
diff --git a/Documentation/devicetree/bindings/pci/ralink,rt3883-pci.txt b/Documentation/devicetree/bindings/pci/ralink,rt3883-pci.txt
index ffba4f63d71f..09a4a28fb472 100644
--- a/Documentation/devicetree/bindings/pci/ralink,rt3883-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ralink,rt3883-pci.txt
@@ -131,18 +131,18 @@
 				0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 			>;
 
-			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 			interrupt-map = <
 				/* IDSEL 17 */
-				0x8800 0 0 1 &pciintc 18
-				0x8800 0 0 2 &pciintc 18
-				0x8800 0 0 3 &pciintc 18
-				0x8800 0 0 4 &pciintc 18
+				0x8800 0 0 IRQ_INTA &pciintc 18
+				0x8800 0 0 IRQ_INTB &pciintc 18
+				0x8800 0 0 IRQ_INTC &pciintc 18
+				0x8800 0 0 IRQ_INTD &pciintc 18
 				/* IDSEL 18 */
-				0x9000 0 0 1 &pciintc 19
-				0x9000 0 0 2 &pciintc 19
-				0x9000 0 0 3 &pciintc 19
-				0x9000 0 0 4 &pciintc 19
+				0x9000 0 0 IRQ_INTA &pciintc 19
+				0x9000 0 0 IRQ_INTB &pciintc 19
+				0x9000 0 0 IRQ_INTC &pciintc 19
+				0x9000 0 0 IRQ_INTD &pciintc 19
 			>;
 
 			pci-bridge@1 {
diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt
index af34c65773fd..4538d18b4c3c 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt
+++ b/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt
@@ -112,11 +112,11 @@ pcie0: pcie@f8000000 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_clkreq>;
 	#interrupt-cells = <1>;
-	interrupt-map-mask = <0 0 0 7>;
-	interrupt-map = <0 0 0 1 &pcie0_intc 0>,
-			<0 0 0 2 &pcie0_intc 1>,
-			<0 0 0 3 &pcie0_intc 2>,
-			<0 0 0 4 &pcie0_intc 3>;
+	interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+	interrupt-map = <0 0 0 IRQ_INTA &pcie0_intc 0>,
+			<0 0 0 IRQ_INTB &pcie0_intc 1>,
+			<0 0 0 IRQ_INTC &pcie0_intc 2>,
+			<0 0 0 IRQ_INTD &pcie0_intc 3>;
 	pcie0_intc: interrupt-controller {
 		interrupt-controller;
 		#address-cells = <0>;
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index d5cbfe6b0d89..795b09755977 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -88,11 +88,11 @@ axi {
 		ti,hwmods = "pcie1";
 		phys = <&pcie1_phy>;
 		phy-names = "pcie-phy0";
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie_intc 1>,
-				<0 0 0 2 &pcie_intc 2>,
-				<0 0 0 3 &pcie_intc 3>,
-				<0 0 0 4 &pcie_intc 4>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 1>,
+				<0 0 0 IRQ_INTB &pcie_intc 2>,
+				<0 0 0 IRQ_INTC &pcie_intc 3>,
+				<0 0 0 IRQ_INTD &pcie_intc 4>;
 		pcie_intc: interrupt-controller {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt
index 1fa2c5906d4d..b5416798a638 100644
--- a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt
@@ -66,11 +66,11 @@ Example:
 		#interrupt-cells = <1>;
 		interrupt-names = "dma", "msi";
 		interrupts = <0 224 4>, <0 225 4>;
-		interrupt-map-mask = <0 0 0  7>;
-		interrupt-map = <0 0 0  1  &pcie_intc 0>,	/* INTA */
-				<0 0 0  2  &pcie_intc 1>,	/* INTB */
-				<0 0 0  3  &pcie_intc 2>,	/* INTC */
-				<0 0 0  4  &pcie_intc 3>;	/* INTD */
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0  IRQ_INTA  &pcie_intc 0>,
+				<0 0 0  IRQ_INTB  &pcie_intc 1>,
+				<0 0 0  IRQ_INTC  &pcie_intc 2>,
+				<0 0 0  IRQ_INTD  &pcie_intc 3>;
 
 		pcie_intc: legacy-interrupt-controller {
 			interrupt-controller;
diff --git a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
index 11063293f761..bfa37aa4933d 100644
--- a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
+++ b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
@@ -50,27 +50,27 @@ pci: pciv3@62000000 {
 		0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
 		0x02000000 0 0x80000000 /* Core module alias memory */
 		0x80000000 0 0x40000000>; /* 1GB @ LB 80000000 */
-	interrupt-map-mask = <0xf800 0 0 0x7>;
+	interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
 	interrupt-map = <
 	/* IDSEL 9 */
-	0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
-	0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
-	0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
-	0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
+	0x4800 0 0 IRQ_INTA &pic 13 /* INT A on slot 9 is irq 13 */
+	0x4800 0 0 IRQ_INTB &pic 14 /* INT B on slot 9 is irq 14 */
+	0x4800 0 0 IRQ_INTC &pic 15 /* INT C on slot 9 is irq 15 */
+	0x4800 0 0 IRQ_INTD &pic 16 /* INT D on slot 9 is irq 16 */
 	/* IDSEL 10 */
-	0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
-	0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
-	0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
-	0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
+	0x5000 0 0 IRQ_INTA &pic 14 /* INT A on slot 10 is irq 14 */
+	0x5000 0 0 IRQ_INTB &pic 15 /* INT B on slot 10 is irq 15 */
+	0x5000 0 0 IRQ_INTC &pic 16 /* INT C on slot 10 is irq 16 */
+	0x5000 0 0 IRQ_INTD &pic 13 /* INT D on slot 10 is irq 13 */
 	/* IDSEL 11 */
-	0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
-	0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
-	0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
-	0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */
+	0x5800 0 0 IRQ_INTA &pic 15 /* INT A on slot 11 is irq 15 */
+	0x5800 0 0 IRQ_INTB &pic 16 /* INT B on slot 11 is irq 16 */
+	0x5800 0 0 IRQ_INTC &pic 13 /* INT C on slot 11 is irq 13 */
+	0x5800 0 0 IRQ_INTD &pic 14 /* INT D on slot 11 is irq 14 */
 	/* IDSEL 12 */
-	0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */
-	0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */
-	0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */
-	0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */
+	0x6000 0 0 IRQ_INTA &pic 16 /* INT A on slot 12 is irq 16 */
+	0x6000 0 0 IRQ_INTB &pic 13 /* INT B on slot 12 is irq 13 */
+	0x6000 0 0 IRQ_INTC &pic 14 /* INT C on slot 12 is irq 14 */
+	0x6000 0 0 IRQ_INTD &pic 15 /* INT D on slot 12 is irq 15 */
 	>;
 };
diff --git a/Documentation/devicetree/bindings/pci/versatile.txt b/Documentation/devicetree/bindings/pci/versatile.txt
index 0a702b13d2ac..a02c7b9683ac 100644
--- a/Documentation/devicetree/bindings/pci/versatile.txt
+++ b/Documentation/devicetree/bindings/pci/versatile.txt
@@ -36,24 +36,24 @@ pci-controller@10001000 {
 		  0x02000000 0 0x50000000 0x50000000 0 0x10000000   /* non-prefetchable memory */
 		  0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
 
-	interrupt-map-mask = <0x1800 0 0 7>;
-	interrupt-map = <0x1800 0 0 1 &sic 28
-			 0x1800 0 0 2 &sic 29
-			 0x1800 0 0 3 &sic 30
-			 0x1800 0 0 4 &sic 27
-
-			 0x1000 0 0 1 &sic 27
-			 0x1000 0 0 2 &sic 28
-			 0x1000 0 0 3 &sic 29
-			 0x1000 0 0 4 &sic 30
-
-			 0x0800 0 0 1 &sic 30
-			 0x0800 0 0 2 &sic 27
-			 0x0800 0 0 3 &sic 28
-			 0x0800 0 0 4 &sic 29
-
-			 0x0000 0 0 1 &sic 29
-			 0x0000 0 0 2 &sic 30
-			 0x0000 0 0 3 &sic 27
-			 0x0000 0 0 4 &sic 28>;
+	interrupt-map-mask = <0x1800 0 0 IRQ_INT_ALL>;
+	interrupt-map = <0x1800 0 0 IRQ_INTA &sic 28
+			 0x1800 0 0 IRQ_INTB &sic 29
+			 0x1800 0 0 IRQ_INTC &sic 30
+			 0x1800 0 0 IRQ_INTD &sic 27
+
+			 0x1000 0 0 IRQ_INTA &sic 27
+			 0x1000 0 0 IRQ_INTB &sic 28
+			 0x1000 0 0 IRQ_INTC &sic 29
+			 0x1000 0 0 IRQ_INTD &sic 30
+
+			 0x0800 0 0 IRQ_INTA &sic 30
+			 0x0800 0 0 IRQ_INTB &sic 27
+			 0x0800 0 0 IRQ_INTC &sic 28
+			 0x0800 0 0 IRQ_INTD &sic 29
+
+			 0x0000 0 0 IRQ_INTA &sic 29
+			 0x0000 0 0 IRQ_INTB &sic 30
+			 0x0000 0 0 IRQ_INTC &sic 27
+			 0x0000 0 0 IRQ_INTD &sic 28>;
 };
diff --git a/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt b/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt
index 85d9b95234f7..0e84e6621b4a 100644
--- a/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt
+++ b/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt
@@ -57,11 +57,11 @@ SoC DTSI:
 			  0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
 		dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
 			      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
-		interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-		interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
-				 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
-				 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
-				 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
+		interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
+		interrupt-map = <0x0 0x0 0x0 IRQ_INTA &gic 0x0 0xc2 0x1
+				 0x0 0x0 0x0 IRQ_INTB &gic 0x0 0xc3 0x1
+				 0x0 0x0 0x0 IRQ_INTC &gic 0x0 0xc4 0x1
+				 0x0 0x0 0x0 IRQ_INTD &gic 0x0 0xc5 0x1>;
 		dma-coherent;
 		clocks = <&pcie0clk 0>;
 		msi-parent= <&msi>;
diff --git a/Documentation/devicetree/bindings/pci/xgene-pci.txt b/Documentation/devicetree/bindings/pci/xgene-pci.txt
index 92490330dc1c..0f0e3eb64101 100644
--- a/Documentation/devicetree/bindings/pci/xgene-pci.txt
+++ b/Documentation/devicetree/bindings/pci/xgene-pci.txt
@@ -39,11 +39,11 @@ Example:
 			  0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
 		dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
 			      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
-		interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-		interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
-				 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
-				 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
-				 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
+		interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
+		interrupt-map = <0x0 0x0 0x0 IRQ_INTA &gic 0x0 0xc2 0x1
+				 0x0 0x0 0x0 IRQ_INTB &gic 0x0 0xc3 0x1
+				 0x0 0x0 0x0 IRQ_INTC &gic 0x0 0xc4 0x1
+				 0x0 0x0 0x0 IRQ_INTD &gic 0x0 0xc5 0x1>;
 		dma-coherent;
 		clocks = <&pcie0clk 0>;
 	};
diff --git a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt
index 01bf7fdf4c19..5964fdf752bc 100644
--- a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt
@@ -47,11 +47,11 @@ nwl_pcie: pcie@fd0e0000 {
 	interrupt-parent = <&gic>;
 	interrupts = <0 114 4>, <0 115 4>, <0 116 4>, <0 117 4>, <0 118 4>;
 	interrupt-names = "msi0", "msi1", "intx", "dummy", "misc";
-	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-	interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
-			<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
-			<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
-			<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
+	interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
+	interrupt-map = <0x0 0x0 0x0 IRQ_INTA &pcie_intc 0x1>,
+			<0x0 0x0 0x0 IRQ_INTB &pcie_intc 0x2>,
+			<0x0 0x0 0x0 IRQ_INTC &pcie_intc 0x3>,
+			<0x0 0x0 0x0 IRQ_INTD &pcie_intc 0x4>;
 
 	msi-parent = <&nwl_pcie>;
 	reg = <0x0 0xfd0e0000 0x0 0x1000>,
diff --git a/Documentation/devicetree/bindings/pci/xilinx-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-pcie.txt
index fd57a81180a4..82b7d07bda51 100644
--- a/Documentation/devicetree/bindings/pci/xilinx-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/xilinx-pcie.txt
@@ -47,11 +47,11 @@ Zynq:
 		reg = < 0x50000000 0x1000000 >;
 		device_type = "pci";
 		interrupts = < 0 52 4 >;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie_intc 1>,
-				<0 0 0 2 &pcie_intc 2>,
-				<0 0 0 3 &pcie_intc 3>,
-				<0 0 0 4 &pcie_intc 4>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 1>,
+				<0 0 0 IRQ_INTB &pcie_intc 2>,
+				<0 0 0 IRQ_INTC &pcie_intc 3>,
+				<0 0 0 IRQ_INTD &pcie_intc 4>;
 		ranges = < 0x02000000 0 0x60000000 0x60000000 0 0x10000000 >;
 
 		pcie_intc: interrupt-controller {
@@ -72,11 +72,11 @@ Microblaze:
 		device_type = "pci";
 		interrupt-parent = <&microblaze_0_intc>;
 		interrupts = <1 2>;
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pcie_intc 1>,
-				<0 0 0 2 &pcie_intc 2>,
-				<0 0 0 3 &pcie_intc 3>,
-				<0 0 0 4 &pcie_intc 4>;
+		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
+		interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 1>,
+				<0 0 0 IRQ_INTB &pcie_intc 2>,
+				<0 0 0 IRQ_INTC &pcie_intc 3>,
+				<0 0 0 IRQ_INTD &pcie_intc 4>;
 		ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x10000000>;
 
 		pcie_intc: interrupt-controller {
-- 
2.21.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 3/7] arm: dts: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 ` [PATCH v1 3/7] arm: " Andrew Murray
@ 2019-11-05 15:06   ` Linus Walleij
  2019-11-05 17:20   ` Jesper Nilsson
  1 sibling, 0 replies; 13+ messages in thread
From: Linus Walleij @ 2019-11-05 15:06 UTC (permalink / raw)
  To: Andrew Murray
  Cc: Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Jesper Nilsson, Antoine Tenart, Fabio Estevam, Sascha Hauer,
	Andy Gross, linux-arm-kernel, Rob Herring, Lars Persson,
	Pengutronix Kernel Team, Santosh Shilimkar, MSM, NXP Linux Team,
	Shawn Guo, Linux ARM, Tsahee Zidenberg

On Mon, Nov 4, 2019 at 5:39 PM Andrew Murray <andrew.murray@arm.com> wrote:

> Replace magic numbers used to describe legacy PCI IRQ interrupts
> with #define.
>
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Thanks for just changing them all in one patch, it is swift and elegant
patching.

Yours,
Linus Walleij

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 7/7] dt-bindings: PCI: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 ` [PATCH v1 7/7] dt-bindings: PCI: " Andrew Murray
@ 2019-11-05 15:08   ` Linus Walleij
  2019-11-05 15:16     ` Andrew Murray
  2019-11-06 23:47   ` Rob Herring
  1 sibling, 1 reply; 13+ messages in thread
From: Linus Walleij @ 2019-11-05 15:08 UTC (permalink / raw)
  To: Andrew Murray
  Cc: Mark Rutland, Heiko Stuebner, Karthikeyan Mitran, David Daney,
	linux-pci, Shawn Lin, Binghui Wang, Michal Simek,
	Masahiro Yamada, Thomas Petazzoni, Jonathan Chocron, Toan Le,
	Will Deacon, Jesper Nilsson, Ryder Lee, Kunihiko Hayashi,
	Fabio Estevam, Tom Joseph, linux-arm-kernel,
	Kishon Vijay Abraham I, open list:ARM/Rockchip SoC...,
	Andy Gross, Matthias Brugger, NXP Linux Team, Xiaowei Song,
	Hou Zhiqiang,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Richard Zhu, MSM, Sascha Hauer, Rob Herring,
	moderated list:ARM/Mediatek SoC support, Bjorn Helgaas,
	Linux-OMAP, Linux ARM, rfi, Zhou Wang, Pengutronix Kernel Team,
	Ley Foon Tan, Shawn Guo, Lucas Stach

Hi Andrew,

thanks for your patch!

On Mon, Nov 4, 2019 at 5:39 PM Andrew Murray <andrew.murray@arm.com> wrote:

> Replace magic numbers used to describe legacy PCI IRQ interrupts
> with #define.
>
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>

When I add examples I usually make sure that above the examples
are the appropriate #include files, this is becoming more important
as we convert to yaml, then you need the right includes because the
examples will get compiled.

With that taken into account:
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 7/7] dt-bindings: PCI: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-05 15:08   ` Linus Walleij
@ 2019-11-05 15:16     ` Andrew Murray
  2019-11-06 23:47       ` Rob Herring
  0 siblings, 1 reply; 13+ messages in thread
From: Andrew Murray @ 2019-11-05 15:16 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Mark Rutland, Heiko Stuebner, Karthikeyan Mitran, David Daney,
	linux-pci, Shawn Lin, Binghui Wang, Michal Simek,
	Masahiro Yamada, Thomas Petazzoni, Jonathan Chocron, Toan Le,
	Will Deacon, Jesper Nilsson, Ryder Lee, Kunihiko Hayashi,
	Fabio Estevam, Tom Joseph, linux-arm-kernel,
	Kishon Vijay Abraham I, open list:ARM/Rockchip SoC...,
	Andy Gross, Matthias Brugger, NXP Linux Team, Xiaowei Song,
	Hou Zhiqiang,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Richard Zhu, MSM, Sascha Hauer, Rob Herring,
	moderated list:ARM/Mediatek SoC support, Bjorn Helgaas,
	Linux-OMAP, Linux ARM, rfi, Zhou Wang, Pengutronix Kernel Team,
	Ley Foon Tan, Shawn Guo, Lucas Stach

On Tue, Nov 05, 2019 at 04:08:29PM +0100, Linus Walleij wrote:
> Hi Andrew,
> 
> thanks for your patch!

Thanks for the review.

> 
> On Mon, Nov 4, 2019 at 5:39 PM Andrew Murray <andrew.murray@arm.com> wrote:
> 
> > Replace magic numbers used to describe legacy PCI IRQ interrupts
> > with #define.
> >
> > Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> 
> When I add examples I usually make sure that above the examples
> are the appropriate #include files, this is becoming more important
> as we convert to yaml, then you need the right includes because the
> examples will get compiled.

OK thanks - I can see other files in Documentation that take this approach
I'll update this patch on my respin.

Thanks,

Andrew Murray

> 
> With that taken into account:
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> 
> Yours,
> Linus Walleij

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 3/7] arm: dts: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 ` [PATCH v1 3/7] arm: " Andrew Murray
  2019-11-05 15:06   ` Linus Walleij
@ 2019-11-05 17:20   ` Jesper Nilsson
  1 sibling, 0 replies; 13+ messages in thread
From: Jesper Nilsson @ 2019-11-05 17:20 UTC (permalink / raw)
  To: Andrew Murray
  Cc: Mark Rutland, devicetree, Antoine Tenart, Fabio Estevam,
	Sascha Hauer, Santosh Shilimkar, Andy Gross, linux-arm-kernel,
	Jesper Nilsson, Rob Herring, NXP Linux Team,
	Pengutronix Kernel Team, Lars Persson, linux-arm-msm, Shawn Guo,
	Linus Walleij, linux-arm-kernel, Tsahee Zidenberg

On Mon, Nov 04, 2019 at 04:38:17PM +0000, Andrew Murray wrote:
> Replace magic numbers used to describe legacy PCI IRQ interrupts
> with #define.

Looks good,

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> ---
>  arch/arm/boot/dts/alpine.dtsi              |  6 ++--
>  arch/arm/boot/dts/artpec6.dtsi             | 10 +++---
>  arch/arm/boot/dts/gemini-dlink-dir-685.dts | 34 ++++++++++----------
>  arch/arm/boot/dts/gemini-sl93512r.dts      | 34 ++++++++++----------
>  arch/arm/boot/dts/gemini-sq201.dts         | 34 ++++++++++----------
>  arch/arm/boot/dts/gemini-wbd111.dts        | 34 ++++++++++----------
>  arch/arm/boot/dts/gemini-wbd222.dts        | 34 ++++++++++----------
>  arch/arm/boot/dts/imx6qdl.dtsi             | 10 +++---
>  arch/arm/boot/dts/imx6sx.dtsi              | 10 +++---
>  arch/arm/boot/dts/integratorap.dts         | 36 ++++++++++++----------
>  arch/arm/boot/dts/keystone-k2e.dtsi        | 11 ++++---
>  arch/arm/boot/dts/keystone.dtsi            | 10 +++---
>  arch/arm/boot/dts/qcom-apq8064.dtsi        | 10 +++---
>  arch/arm/boot/dts/qcom-ipq4019.dtsi        | 10 +++---
>  arch/arm/boot/dts/versatile-pb.dts         | 36 ++++++++++++----------
>  15 files changed, 162 insertions(+), 157 deletions(-)

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 2/7] arm64: dts: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 ` [PATCH v1 2/7] arm64: dts: Use IRQ flags " Andrew Murray
@ 2019-11-06 10:03   ` Liviu Dudau
  2019-11-08 14:34   ` Heiko Stuebner
  2019-11-09  6:03   ` Wei Xu
  2 siblings, 0 replies; 13+ messages in thread
From: Liviu Dudau @ 2019-11-06 10:03 UTC (permalink / raw)
  To: Andrew Murray
  Cc: Mark Rutland, Heiko Stuebner, devicetree, Masahiro Yamada,
	Lorenzo Pieralisi, Michal Simek, Wei Xu, linux-rockchip,
	Andy Gross, Tsahee Zidenberg, Tom Lendacky, Antoine Tenart,
	linux-arm-msm, Robert Richter, Rob Herring, Jayachandran C,
	linux-arm-kernel, Brijesh Singh, Li Yang, Suravee Suthikulpanit,
	Sudeep Holla, Shawn Guo

On Mon, Nov 04, 2019 at 04:38:16PM +0000, Andrew Murray wrote:
> Replace magic numbers used to describe legacy PCI IRQ interrupts
> with #define.
> 
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> ---
>  arch/arm64/boot/dts/al/alpine-v2.dtsi            |  6 +++---
>  arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts |  2 +-
>  arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts |  2 +-
>  arch/arm64/boot/dts/amd/amd-overdrive.dts        |  2 +-
>  arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi     | 12 +++++++-----
>  arch/arm64/boot/dts/amd/husky.dts                |  2 +-
>  arch/arm64/boot/dts/arm/fvp-base-revc.dts        | 10 +++++-----
>  arch/arm64/boot/dts/arm/juno-base.dtsi           | 12 +++++++-----
>  arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi    | 10 +++++-----
>  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi   | 10 +++++-----
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi        | 10 +++++-----
>  arch/arm64/boot/dts/hisilicon/hip06.dtsi         | 10 +++++-----
>  arch/arm64/boot/dts/qcom/msm8998.dtsi            | 10 +++++-----
>  arch/arm64/boot/dts/qcom/qcs404.dtsi             | 10 +++++-----
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi         | 10 +++++-----
>  arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 11 ++++++-----
>  arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 11 ++++++-----
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi           | 12 +++++++-----
>  18 files changed, 80 insertions(+), 72 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/al/alpine-v2.dtsi b/arch/arm64/boot/dts/al/alpine-v2.dtsi
> index d5e7e2bb4e6c..35a540090026 100644
> --- a/arch/arm64/boot/dts/al/alpine-v2.dtsi
> +++ b/arch/arm64/boot/dts/al/alpine-v2.dtsi
> @@ -132,10 +132,10 @@
>  			#address-cells = <3>;
>  			#interrupt-cells = <1>;
>  			reg = <0x0 0xfbc00000 0x0 0x100000>;
> -			interrupt-map-mask = <0xf800 0 0 7>;
> +			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
>  			/* add legacy interrupts for SATA only */
> -			interrupt-map = <0x4000 0 0 1 &gic 0 53 4>,
> -					<0x4800 0 0 1 &gic 0 54 4>;
> +			interrupt-map = <0x4000 0 0 IRQ_INTA &gic 0 53 4>,
> +					<0x4800 0 0 IRQ_INTA &gic 0 54 4>;
>  			/* 32 bit non prefetchable memory space */
>  			ranges = <0x2000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
>  			bus-range = <0x00 0x00>;
> diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
> index 8e341be9a399..d4a8d3a5eebb 100644
> --- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
> +++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
> @@ -8,7 +8,7 @@
>  
>  /dts-v1/;
>  
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>  
>  / {
>  	model = "AMD Seattle (Rev.B0) Development Board (Overdrive)";
> diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
> index 92cef05c6b74..e55254e714f2 100644
> --- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
> +++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
> @@ -8,7 +8,7 @@
>  
>  /dts-v1/;
>  
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>  
>  / {
>  	model = "AMD Seattle (Rev.B1) Development Board (Overdrive)";
> diff --git a/arch/arm64/boot/dts/amd/amd-overdrive.dts b/arch/arm64/boot/dts/amd/amd-overdrive.dts
> index 41b3a6c0993d..4e09c9a2ceda 100644
> --- a/arch/arm64/boot/dts/amd/amd-overdrive.dts
> +++ b/arch/arm64/boot/dts/amd/amd-overdrive.dts
> @@ -7,7 +7,7 @@
>  
>  /dts-v1/;
>  
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>  
>  / {
>  	model = "AMD Seattle Development Board (Overdrive)";
> diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
> index b664e7af74eb..efc6f42f3bd1 100644
> --- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
> +++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
> @@ -5,6 +5,8 @@
>   * Copyright (C) 2014 Advanced Micro Devices, Inc.
>   */
>  
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
>  / {
>  	compatible = "amd,seattle";
>  	interrupt-parent = <&gic0>;
> @@ -213,12 +215,12 @@
>  			msi-parent = <&v2m0>;
>  			reg = <0 0xf0000000 0 0x10000000>;
>  
> -			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
> +			interrupt-map-mask = <0xf800 0x0 0x0 IRQ_INT_ALL>;
>  			interrupt-map =
> -				<0x1000 0x0 0x0 0x1 &gic0 0x0 0x0 0x0 0x120 0x1>,
> -				<0x1000 0x0 0x0 0x2 &gic0 0x0 0x0 0x0 0x121 0x1>,
> -				<0x1000 0x0 0x0 0x3 &gic0 0x0 0x0 0x0 0x122 0x1>,
> -				<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
> +				<0x1000 0x0 0x0 IRQ_INTA &gic0 0x0 0x0 0x0 0x120 0x1>,
> +				<0x1000 0x0 0x0 IRQ_INTB &gic0 0x0 0x0 0x0 0x121 0x1>,
> +				<0x1000 0x0 0x0 IRQ_INTC &gic0 0x0 0x0 0x0 0x122 0x1>,
> +				<0x1000 0x0 0x0 IRQ_INTD &gic0 0x0 0x0 0x0 0x123 0x1>;
>  
>  			dma-coherent;
>  			dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
> diff --git a/arch/arm64/boot/dts/amd/husky.dts b/arch/arm64/boot/dts/amd/husky.dts
> index 7acde34772cb..5463e89b2811 100644
> --- a/arch/arm64/boot/dts/amd/husky.dts
> +++ b/arch/arm64/boot/dts/amd/husky.dts
> @@ -8,7 +8,7 @@
>  
>  /dts-v1/;
>  
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>  
>  / {
>  	model = "Linaro 96Boards Enterprise Edition Server (Husky) Board";
> diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> index 62ab0d54ff71..8352c3ad43ab 100644
> --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> @@ -161,11 +161,11 @@
>  		bus-range = <0x0 0x1>;
>  		reg = <0x0 0x40000000 0x0 0x10000000>;
>  		ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>;
> -		interrupt-map = <0 0 0 1 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 2 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 3 &gic GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 4 &gic GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> -		interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> +		interrupt-map = <0 0 0 IRQ_INTA &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTB &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTC &gic GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTD &gic GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
>  		msi-map = <0x0 &its 0x0 0x10000>;
>  		iommu-map = <0x0 &smmu 0x0 0x10000>;
>  
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 26a039a028b8..b01a922a9fbf 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -1,4 +1,6 @@
>  // SPDX-License-Identifier: GPL-2.0
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
>  #include "juno-clocks.dtsi"
>  #include "juno-motherboard.dtsi"
>  
> @@ -519,11 +521,11 @@
>  			 <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
>  			 <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
>  		#interrupt-cells = <1>;
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 2 &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 3 &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 4 &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +		interrupt-map = <0 0 0 IRQ_INTA &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTB &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTC &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTD &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
>  		msi-parent = <&v2m_0>;
>  		status = "disabled";
>  		iommu-map-mask = <0x0>;	/* RC has no means to output PCI RID */

For the Juno and FVP changes:

Acked-by: Liviu Dudau <liviu.dudau@arm.com>

Best regards,
Liviu

> diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
> index dfb41705a9a9..6776b116e3db 100644
> --- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
> +++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
> @@ -115,13 +115,13 @@
>  		  <0x02000000    0 0x40000000    0 0x40000000    0 0x20000000
>  		   0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
>  		bus-range = <0 0xff>;
> -		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
>  		interrupt-map =
>  		      /* addr  pin  ic   icaddr  icintr */
> -			<0 0 0  1  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
> -			 0 0 0  2  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
> -			 0 0 0  3  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
> -			 0 0 0  4  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> +			<0 0 0  IRQ_INTA  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
> +			 0 0 0  IRQ_INTB  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
> +			 0 0 0  IRQ_INTC  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
> +			 0 0 0  IRQ_INTD  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
>  		msi-parent = <&gicits>;
>  		dma-coherent;
>  	};
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index 337919366dc8..662cbf7c6588 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -492,11 +492,11 @@
>  				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
>  			msi-parent = <&msi>;
>  			#interrupt-cells = <1>;
> -			interrupt-map-mask = <0 0 0 7>;
> -			interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
> -					<0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
> -					<0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
> -					<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0000 0 0 IRQ_INTA &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
> +					<0000 0 0 IRQ_INTB &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
> +					<0000 0 0 IRQ_INTC &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
> +					<0000 0 0 IRQ_INTD &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
>  			status = "disabled";
>  		};
>  	};
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 253cc345f143..9469e1c935c0 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -1013,14 +1013,14 @@
>  			#interrupt-cells = <1>;
>  			interrupts = <0 283 4>;
>  			interrupt-names = "msi";
> -			interrupt-map-mask = <0xf800 0 0 7>;
> -			interrupt-map = <0x0 0 0 1
> +			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0x0 0 0 IRQ_INTA
>  					 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
> -					<0x0 0 0 2
> +					<0x0 0 0 IRQ_INTB
>  					 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
> -					<0x0 0 0 3
> +					<0x0 0 0 IRQ_INTC
>  					 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
> -					<0x0 0 0 4
> +					<0x0 0 0 IRQ_INTD
>  					 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
>  				 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
> diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
> index 50ceaa959bdc..179a61e171de 100644
> --- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
> @@ -741,11 +741,11 @@
>  				 0x5ff0000 0x01000000 0 0 0 0xb7ff0000
>  				 0 0x10000>;
>  			#interrupt-cells = <1>;
> -			interrupt-map-mask = <0xf800 0 0 7>;
> -			interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4
> -					0x0 0 0 2 &mbigen_pcie0 650 4
> -					0x0 0 0 3 &mbigen_pcie0 650 4
> -					0x0 0 0 4 &mbigen_pcie0 650 4>;
> +			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0x0 0 0 IRQ_INTA &mbigen_pcie0 650 4
> +					0x0 0 0 IRQ_INTB &mbigen_pcie0 650 4
> +					0x0 0 0 IRQ_INTC &mbigen_pcie0 650 4
> +					0x0 0 0 IRQ_INTD &mbigen_pcie0 650 4>;
>  			status = "disabled";
>  		};
>  
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index c6f81431983e..63e72069d21e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -867,11 +867,11 @@
>  			#interrupt-cells = <1>;
>  			interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "msi";
> -			interrupt-map-mask = <0 0 0 0x7>;
> -			interrupt-map =	<0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
> -					<0 0 0 2 &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
> -					<0 0 0 3 &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
> -					<0 0 0 4 &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +			interrupt-map =	<0 0 0 IRQ_INTA &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
> +					<0 0 0 IRQ_INTB &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
> +					<0 0 0 IRQ_INTC &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
> +					<0 0 0 IRQ_INTD &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
>  
>  			clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
>  				 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
> diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> index a97eeb4569c0..8e0a9fa37c82 100644
> --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> @@ -980,11 +980,11 @@
>  			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "msi";
>  			#interrupt-cells = <1>;
> -			interrupt-map-mask = <0 0 0 0x7>;
> -			interrupt-map = <0 0 0 1 &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
> -					<0 0 0 2 &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
> -					<0 0 0 3 &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
> -					<0 0 0 4 &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
> +			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0 0 0 IRQ_INTA &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
> +					<0 0 0 IRQ_INTB &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
> +					<0 0 0 IRQ_INTC &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
> +					<0 0 0 IRQ_INTD &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
>  				 <&gcc GCC_PCIE_0_AUX_CLK>,
>  				 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index cede1ad81be2..bb68826bac6f 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -242,11 +242,11 @@
>  			     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
>  			     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
>  		interrupt-names = "sys", "legacy", "client";
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &pcie0_intc 0>,
> -				<0 0 0 2 &pcie0_intc 1>,
> -				<0 0 0 3 &pcie0_intc 2>,
> -				<0 0 0 4 &pcie0_intc 3>;
> +		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +		interrupt-map = <0 0 0 IRQ_INTA &pcie0_intc 0>,
> +				<0 0 0 IRQ_INTB &pcie0_intc 1>,
> +				<0 0 0 IRQ_INTC &pcie0_intc 2>,
> +				<0 0 0 IRQ_INTD &pcie0_intc 3>;
>  		linux,pci-domain = <0>;
>  		max-link-speed = <1>;
>  		msi-map = <0x0 &its 0x0 0x1000>;
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> index b658f2b641e2..8a1a3e5bb11c 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> @@ -7,6 +7,7 @@
>  
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/gpio/uniphier-gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/thermal/thermal.h>
>  
>  / {
> @@ -900,11 +901,11 @@
>  			#interrupt-cells = <1>;
>  			interrupt-names = "dma", "msi";
>  			interrupts = <0 224 4>, <0 225 4>;
> -			interrupt-map-mask = <0 0 0 7>;
> -			interrupt-map = <0 0 0 1 &pcie_intc 0>,	/* INTA */
> -					<0 0 0 2 &pcie_intc 1>,	/* INTB */
> -					<0 0 0 3 &pcie_intc 2>,	/* INTC */
> -					<0 0 0 4 &pcie_intc 3>;	/* INTD */
> +			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 0>,
> +					<0 0 0 IRQ_INTB &pcie_intc 1>,
> +					<0 0 0 IRQ_INTC &pcie_intc 2>,
> +					<0 0 0 IRQ_INTD &pcie_intc 3>;
>  			phy-names = "pcie-phy";
>  			phys = <&pcie_phy>;
>  
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> index d6f6cee4d549..ec20417fbd31 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> @@ -7,6 +7,7 @@
>  
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/gpio/uniphier-gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
>  
>  / {
>  	compatible = "socionext,uniphier-pxs3";
> @@ -758,11 +759,11 @@
>  			#interrupt-cells = <1>;
>  			interrupt-names = "dma", "msi";
>  			interrupts = <0 224 4>, <0 225 4>;
> -			interrupt-map-mask = <0 0 0 7>;
> -			interrupt-map = <0 0 0 1 &pcie_intc 0>,	/* INTA */
> -					<0 0 0 2 &pcie_intc 1>,	/* INTB */
> -					<0 0 0 3 &pcie_intc 2>,	/* INTC */
> -					<0 0 0 4 &pcie_intc 3>;	/* INTD */
> +			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0 0 0 IRQ_INTA &pcie_intc 0>,
> +					<0 0 0 IRQ_INTB &pcie_intc 1>,
> +					<0 0 0 IRQ_INTC &pcie_intc 2>,
> +					<0 0 0 IRQ_INTD &pcie_intc 3>;
>  			phy-names = "pcie-phy";
>  			phys = <&pcie_phy>;
>  
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 9aa67340a4d8..30c9b0b275de 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -12,6 +12,8 @@
>   * the License, or (at your option) any later version.
>   */
>  
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
>  / {
>  	compatible = "xlnx,zynqmp";
>  	#address-cells = <2>;
> @@ -462,11 +464,11 @@
>  			ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000	/* non-prefetchable memory */
>  				  0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
>  			bus-range = <0x00 0xff>;
> -			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> -			interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
> -					<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
> -					<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
> -					<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
> +			interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
> +			interrupt-map = <0x0 0x0 0x0 IRQ_INTA &pcie_intc 0x1>,
> +					<0x0 0x0 0x0 IRQ_INTB &pcie_intc 0x2>,
> +					<0x0 0x0 0x0 IRQ_INTC &pcie_intc 0x3>,
> +					<0x0 0x0 0x0 IRQ_INTD &pcie_intc 0x4>;
>  			pcie_intc: legacy-interrupt-controller {
>  				interrupt-controller;
>  				#address-cells = <0>;
> -- 
> 2.21.0
> 

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ¯\_(ツ)_/¯

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 7/7] dt-bindings: PCI: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-05 15:16     ` Andrew Murray
@ 2019-11-06 23:47       ` Rob Herring
  0 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2019-11-06 23:47 UTC (permalink / raw)
  To: Andrew Murray
  Cc: Mark Rutland, Sascha Hauer, Heiko Stuebner, Karthikeyan Mitran,
	David Daney, linux-pci, Linus Walleij, Binghui Wang,
	Michal Simek, Masahiro Yamada, Thomas Petazzoni,
	Jonathan Chocron, Toan Le, Will Deacon, Jesper Nilsson,
	Ryder Lee, Kunihiko Hayashi, Fabio Estevam, Tom Joseph,
	linux-arm-kernel, Kishon Vijay Abraham I,
	open list:ARM/Rockchip SoC...,
	Andy Gross, Matthias Brugger, NXP Linux Team, Xiaowei Song,
	Shawn Lin,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Richard Zhu, MSM, Hou Zhiqiang,
	moderated list:ARM/Mediatek SoC support, Bjorn Helgaas,
	Linux-OMAP, Linux ARM, rfi, Zhou Wang, Pengutronix Kernel Team,
	Ley Foon Tan, Shawn Guo, Lucas Stach

On Tue, Nov 05, 2019 at 03:16:23PM +0000, Andrew Murray wrote:
> On Tue, Nov 05, 2019 at 04:08:29PM +0100, Linus Walleij wrote:
> > Hi Andrew,
> > 
> > thanks for your patch!
> 
> Thanks for the review.
> 
> > 
> > On Mon, Nov 4, 2019 at 5:39 PM Andrew Murray <andrew.murray@arm.com> wrote:
> > 
> > > Replace magic numbers used to describe legacy PCI IRQ interrupts
> > > with #define.
> > >
> > > Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> > 
> > When I add examples I usually make sure that above the examples
> > are the appropriate #include files, this is becoming more important
> > as we convert to yaml, then you need the right includes because the
> > examples will get compiled.
> 
> OK thanks - I can see other files in Documentation that take this approach
> I'll update this patch on my respin.

FYI, It's been on my todo to add common includes like irq.h and gpio.h 
to the example template used to compile the examples, so everyone 
doesn't have to add them.

Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 7/7] dt-bindings: PCI: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 ` [PATCH v1 7/7] dt-bindings: PCI: " Andrew Murray
  2019-11-05 15:08   ` Linus Walleij
@ 2019-11-06 23:47   ` Rob Herring
  1 sibling, 0 replies; 13+ messages in thread
From: Rob Herring @ 2019-11-06 23:47 UTC (permalink / raw)
  To: Andrew Murray
  Cc: Heiko Stuebner, Kunihiko Hayashi, linux-pci, Shawn Lin,
	Masahiro Yamada, Toan Le, Fabio Estevam, Michal Simek,
	linux-arm-kernel, Kishon Vijay Abraham I, linux-rockchip,
	NXP Linux Team, Linus Walleij, devicetree, linux-arm-msm,
	linux-mediatek, Matthias Brugger, linux-omap, linux-arm-kernel,
	rfi, Pengutronix Kernel Team, Bjorn Helgaas

On Mon,  4 Nov 2019 16:38:21 +0000, Andrew Murray wrote:
> Replace magic numbers used to describe legacy PCI IRQ interrupts
> with #define.
> 
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> ---
>  .../devicetree/bindings/pci/83xx-512x-pci.txt | 18 ++---
>  .../devicetree/bindings/pci/aardvark-pci.txt  | 10 +--
>  .../devicetree/bindings/pci/altera-pcie.txt   | 10 +--
>  .../bindings/pci/axis,artpec6-pcie.txt        | 10 +--
>  .../bindings/pci/cdns,cdns-pcie-host.txt      | 10 +--
>  .../bindings/pci/faraday,ftpci100.txt         | 68 +++++++++----------
>  .../bindings/pci/fsl,imx6q-pcie.txt           | 10 +--
>  .../bindings/pci/hisilicon-pcie.txt           | 20 +++---
>  .../bindings/pci/host-generic-pci.txt         | 10 +--
>  .../devicetree/bindings/pci/kirin-pcie.txt    | 10 +--
>  .../bindings/pci/layerscape-pci.txt           | 10 +--
>  .../devicetree/bindings/pci/mediatek-pcie.txt | 40 +++++------
>  .../devicetree/bindings/pci/mobiveil-pcie.txt |  8 +--
>  .../devicetree/bindings/pci/pci-rcar-gen2.txt |  8 +--
>  .../bindings/pci/pci-thunder-pem.txt          | 10 +--
>  .../devicetree/bindings/pci/pcie-al.txt       |  4 +-
>  .../devicetree/bindings/pci/qcom,pcie.txt     | 20 +++---
>  .../bindings/pci/ralink,rt3883-pci.txt        | 18 ++---
>  .../bindings/pci/rockchip-pcie-host.txt       | 10 +--
>  .../devicetree/bindings/pci/ti-pci.txt        | 10 +--
>  .../devicetree/bindings/pci/uniphier-pcie.txt | 10 +--
>  .../bindings/pci/v3-v360epc-pci.txt           | 34 +++++-----
>  .../devicetree/bindings/pci/versatile.txt     | 40 +++++------
>  .../devicetree/bindings/pci/xgene-pci-msi.txt | 10 +--
>  .../devicetree/bindings/pci/xgene-pci.txt     | 10 +--
>  .../bindings/pci/xilinx-nwl-pcie.txt          | 10 +--
>  .../devicetree/bindings/pci/xilinx-pcie.txt   | 20 +++---
>  27 files changed, 224 insertions(+), 224 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 2/7] arm64: dts: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 ` [PATCH v1 2/7] arm64: dts: Use IRQ flags " Andrew Murray
  2019-11-06 10:03   ` Liviu Dudau
@ 2019-11-08 14:34   ` Heiko Stuebner
  2019-11-09  6:03   ` Wei Xu
  2 siblings, 0 replies; 13+ messages in thread
From: Heiko Stuebner @ 2019-11-08 14:34 UTC (permalink / raw)
  To: Andrew Murray
  Cc: Mark Rutland, devicetree, Liviu Dudau, Masahiro Yamada,
	Lorenzo Pieralisi, Michal Simek, Wei Xu, linux-rockchip,
	Andy Gross, Tsahee Zidenberg, Tom Lendacky, Antoine Tenart,
	linux-arm-msm, Robert Richter, Rob Herring, Jayachandran C,
	linux-arm-kernel, Brijesh Singh, Li Yang, Suravee Suthikulpanit,
	Sudeep Holla, Shawn Guo

Am Montag, 4. November 2019, 17:38:16 CET schrieb Andrew Murray:
> Replace magic numbers used to describe legacy PCI IRQ interrupts
> with #define.
> 
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>

> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index cede1ad81be2..bb68826bac6f 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -242,11 +242,11 @@
>  			     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
>  			     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
>  		interrupt-names = "sys", "legacy", "client";
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &pcie0_intc 0>,
> -				<0 0 0 2 &pcie0_intc 1>,
> -				<0 0 0 3 &pcie0_intc 2>,
> -				<0 0 0 4 &pcie0_intc 3>;
> +		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +		interrupt-map = <0 0 0 IRQ_INTA &pcie0_intc 0>,
> +				<0 0 0 IRQ_INTB &pcie0_intc 1>,
> +				<0 0 0 IRQ_INTC &pcie0_intc 2>,
> +				<0 0 0 IRQ_INTD &pcie0_intc 3>;
>  		linux,pci-domain = <0>;
>  		max-link-speed = <1>;
>  		msi-map = <0x0 &its 0x0 0x1000>;

For the Rockchip part
Acked-by: Heiko Stuebner <heiko@sntech.de>



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH v1 2/7] arm64: dts: Use IRQ flags for legacy PCI IRQ interrupts
  2019-11-04 16:38 ` [PATCH v1 2/7] arm64: dts: Use IRQ flags " Andrew Murray
  2019-11-06 10:03   ` Liviu Dudau
  2019-11-08 14:34   ` Heiko Stuebner
@ 2019-11-09  6:03   ` Wei Xu
  2 siblings, 0 replies; 13+ messages in thread
From: Wei Xu @ 2019-11-09  6:03 UTC (permalink / raw)
  To: Andrew Murray, Tsahee Zidenberg, Antoine Tenart, Rob Herring,
	Mark Rutland, Brijesh Singh, Suravee Suthikulpanit, Tom Lendacky,
	Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi, Robert Richter,
	Jayachandran C, Shawn Guo, Li Yang, Andy Gross, Heiko Stuebner,
	Masahiro Yamada, Michal Simek
  Cc: devicetree, linux-rockchip, linux-arm-kernel, linux-arm-msm



On 2019/11/5 0:38, Andrew Murray wrote:
> Replace magic numbers used to describe legacy PCI IRQ interrupts
> with #define.
>
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> ---
>   arch/arm64/boot/dts/al/alpine-v2.dtsi            |  6 +++---
>   arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts |  2 +-
>   arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts |  2 +-
>   arch/arm64/boot/dts/amd/amd-overdrive.dts        |  2 +-
>   arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi     | 12 +++++++-----
>   arch/arm64/boot/dts/amd/husky.dts                |  2 +-
>   arch/arm64/boot/dts/arm/fvp-base-revc.dts        | 10 +++++-----
>   arch/arm64/boot/dts/arm/juno-base.dtsi           | 12 +++++++-----
>   arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi    | 10 +++++-----
>   arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi   | 10 +++++-----
>   arch/arm64/boot/dts/hisilicon/hi3660.dtsi        | 10 +++++-----
>   arch/arm64/boot/dts/hisilicon/hip06.dtsi         | 10 +++++-----
>   arch/arm64/boot/dts/qcom/msm8998.dtsi            | 10 +++++-----
>   arch/arm64/boot/dts/qcom/qcs404.dtsi             | 10 +++++-----
>   arch/arm64/boot/dts/rockchip/rk3399.dtsi         | 10 +++++-----
>   arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 11 ++++++-----
>   arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 11 ++++++-----
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi           | 12 +++++++-----
>   18 files changed, 80 insertions(+), 72 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/al/alpine-v2.dtsi b/arch/arm64/boot/dts/al/alpine-v2.dtsi
> index d5e7e2bb4e6c..35a540090026 100644
> --- a/arch/arm64/boot/dts/al/alpine-v2.dtsi
> +++ b/arch/arm64/boot/dts/al/alpine-v2.dtsi
> @@ -132,10 +132,10 @@
>   			#address-cells = <3>;
>   			#interrupt-cells = <1>;
>   			reg = <0x0 0xfbc00000 0x0 0x100000>;
> -			interrupt-map-mask = <0xf800 0 0 7>;
> +			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
>   			/* add legacy interrupts for SATA only */
> -			interrupt-map = <0x4000 0 0 1 &gic 0 53 4>,
> -					<0x4800 0 0 1 &gic 0 54 4>;
> +			interrupt-map = <0x4000 0 0 IRQ_INTA &gic 0 53 4>,
> +					<0x4800 0 0 IRQ_INTA &gic 0 54 4>;
>   			/* 32 bit non prefetchable memory space */
>   			ranges = <0x2000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
>   			bus-range = <0x00 0x00>;
> diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
> index 8e341be9a399..d4a8d3a5eebb 100644
> --- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
> +++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
> @@ -8,7 +8,7 @@
>   
>   /dts-v1/;
>   
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>   
>   / {
>   	model = "AMD Seattle (Rev.B0) Development Board (Overdrive)";
> diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
> index 92cef05c6b74..e55254e714f2 100644
> --- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
> +++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
> @@ -8,7 +8,7 @@
>   
>   /dts-v1/;
>   
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>   
>   / {
>   	model = "AMD Seattle (Rev.B1) Development Board (Overdrive)";
> diff --git a/arch/arm64/boot/dts/amd/amd-overdrive.dts b/arch/arm64/boot/dts/amd/amd-overdrive.dts
> index 41b3a6c0993d..4e09c9a2ceda 100644
> --- a/arch/arm64/boot/dts/amd/amd-overdrive.dts
> +++ b/arch/arm64/boot/dts/amd/amd-overdrive.dts
> @@ -7,7 +7,7 @@
>   
>   /dts-v1/;
>   
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>   
>   / {
>   	model = "AMD Seattle Development Board (Overdrive)";
> diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
> index b664e7af74eb..efc6f42f3bd1 100644
> --- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
> +++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
> @@ -5,6 +5,8 @@
>    * Copyright (C) 2014 Advanced Micro Devices, Inc.
>    */
>   
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
>   / {
>   	compatible = "amd,seattle";
>   	interrupt-parent = <&gic0>;
> @@ -213,12 +215,12 @@
>   			msi-parent = <&v2m0>;
>   			reg = <0 0xf0000000 0 0x10000000>;
>   
> -			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
> +			interrupt-map-mask = <0xf800 0x0 0x0 IRQ_INT_ALL>;
>   			interrupt-map =
> -				<0x1000 0x0 0x0 0x1 &gic0 0x0 0x0 0x0 0x120 0x1>,
> -				<0x1000 0x0 0x0 0x2 &gic0 0x0 0x0 0x0 0x121 0x1>,
> -				<0x1000 0x0 0x0 0x3 &gic0 0x0 0x0 0x0 0x122 0x1>,
> -				<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
> +				<0x1000 0x0 0x0 IRQ_INTA &gic0 0x0 0x0 0x0 0x120 0x1>,
> +				<0x1000 0x0 0x0 IRQ_INTB &gic0 0x0 0x0 0x0 0x121 0x1>,
> +				<0x1000 0x0 0x0 IRQ_INTC &gic0 0x0 0x0 0x0 0x122 0x1>,
> +				<0x1000 0x0 0x0 IRQ_INTD &gic0 0x0 0x0 0x0 0x123 0x1>;
>   
>   			dma-coherent;
>   			dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
> diff --git a/arch/arm64/boot/dts/amd/husky.dts b/arch/arm64/boot/dts/amd/husky.dts
> index 7acde34772cb..5463e89b2811 100644
> --- a/arch/arm64/boot/dts/amd/husky.dts
> +++ b/arch/arm64/boot/dts/amd/husky.dts
> @@ -8,7 +8,7 @@
>   
>   /dts-v1/;
>   
> -/include/ "amd-seattle-soc.dtsi"
> +#include "amd-seattle-soc.dtsi"
>   
>   / {
>   	model = "Linaro 96Boards Enterprise Edition Server (Husky) Board";
> diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> index 62ab0d54ff71..8352c3ad43ab 100644
> --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> @@ -161,11 +161,11 @@
>   		bus-range = <0x0 0x1>;
>   		reg = <0x0 0x40000000 0x0 0x10000000>;
>   		ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>;
> -		interrupt-map = <0 0 0 1 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 2 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 3 &gic GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 4 &gic GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> -		interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> +		interrupt-map = <0 0 0 IRQ_INTA &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTB &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTC &gic GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTD &gic GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-map-mask = <0x0 0x0 0x0 IRQ_INT_ALL>;
>   		msi-map = <0x0 &its 0x0 0x10000>;
>   		iommu-map = <0x0 &smmu 0x0 0x10000>;
>   
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 26a039a028b8..b01a922a9fbf 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -1,4 +1,6 @@
>   // SPDX-License-Identifier: GPL-2.0
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
>   #include "juno-clocks.dtsi"
>   #include "juno-motherboard.dtsi"
>   
> @@ -519,11 +521,11 @@
>   			 <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
>   			 <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
>   		#interrupt-cells = <1>;
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 2 &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 3 &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
> -				<0 0 0 4 &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +		interrupt-map = <0 0 0 IRQ_INTA &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTB &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTC &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
> +				<0 0 0 IRQ_INTD &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
>   		msi-parent = <&v2m_0>;
>   		status = "disabled";
>   		iommu-map-mask = <0x0>;	/* RC has no means to output PCI RID */
> diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
> index dfb41705a9a9..6776b116e3db 100644
> --- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
> +++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
> @@ -115,13 +115,13 @@
>   		  <0x02000000    0 0x40000000    0 0x40000000    0 0x20000000
>   		   0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
>   		bus-range = <0 0xff>;
> -		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
>   		interrupt-map =
>   		      /* addr  pin  ic   icaddr  icintr */
> -			<0 0 0  1  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
> -			 0 0 0  2  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
> -			 0 0 0  3  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
> -			 0 0 0  4  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> +			<0 0 0  IRQ_INTA  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
> +			 0 0 0  IRQ_INTB  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
> +			 0 0 0  IRQ_INTC  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
> +			 0 0 0  IRQ_INTD  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
>   		msi-parent = <&gicits>;
>   		dma-coherent;
>   	};
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index 337919366dc8..662cbf7c6588 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -492,11 +492,11 @@
>   				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
>   			msi-parent = <&msi>;
>   			#interrupt-cells = <1>;
> -			interrupt-map-mask = <0 0 0 7>;
> -			interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
> -					<0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
> -					<0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
> -					<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-map-mask = <0 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0000 0 0 IRQ_INTA &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
> +					<0000 0 0 IRQ_INTB &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
> +					<0000 0 0 IRQ_INTC &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
> +					<0000 0 0 IRQ_INTD &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
>   			status = "disabled";
>   		};
>   	};
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 253cc345f143..9469e1c935c0 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -1013,14 +1013,14 @@
>   			#interrupt-cells = <1>;
>   			interrupts = <0 283 4>;
>   			interrupt-names = "msi";
> -			interrupt-map-mask = <0xf800 0 0 7>;
> -			interrupt-map = <0x0 0 0 1
> +			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0x0 0 0 IRQ_INTA
>   					 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
> -					<0x0 0 0 2
> +					<0x0 0 0 IRQ_INTB
>   					 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
> -					<0x0 0 0 3
> +					<0x0 0 0 IRQ_INTC
>   					 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
> -					<0x0 0 0 4
> +					<0x0 0 0 IRQ_INTD
>   					 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
>   				 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
> diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
> index 50ceaa959bdc..179a61e171de 100644
> --- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
> @@ -741,11 +741,11 @@
>   				 0x5ff0000 0x01000000 0 0 0 0xb7ff0000
>   				 0 0x10000>;
>   			#interrupt-cells = <1>;
> -			interrupt-map-mask = <0xf800 0 0 7>;
> -			interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4
> -					0x0 0 0 2 &mbigen_pcie0 650 4
> -					0x0 0 0 3 &mbigen_pcie0 650 4
> -					0x0 0 0 4 &mbigen_pcie0 650 4>;
> +			interrupt-map-mask = <0xf800 0 0 IRQ_INT_ALL>;
> +			interrupt-map = <0x0 0 0 IRQ_INTA &mbigen_pcie0 650 4
> +					0x0 0 0 IRQ_INTB &mbigen_pcie0 650 4
> +					0x0 0 0 IRQ_INTC &mbigen_pcie0 650 4
> +					0x0 0 0 IRQ_INTD &mbigen_pcie0 650 4>;
>   			status = "disabled";
>   		};
>

Thanks!
For the Hisilicon part,
Acked-by: Wei Xu <xuwei5@hisilicon.com>

Best Regards,
Wei


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, back to index

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-04 16:38 [PATCH v1 0/7] PCI: dt: Remove magic numbers for legacy PCI IRQ interrupts Andrew Murray
2019-11-04 16:38 ` [PATCH v1 2/7] arm64: dts: Use IRQ flags " Andrew Murray
2019-11-06 10:03   ` Liviu Dudau
2019-11-08 14:34   ` Heiko Stuebner
2019-11-09  6:03   ` Wei Xu
2019-11-04 16:38 ` [PATCH v1 3/7] arm: " Andrew Murray
2019-11-05 15:06   ` Linus Walleij
2019-11-05 17:20   ` Jesper Nilsson
2019-11-04 16:38 ` [PATCH v1 7/7] dt-bindings: PCI: " Andrew Murray
2019-11-05 15:08   ` Linus Walleij
2019-11-05 15:16     ` Andrew Murray
2019-11-06 23:47       ` Rob Herring
2019-11-06 23:47   ` Rob Herring

Linux-ARM-Kernel Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/linux-arm-kernel/0 linux-arm-kernel/git/0.git
	git clone --mirror https://lore.kernel.org/linux-arm-kernel/1 linux-arm-kernel/git/1.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 linux-arm-kernel linux-arm-kernel/ https://lore.kernel.org/linux-arm-kernel \
		linux-arm-kernel@lists.infradead.org
	public-inbox-index linux-arm-kernel

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.infradead.lists.linux-arm-kernel


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git