* [PATCH v2 01/17] dt-bindings: arm-smmu: Allow mmu-400, smmu-v1 compatible
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 02/17] dt-bindings: arm: gic: Allow combining arm, gic-400 compatible strings Andre Przywara
` (16 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, Robin Murphy, Joerg Roedel, iommu,
Will Deacon, linux-arm-kernel
The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
arm,smmu-v1, even though the MMU-400 is compatible as well.
Allow this combination as well to let the Arm Juno board pass the test.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6515dbe47508..e3ef1c69d132 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -41,7 +41,9 @@ properties:
- const: arm,mmu-500
- const: arm,smmu-v2
- items:
- - const: arm,mmu-401
+ - enum:
+ - arm,mmu-400
+ - arm,mmu-401
- const: arm,smmu-v1
- enum:
- arm,smmu-v1
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 02/17] dt-bindings: arm: gic: Allow combining arm, gic-400 compatible strings
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
2020-05-07 11:24 ` [PATCH v2 01/17] dt-bindings: arm-smmu: Allow mmu-400, smmu-v1 compatible Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 03/17] arm64: dts: arm: Fix node address fields Andre Przywara
` (15 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The arm,gic-400 compatible is probably the best matching string for the
GIC in most modern SoCs, but was only introduced later into the kernel.
For historic reasons and to keep compatibility, some SoC DTs were thus
using a combination of this name and one of the older strings, which
currently the binding denies.
Add a stanza to the DT binding to allow "arm,gic-400", followed by
either "arm,cortex-a15-gic" or "arm,cortex-a7-gic". This fixes binding
compliance for quite some SoC .dtsi files in the kernel tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/interrupt-controller/arm,gic.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
index 9a47820ef346..3ab258c82930 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
@@ -39,6 +39,12 @@ properties:
- qcom,msm-8660-qgic
- qcom,msm-qgic2
+ - items:
+ - const: arm,gic-400
+ - enum:
+ - arm,cortex-a15-gic
+ - arm,cortex-a7-gic
+
- items:
- const: arm,arm1176jzf-devchip-gic
- const: arm,arm11mp-gic
--
2.17.1
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 03/17] arm64: dts: arm: Fix node address fields
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
2020-05-07 11:24 ` [PATCH v2 01/17] dt-bindings: arm-smmu: Allow mmu-400, smmu-v1 compatible Andre Przywara
2020-05-07 11:24 ` [PATCH v2 02/17] dt-bindings: arm: gic: Allow combining arm, gic-400 compatible strings Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 04/17] arm64: dts: arm: FVP: Fix motherboard .dtsi Andre Przywara
` (14 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The Arm Ltd. boards were using an outdated address convention in the DT
node names, by separating the high from the low 32-bits of an address by
a comma.
Remove the comma from the node name suffix to be DT spec compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
5 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 5c183483ec3b..8010cdcdb37a 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -31,7 +31,7 @@
#interrupt-cells = <1>;
ranges;
- nor_flash: flash@0,00000000 {
+ nor_flash: flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>,
<4 0x00000000 0x04000000>;
@@ -41,13 +41,13 @@
};
};
- psram@1,00000000 {
+ psram@100000000 {
compatible = "arm,vexpress-psram", "mtd-ram";
reg = <1 0x00000000 0x02000000>;
bank-width = <4>;
};
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan9118", "smsc,lan9115";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -59,14 +59,14 @@
vddvario-supply = <&v2m_fixed_3v3>;
};
- usb@2,03000000 {
+ usb@203000000 {
compatible = "nxp,usb-isp1761";
reg = <2 0x03000000 0x20000>;
interrupts = <16>;
port1-otg;
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index 12f039fa3dad..e26b492795c5 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -151,7 +151,7 @@
<0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan91c111";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -178,7 +178,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index e3983ded3c3c..d5cefddde08c 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -103,7 +103,7 @@
};
};
- flash@0,00000000 {
+ flash@0 {
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>;
@@ -120,7 +120,7 @@
};
};
- ethernet@2,00000000 {
+ ethernet@200000000 {
compatible = "smsc,lan9118", "smsc,lan9115";
reg = <2 0x00000000 0x10000>;
interrupts = <3>;
@@ -133,7 +133,7 @@
vddvario-supply = <&mb_fixed_3v3>;
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
index 60703b5763c6..350cbf17e8b4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -9,7 +9,7 @@
motherboard {
arm,v2m-memory-map = "rs2";
- iofpga@3,00000000 {
+ iofpga@300000000 {
virtio-p9@140000 {
compatible = "virtio,mmio";
reg = <0x140000 0x200>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index e333c8d2d0e4..d1bfa62ca073 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -17,14 +17,14 @@
#interrupt-cells = <1>;
ranges;
- flash@0,00000000 {
+ flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>,
<4 0x00000000 0x04000000>;
bank-width = <4>;
};
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan91c111";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -51,7 +51,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 04/17] arm64: dts: arm: FVP: Fix motherboard .dtsi
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (2 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 03/17] arm64: dts: arm: Fix node address fields Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 05/17] arm64: dts: juno: Fix mem-timer Andre Przywara
` (13 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The "motherboard" DT include file was mixing MMIO mapped devices with
other peripherals like fixed clocks or regulators. The simple-bus
binding denies this.
Adjust the .dtsi to declare the clocks and not memory mapped devices
outside of the bus node.
This fixes a dtbs_check complaint for the fastmodel DTs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../boot/dts/arm/rtsm_ve-motherboard.dtsi | 136 +++++++++---------
1 file changed, 68 insertions(+), 68 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index d1bfa62ca073..f61e313ab1a4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -8,6 +8,74 @@
* VEMotherBoard.lisa
*/
/ {
+ v2m_clk24mhz: clk24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "v2m:clk24mhz";
+ };
+
+ v2m_refclk1mhz: refclk1mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1000000>;
+ clock-output-names = "v2m:refclk1mhz";
+ };
+
+ v2m_refclk32khz: refclk32khz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "v2m:refclk32khz";
+ };
+
+ v2m_fixed_3v3: v2m-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ mcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+ v2m_oscclk1: oscclk1 {
+ /* CLCD clock */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 1>;
+ freq-range = <23750000 63500000>;
+ #clock-cells = <0>;
+ clock-output-names = "v2m:oscclk1";
+ };
+
+ reset {
+ compatible = "arm,vexpress-reset";
+ arm,vexpress-sysreg,func = <5 0>;
+ };
+
+ muxfpga {
+ compatible = "arm,vexpress-muxfpga";
+ arm,vexpress-sysreg,func = <7 0>;
+ };
+
+ shutdown {
+ compatible = "arm,vexpress-shutdown";
+ arm,vexpress-sysreg,func = <8 0>;
+ };
+
+ reboot {
+ compatible = "arm,vexpress-reboot";
+ arm,vexpress-sysreg,func = <9 0>;
+ };
+
+ dvimode {
+ compatible = "arm,vexpress-dvimode";
+ arm,vexpress-sysreg,func = <11 0>;
+ };
+ };
+
bus@8000000 {
motherboard {
arm,v2m-memory-map = "rs1";
@@ -30,27 +98,6 @@
interrupts = <15>;
};
- v2m_clk24mhz: clk24mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- clock-output-names = "v2m:clk24mhz";
- };
-
- v2m_refclk1mhz: refclk1mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1000000>;
- clock-output-names = "v2m:refclk1mhz";
- };
-
- v2m_refclk32khz: refclk32khz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "v2m:refclk32khz";
- };
-
iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -198,53 +245,6 @@
};
};
};
-
- v2m_fixed_3v3: v2m-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- mcc {
- compatible = "arm,vexpress,config-bus";
- arm,vexpress,config-bridge = <&v2m_sysreg>;
-
- v2m_oscclk1: oscclk1 {
- /* CLCD clock */
- compatible = "arm,vexpress-osc";
- arm,vexpress-sysreg,func = <1 1>;
- freq-range = <23750000 63500000>;
- #clock-cells = <0>;
- clock-output-names = "v2m:oscclk1";
- };
-
- reset {
- compatible = "arm,vexpress-reset";
- arm,vexpress-sysreg,func = <5 0>;
- };
-
- muxfpga {
- compatible = "arm,vexpress-muxfpga";
- arm,vexpress-sysreg,func = <7 0>;
- };
-
- shutdown {
- compatible = "arm,vexpress-shutdown";
- arm,vexpress-sysreg,func = <8 0>;
- };
-
- reboot {
- compatible = "arm,vexpress-reboot";
- arm,vexpress-sysreg,func = <9 0>;
- };
-
- dvimode {
- compatible = "arm,vexpress-dvimode";
- arm,vexpress-sysreg,func = <11 0>;
- };
- };
};
};
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 05/17] arm64: dts: juno: Fix mem-timer
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (3 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 04/17] arm64: dts: arm: FVP: Fix motherboard .dtsi Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 06/17] arm64: dts: arm: Fix GIC compatible names Andre Przywara
` (12 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The Juno's mem-timer DT node was not fully compliant with the DT binding,
which has certain expectation about child nodes and their size and
address cells values.
Use a cell size of 1, as the binding requests, and spell out the ranges
property to be binding compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index f5889281545f..3feefd61eb76 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -11,14 +11,14 @@
compatible = "arm,armv7-timer-mem";
reg = <0x0 0x2a810000 0x0 0x10000>;
clock-frequency = <50000000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x2a820000 0x20000>;
status = "disabled";
frame@2a830000 {
frame-number = <1>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0 0x2a830000 0x0 0x10000>;
+ reg = <0x10000 0x10000>;
};
};
--
2.17.1
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 06/17] arm64: dts: arm: Fix GIC compatible names
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (4 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 05/17] arm64: dts: juno: Fix mem-timer Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-11 8:56 ` Marc Zyngier
2020-05-07 11:24 ` [PATCH v2 07/17] arm64: dts: arm: Fix GIC child nodes Andre Przywara
` (11 subsequent siblings)
17 siblings, 1 reply; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The GIC DT binding only allows a certain combination of DT compatible
strings, mostly just consisting of one name.
Drop the somewhat awkward combination of multiple names using different
"cortex" based strings, in the fastmodel .dts files.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
index 15fe81738e94..61a1750fcdd6 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
@@ -6,7 +6,7 @@
/ {
gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index c5d15cbd8cf6..f86f6451411f 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -95,7 +95,7 @@
};
gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
--
2.17.1
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 06/17] arm64: dts: arm: Fix GIC compatible names
2020-05-07 11:24 ` [PATCH v2 06/17] arm64: dts: arm: Fix GIC compatible names Andre Przywara
@ 2020-05-11 8:56 ` Marc Zyngier
0 siblings, 0 replies; 21+ messages in thread
From: Marc Zyngier @ 2020-05-11 8:56 UTC (permalink / raw)
To: Andre Przywara
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
Liviu Dudau, Sudeep Holla, linux-arm-kernel
On 2020-05-07 12:24, Andre Przywara wrote:
> The GIC DT binding only allows a certain combination of DT compatible
> strings, mostly just consisting of one name.
>
> Drop the somewhat awkward combination of multiple names using different
> "cortex" based strings, in the fastmodel .dts files.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> index 15fe81738e94..61a1750fcdd6 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> @@ -6,7 +6,7 @@
>
> / {
> gic: interrupt-controller@2c001000 {
> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + compatible = "arm,cortex-a15-gic";
> #interrupt-cells = <3>;
> #address-cells = <2>;
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> index c5d15cbd8cf6..f86f6451411f 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> @@ -95,7 +95,7 @@
> };
>
> gic: interrupt-controller@2c001000 {
> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + compatible = "arm,cortex-a15-gic";
> #interrupt-cells = <3>;
> #address-cells = <0>;
> interrupt-controller;
Since you've now allowed "arm,gic-400", why don't you use that
in combination with "arm,cortex-a15-gic"? Having GIC-400 makes
a lot more sense, as these two models are ARMv8 models.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 07/17] arm64: dts: arm: Fix GIC child nodes
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (5 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 06/17] arm64: dts: arm: Fix GIC compatible names Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-11 8:48 ` André Przywara
2020-05-07 11:24 ` [PATCH v2 08/17] arm64: dts: arm: Fix ITS node names and #msi-cells Andre Przywara
` (10 subsequent siblings)
17 siblings, 1 reply; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The GIC DT nodes for the Arm Ltd. boards were not fully compliant with
the DT binding, which has certain expectations about child nodes and
their size and address cells values.
Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 14 +++++++-------
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
index 61a1750fcdd6..c8ebffca12a7 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
@@ -8,7 +8,7 @@
gic: interrupt-controller@2c001000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
- #address-cells = <2>;
+ #address-cells = <0>;
interrupt-controller;
reg = <0x0 0x2c001000 0 0x1000>,
<0x0 0x2c002000 0 0x2000>,
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 3feefd61eb76..6d7b24a8e761 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -74,35 +74,35 @@
<0x0 0x2c02f000 0 0x2000>,
<0x0 0x2c04f000 0 0x2000>,
<0x0 0x2c06f000 0 0x2000>;
- #address-cells = <2>;
+ #address-cells = <1>;
#interrupt-cells = <3>;
- #size-cells = <2>;
+ #size-cells = <1>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
- ranges = <0 0 0 0x2c1c0000 0 0x40000>;
+ ranges = <0 0 0x2c1c0000 0x40000>;
v2m_0: v2m@0 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0 0 0x10000>;
+ reg = <0 0x10000>;
};
v2m@10000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x10000 0 0x10000>;
+ reg = <0x10000 0x10000>;
};
v2m@20000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x20000 0 0x10000>;
+ reg = <0x20000 0x10000>;
};
v2m@30000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x30000 0 0x10000>;
+ reg = <0x30000 0x10000>;
};
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 07/17] arm64: dts: arm: Fix GIC child nodes
2020-05-07 11:24 ` [PATCH v2 07/17] arm64: dts: arm: Fix GIC child nodes Andre Przywara
@ 2020-05-11 8:48 ` André Przywara
0 siblings, 0 replies; 21+ messages in thread
From: André Przywara @ 2020-05-11 8:48 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
On 07/05/2020 12:24, Andre Przywara wrote:
> The GIC DT nodes for the Arm Ltd. boards were not fully compliant with
> the DT binding, which has certain expectations about child nodes and
> their size and address cells values.
>
> Use smaller #address-cells and #size-cells values, as the binding
> requests, and adjust the reg properties accordingly.
... and as innocent as this looks, this of course affects all
interrupt-map properties *everywhere* in the tree, as they all refer to
the GIC node and use its number of #address-cells for the map.
My Juno r0 board still boots (which is why I haven't spotted this
before), but some devices (timers) fail to initialise.
Will adjust the maps accordingly in v3.
Cheers,
Andre
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
> arch/arm64/boot/dts/arm/juno-base.dtsi | 14 +++++++-------
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> index 61a1750fcdd6..c8ebffca12a7 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> @@ -8,7 +8,7 @@
> gic: interrupt-controller@2c001000 {
> compatible = "arm,cortex-a15-gic";
> #interrupt-cells = <3>;
> - #address-cells = <2>;
> + #address-cells = <0>;
> interrupt-controller;
> reg = <0x0 0x2c001000 0 0x1000>,
> <0x0 0x2c002000 0 0x2000>,
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 3feefd61eb76..6d7b24a8e761 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -74,35 +74,35 @@
> <0x0 0x2c02f000 0 0x2000>,
> <0x0 0x2c04f000 0 0x2000>,
> <0x0 0x2c06f000 0 0x2000>;
> - #address-cells = <2>;
> + #address-cells = <1>;
> #interrupt-cells = <3>;
> - #size-cells = <2>;
> + #size-cells = <1>;
> interrupt-controller;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
> - ranges = <0 0 0 0x2c1c0000 0 0x40000>;
> + ranges = <0 0 0x2c1c0000 0x40000>;
>
> v2m_0: v2m@0 {
> compatible = "arm,gic-v2m-frame";
> msi-controller;
> - reg = <0 0 0 0x10000>;
> + reg = <0 0x10000>;
> };
>
> v2m@10000 {
> compatible = "arm,gic-v2m-frame";
> msi-controller;
> - reg = <0 0x10000 0 0x10000>;
> + reg = <0x10000 0x10000>;
> };
>
> v2m@20000 {
> compatible = "arm,gic-v2m-frame";
> msi-controller;
> - reg = <0 0x20000 0 0x10000>;
> + reg = <0x20000 0x10000>;
> };
>
> v2m@30000 {
> compatible = "arm,gic-v2m-frame";
> msi-controller;
> - reg = <0 0x30000 0 0x10000>;
> + reg = <0x30000 0x10000>;
> };
> };
>
>
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 08/17] arm64: dts: arm: Fix ITS node names and #msi-cells
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (6 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 07/17] arm64: dts: arm: Fix GIC child nodes Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 09/17] arm64: dts: juno: usb: Use proper DT node name Andre Przywara
` (9 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The GIC ITS nodes in the fastmodel DTS files were not fully binding
compliant.
Use one of the allowed node names, also add the required #msi-cells
property for the older model.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi | 3 ++-
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
index f2c75c756039..c668162ee3bf 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
@@ -19,9 +19,10 @@
<0x0 0x2c02f000 0x0 0x2000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its: its@2f020000 {
+ its: msi-controller@2f020000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2f020000 0x0 0x20000>;
};
};
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 66381d89c1ce..0cf96ceff431 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -126,7 +126,7 @@
<0x0 0x2c02f000 0 0x2000>; // GICV
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its: its@2f020000 {
+ its: msi-controller@2f020000 {
#msi-cells = <1>;
compatible = "arm,gic-v3-its";
reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 09/17] arm64: dts: juno: usb: Use proper DT node name
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (7 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 08/17] arm64: dts: arm: Fix ITS node names and #msi-cells Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 10/17] arm64: dts: arm: Fix serial node names Andre Przywara
` (8 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The EHCI/OCHI DT binding requires to use "usb" as the node name stub.
Replace the existing name with "usb" to comply with the binding.
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 6d7b24a8e761..5b589856dbaa 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -768,7 +768,7 @@
};
};
- ohci@7ffb0000 {
+ usb@7ffb0000 {
compatible = "generic-ohci";
reg = <0x0 0x7ffb0000 0x0 0x10000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
@@ -776,7 +776,7 @@
clocks = <&soc_usb48mhz>;
};
- ehci@7ffc0000 {
+ usb@7ffc0000 {
compatible = "generic-ehci";
reg = <0x0 0x7ffc0000 0x0 0x10000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
--
2.17.1
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 10/17] arm64: dts: arm: Fix serial node names
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (8 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 09/17] arm64: dts: juno: usb: Use proper DT node name Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 11/17] arm64: dts: fvp: Fix SMMU DT node Andre Przywara
` (7 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The UARTs for all Arm Ltd. boards were using "uart" as their node name
stub.
Replace that with the required "serial" string, to comply with the PL011
DT binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 8 ++++----
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 8 ++++----
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 8 ++++----
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 8010cdcdb37a..675a51e12eb1 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -162,7 +162,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -170,7 +170,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -178,7 +178,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -186,7 +186,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index e26b492795c5..d1918253ab39 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -189,7 +189,7 @@
reg = <0x010000 0x1000>;
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -197,7 +197,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -205,7 +205,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -213,7 +213,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 5b589856dbaa..51951cfd126e 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -729,7 +729,7 @@
};
};
- soc_uart0: uart@7ff80000 {
+ soc_uart0: serial@7ff80000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x7ff80000 0x0 0x1000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index f61e313ab1a4..b81651b1890a 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -158,7 +158,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -166,7 +166,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -174,7 +174,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -182,7 +182,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
--
2.17.1
_______________________________________________
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 11/17] arm64: dts: fvp: Fix SMMU DT node
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (9 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 10/17] arm64: dts: arm: Fix serial node names Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 12/17] arm64: dts: arm: Fix bus node names Andre Przywara
` (6 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The SMMU name in the RevC FVP DT file was not fully binding compliant.
Adjust the node name to match the binding's list of allowed names, also
shuffle the order of the interrupts to comply with the expected order.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 0cf96ceff431..b8a21092db4d 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -172,14 +172,14 @@
dma-coherent;
};
- smmu: smmu@2b400000 {
+ smmu: iommu@2b400000 {
compatible = "arm,smmu-v3";
reg = <0x0 0x2b400000 0x0 0x100000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
+ <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
dma-coherent;
#iommu-cells = <1>;
msi-parent = <&its 0x10000>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 12/17] arm64: dts: arm: Fix bus node names
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (10 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 11/17] arm64: dts: fvp: Fix SMMU DT node Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 13/17] arm64: dts: juno: Fix GPU interrupt order Andre Przywara
` (5 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
Most Arm Ltd. boards are employing a layered bus structure, to map
the hardware design (SoC, motherboard, IOFPGA) and structure the DTs.
The "simple-bus" nodes only allow a limited set of node names. Switch
to use *-bus to be binding compliant.
This relies on a pending dt-schema.git fix for now:
https://github.com/devicetree-org/dt-schema/pull/38
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 4 ++--
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 4 ++--
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 4 ++--
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 4 ++--
6 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 675a51e12eb1..4aaae848f370 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -20,7 +20,7 @@
/ {
bus@8000000 {
- motherboard {
+ motherboard-bus {
model = "V2M-P1";
arm,hbi = <0x190>;
arm,vexpress,site = <0>;
@@ -66,7 +66,7 @@
port1-otg;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index d1918253ab39..23fe81737b1c 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -178,7 +178,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 51951cfd126e..c04c6167d522 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -828,7 +828,7 @@
<0 0 12 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
};
- site2: tlx@60000000 {
+ site2: tlx-bus@60000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index d5cefddde08c..ddda5df28ba0 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -37,7 +37,7 @@
clock-output-names = "juno_mb:refclk32khz";
};
- motherboard {
+ motherboard-bus {
compatible = "arm,vexpress,v2p-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
@@ -133,7 +133,7 @@
vddvario-supply = <&mb_fixed_3v3>;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
index 350cbf17e8b4..b917d9d3f1c4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -6,10 +6,10 @@
*/
/ {
bus@8000000 {
- motherboard {
+ motherboard-bus {
arm,v2m-memory-map = "rs2";
- iofpga@300000000 {
+ iofpga-bus@300000000 {
virtio-p9@140000 {
compatible = "virtio,mmio";
reg = <0x140000 0x200>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index b81651b1890a..001a0a3c7f66 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -77,7 +77,7 @@
};
bus@8000000 {
- motherboard {
+ motherboard-bus {
arm,v2m-memory-map = "rs1";
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
@@ -98,7 +98,7 @@
interrupts = <15>;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 13/17] arm64: dts: juno: Fix GPU interrupt order
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (11 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 12/17] arm64: dts: arm: Fix bus node names Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 14/17] arm64: dts: arm: Fix VExpress LED names Andre Przywara
` (4 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The Mali binding insists on the GPU interrupts to be in ordered as: job,
mmu, gpu.
Sort the GPU interrupts and interrupt-names properties accordingly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index c04c6167d522..e9b4f0004cd4 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -501,10 +501,10 @@
gpu: gpu@2d000000 {
compatible = "arm,juno-mali", "arm,mali-t624";
reg = <0 0x2d000000 0 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gpu", "job", "mmu";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
clocks = <&scpi_dvfs 2>;
power-domains = <&scpi_devpd 1>;
dma-coherent;
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 14/17] arm64: dts: arm: Fix VExpress LED names
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (12 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 13/17] arm64: dts: juno: Fix GPU interrupt order Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 15/17] arm64: dts: juno: Fix SCPI shared mem node name Andre Przywara
` (3 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The common LED binding wants the LED node names to start with led- and
then have just a single number.
Changing the naming for the 8 user LEDs from using user<x> to led-<x>.
Also there is no default-trigger named "mmc0" in the kernel, so use the
more generic "disk-activity".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 4aaae848f370..1681e046b855 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -315,49 +315,49 @@
leds {
compatible = "gpio-leds";
- user1 {
+ led-1 {
label = "v2m:green:user1";
gpios = <&v2m_led_gpios 0 0>;
linux,default-trigger = "heartbeat";
};
- user2 {
+ led-2 {
label = "v2m:green:user2";
gpios = <&v2m_led_gpios 1 0>;
- linux,default-trigger = "mmc0";
+ linux,default-trigger = "disk-activity";
};
- user3 {
+ led-3 {
label = "v2m:green:user3";
gpios = <&v2m_led_gpios 2 0>;
linux,default-trigger = "cpu0";
};
- user4 {
+ led-4 {
label = "v2m:green:user4";
gpios = <&v2m_led_gpios 3 0>;
linux,default-trigger = "cpu1";
};
- user5 {
+ led-5 {
label = "v2m:green:user5";
gpios = <&v2m_led_gpios 4 0>;
linux,default-trigger = "cpu2";
};
- user6 {
+ led-6 {
label = "v2m:green:user6";
gpios = <&v2m_led_gpios 5 0>;
linux,default-trigger = "cpu3";
};
- user7 {
+ led-7 {
label = "v2m:green:user7";
gpios = <&v2m_led_gpios 6 0>;
linux,default-trigger = "cpu4";
};
- user8 {
+ led-8 {
label = "v2m:green:user8";
gpios = <&v2m_led_gpios 7 0>;
linux,default-trigger = "cpu5";
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 15/17] arm64: dts: juno: Fix SCPI shared mem node name
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (13 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 14/17] arm64: dts: arm: Fix VExpress LED names Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 16/17] dt-bindings: mali-midgard: Allow dma-coherent Andre Przywara
` (2 subsequent siblings)
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The SRAM DT binding requires child nodes to use a certain node name
scheme.
Change the naming from scp-shmem to scp-sram to comply with that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index e9b4f0004cd4..614e58187363 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -521,12 +521,12 @@
#size-cells = <1>;
ranges = <0 0x0 0x2e000000 0x8000>;
- cpu_scp_lpri: scp-shmem@0 {
+ cpu_scp_lpri: scp-sram@0 {
compatible = "arm,juno-scp-shmem";
reg = <0x0 0x200>;
};
- cpu_scp_hpri: scp-shmem@200 {
+ cpu_scp_hpri: scp-sram@200 {
compatible = "arm,juno-scp-shmem";
reg = <0x200 0x200>;
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 16/17] dt-bindings: mali-midgard: Allow dma-coherent
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (14 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 15/17] arm64: dts: juno: Fix SCPI shared mem node name Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 11:24 ` [PATCH v2 17/17] dt-bindings: ehci/ohci: Allow iommus property Andre Przywara
2020-05-07 14:04 ` [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Will Deacon
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, David Airlie, dri-devel, Daniel Vetter,
linux-arm-kernel
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
index 0407e45eb8c4..5d7165385e1f 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -87,6 +87,8 @@ properties:
"#cooling-cells":
const: 2
+ dma-coherent: true
+
required:
- compatible
- reg
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 17/17] dt-bindings: ehci/ohci: Allow iommus property
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (15 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 16/17] dt-bindings: mali-midgard: Allow dma-coherent Andre Przywara
@ 2020-05-07 11:24 ` Andre Przywara
2020-05-07 14:04 ` [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Will Deacon
17 siblings, 0 replies; 21+ messages in thread
From: Andre Przywara @ 2020-05-07 11:24 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-usb, linux-arm-kernel,
Greg Kroah-Hartman
A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
property assigns the stream ID for this device.
Allow that property in the DT bindings to fix a complaint about the Arm Juno
board's DTS file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++
Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
index 10edd05872ea..20664c28bfb2 100644
--- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
@@ -74,6 +74,9 @@ properties:
phy-names:
const: usb
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
index bcffec1f1341..ff6c04cde695 100644
--- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
@@ -73,6 +73,9 @@ properties:
phy-names:
const: usb
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
--
2.17.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
` (16 preceding siblings ...)
2020-05-07 11:24 ` [PATCH v2 17/17] dt-bindings: ehci/ohci: Allow iommus property Andre Przywara
@ 2020-05-07 14:04 ` Will Deacon
17 siblings, 0 replies; 21+ messages in thread
From: Will Deacon @ 2020-05-07 14:04 UTC (permalink / raw)
To: Liviu Dudau, Sudeep Holla, Rob Herring, Andre Przywara,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, catalin.marinas, Marc Zyngier,
Will Deacon, linux-arm-kernel
On Thu, 7 May 2020 12:24:13 +0100, Andre Przywara wrote:
> Just some small fixes in v2: changing the GIC binding instead of the
> compatible strings used for Juno, re-ordering the patches, and, most
> importantly, (hopefully) fixing the subject lines ;-)
> I keep the last two patches in, even though I agree that there should be
> a more generic solution.
> -----------------------------------
>
> [...]
Applied the SMMU patch to will (for-joerg/arm-smmu/updates), thanks!
[01/17] dt-bindings: arm-smmu: Allow mmu-400, smmu-v1 compatible
https://git.kernel.org/will/c/bd0d696023cb
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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