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* [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem
@ 2020-07-31  8:18 Laurentiu Palcu
  2020-07-31  8:18 ` [PATCH v9 3/5] drm/imx/dcss: use drm_bridge_connector API Laurentiu Palcu
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Laurentiu Palcu @ 2020-07-31  8:18 UTC (permalink / raw)
  To: Lucas Stach, Pengutronix Kernel Team, Fabio Estevam,
	NXP Linux Team, Laurentiu Palcu, dri-devel, devicetree,
	linux-arm-kernel, linux-kernel
  Cc: agx, lukas, laurentiu.palcu

From: Laurentiu Palcu <laurentiu.palcu@nxp.com>

Hi,

This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).

Support for the rest of the features will be added incrementally, in subsequent
patches.

The patchset was tested with both HDP driver (in the downstream tree) and the upstream
MIPI-DSI driver (with a couple of patches on top, to make it work correctly with DCSS).

Thanks,
Laurentiu

Changes in v9:
 * Fixed a compilation issue found by Guido in his setup: 'select
   VIDEOMODE_HELPERS' was missing from Kconfig;
 * Use imx8mq-clock.h in the bindings file so one can understand what
   those clock values mean;
 * no other changes done. Couldn't address the hang Guido reported as
   it's not happening in my setup. However, in my tree, there are some
   extra NWL and ADV patches applied on top of upstream ones... Also,
   removing them and testing only with upstream, even if there's no
   image out, does not produce a hang... :/

Changes in v8:
 * Removed 'select RESET_CONTROLLER" from Kconfig as Philipp pointed
   out. SRC is not used in DCSS driver;
 * Nothing else changed;

Changes in v7:
 * Added a patch to initialize the connector using the drm_bridge_connector
   API as Sam suggested. Tested it using NWL_DSI and ADV7535 with
   Guido's patch [1] applied and one fix for ADV [2]. Also, some extra
   patches for ADV and NWL were needed, from our downstream tree, which
   will be upstreamed soon by their author;
 * Rest of the patches are untouched;

[1] https://lists.freedesktop.org/archives/dri-devel/2020-July/273025.html
[2] https://lists.freedesktop.org/archives/dri-devel/2020-July/273132.html

Changes in v6:
 * Addressed Rob's comment and added "additionalProperties: false" at
   the end of the bindings' properties. However, this change surfaced
   an issue with the assigned-clock* properties not being documented in
   the properties section. Added the descriptions and the bindings patch
   will need another review;
 * Added an entry for DCSS driver in the MAINTAINERS file;
 * Removed the component framework patch altogether;

Changes in v5:
 * Rebased to latest;
 * Took out component framework support and made it a separate patch so
   that people can still test with HDP driver, which makes use of it.
   But the idea is to get rid of it once HDP driver's next versions
   will remove component framework as well;
 * Slight improvement to modesetting: avoid cutting off the pixel clock
   if the new mode and the old one are equal. Also, in this case, is
   not necessary to wait for DTG to shut off. This would allow to switch
   from 8b RGB to 12b YUV422, for example, with no interruptions (at least
   from DCSS point of view);
 * Do not fire off CTXLD when going to suspend, unless it still has
   entries that need to be committed to DCSS;
 * Addressed Rob's comments on bindings;

Changes in v4:
 * Addressed Lucas and Philipp's comments:
   * Added DRM_KMS_CMA_HELPER dependency in Kconfig;
   * Removed usage of devm_ functions since I'm already doing all the
     clean-up in the submodules_deinit();
   * Moved the drm_crtc_arm_vblank_event() in dcss_crtc_atomic_flush();
   * Removed en_completion variable from dcss_crtc since this was
     introduced mainly to avoid vblank timeout warnings which were fixed
     by arming the vblank event in flush() instead of begin();
   * Removed clks_on and irq_enabled flags since all the calls to
     enabling/disabling clocks and interrupts were balanced;
   * Removed the custom atomic_commit callback and used the DRM core
     helper and, in the process, got rid of a workqueue that wasn't
     necessary anymore;
   * Fixed some minor DT binding issues flagged by Philipp;
   * Some other minor changes suggested by Lucas;
 * Removed YUV formats from the supported formats as these cannot work
   without the HDR10 module CSCs and LUTs. Will add them back when I
   will add support for video planes;

Changes in v3:
 * rebased to latest linux-next and made it compile as drmP.h was
   removed;
 * removed the patch adding the VIDEO2_PLL clock. It's already applied;
 * removed an unnecessary 50ms sleep in the dcss_dtg_sync_set();
 * fixed a a spurious hang reported by Lukas Hartmann and encountered
   by me several times;
 * mask DPR and DTG interrupts by default, as they may come enabled from
   U-boot;

Changes in v2:
 * Removed '0x' in node's unit-address both in DT and yaml;
 * Made the address region size lowercase, to be consistent;
 * Removed some left-over references to P010;
 * Added a Kconfig dependency of DRM && ARCH_MXC. This will also silence compilation
   issues reported by kbuild for other architectures;


Laurentiu Palcu (5):
  drm/imx: compile imx directory by default
  drm/imx: Add initial support for DCSS on iMX8MQ
  drm/imx/dcss: use drm_bridge_connector API
  MAINTAINERS: Add entry for i.MX 8MQ DCSS driver
  dt-bindings: display: imx: add bindings for DCSS

 .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 108 +++
 MAINTAINERS                                   |   8 +
 drivers/gpu/drm/Makefile                      |   2 +-
 drivers/gpu/drm/imx/Kconfig                   |   2 +
 drivers/gpu/drm/imx/Makefile                  |   1 +
 drivers/gpu/drm/imx/dcss/Kconfig              |   9 +
 drivers/gpu/drm/imx/dcss/Makefile             |   6 +
 drivers/gpu/drm/imx/dcss/dcss-blkctl.c        |  70 ++
 drivers/gpu/drm/imx/dcss/dcss-crtc.c          | 219 +++++
 drivers/gpu/drm/imx/dcss/dcss-ctxld.c         | 424 +++++++++
 drivers/gpu/drm/imx/dcss/dcss-dev.c           | 325 +++++++
 drivers/gpu/drm/imx/dcss/dcss-dev.h           | 177 ++++
 drivers/gpu/drm/imx/dcss/dcss-dpr.c           | 562 ++++++++++++
 drivers/gpu/drm/imx/dcss/dcss-drv.c           | 138 +++
 drivers/gpu/drm/imx/dcss/dcss-dtg.c           | 409 +++++++++
 drivers/gpu/drm/imx/dcss/dcss-kms.c           | 198 +++++
 drivers/gpu/drm/imx/dcss/dcss-kms.h           |  44 +
 drivers/gpu/drm/imx/dcss/dcss-plane.c         | 405 +++++++++
 drivers/gpu/drm/imx/dcss/dcss-scaler.c        | 826 ++++++++++++++++++
 drivers/gpu/drm/imx/dcss/dcss-ss.c            | 180 ++++
 20 files changed, 4112 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
 create mode 100644 drivers/gpu/drm/imx/dcss/Kconfig
 create mode 100644 drivers/gpu/drm/imx/dcss/Makefile
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-blkctl.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-crtc.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-ctxld.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dev.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dev.h
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dpr.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-drv.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dtg.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-kms.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-kms.h
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-plane.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-scaler.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-ss.c

-- 
2.23.0


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^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v9 3/5] drm/imx/dcss: use drm_bridge_connector API
  2020-07-31  8:18 [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
@ 2020-07-31  8:18 ` Laurentiu Palcu
  2020-07-31  8:18 ` [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
  2020-07-31  8:54 ` [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem Guido Günther
  2 siblings, 0 replies; 6+ messages in thread
From: Laurentiu Palcu @ 2020-07-31  8:18 UTC (permalink / raw)
  To: Lucas Stach, Philipp Zabel, David Airlie, Daniel Vetter,
	Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
	NXP Linux Team
  Cc: agx, lukas, linux-kernel, dri-devel, laurentiu.palcu, linux-arm-kernel

From: Laurentiu Palcu <laurentiu.palcu@nxp.com>

Make use of drm_bridge_connector API to have the connector initialized by the
display controller.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
---
 drivers/gpu/drm/imx/dcss/dcss-dev.c | 17 +++++++++++++---
 drivers/gpu/drm/imx/dcss/dcss-kms.c | 31 ++++++++++++++++++++++++-----
 drivers/gpu/drm/imx/dcss/dcss-kms.h |  1 +
 3 files changed, 41 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/imx/dcss/dcss-dev.c b/drivers/gpu/drm/imx/dcss/dcss-dev.c
index 83a4840435cf..c849533ca83e 100644
--- a/drivers/gpu/drm/imx/dcss/dcss-dev.c
+++ b/drivers/gpu/drm/imx/dcss/dcss-dev.c
@@ -8,9 +8,12 @@
 #include <linux/of_graph.h>
 #include <linux/pm_runtime.h>
 #include <linux/slab.h>
+#include <drm/drm_bridge_connector.h>
+#include <drm/drm_device.h>
 #include <drm/drm_modeset_helper.h>
 
 #include "dcss-dev.h"
+#include "dcss-kms.h"
 
 static void dcss_clocks_enable(struct dcss_dev *dcss)
 {
@@ -247,9 +250,13 @@ void dcss_dev_destroy(struct dcss_dev *dcss)
 int dcss_dev_suspend(struct device *dev)
 {
 	struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev);
+	struct drm_device *ddev = dcss_drv_dev_to_drm(dev);
+	struct dcss_kms_dev *kms = container_of(ddev, struct dcss_kms_dev, base);
 	int ret;
 
-	drm_mode_config_helper_suspend(dcss_drv_dev_to_drm(dev));
+	drm_bridge_connector_disable_hpd(kms->connector);
+
+	drm_mode_config_helper_suspend(ddev);
 
 	if (pm_runtime_suspended(dev))
 		return 0;
@@ -266,9 +273,11 @@ int dcss_dev_suspend(struct device *dev)
 int dcss_dev_resume(struct device *dev)
 {
 	struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev);
+	struct drm_device *ddev = dcss_drv_dev_to_drm(dev);
+	struct dcss_kms_dev *kms = container_of(ddev, struct dcss_kms_dev, base);
 
 	if (pm_runtime_suspended(dev)) {
-		drm_mode_config_helper_resume(dcss_drv_dev_to_drm(dev));
+		drm_mode_config_helper_resume(ddev);
 		return 0;
 	}
 
@@ -278,7 +287,9 @@ int dcss_dev_resume(struct device *dev)
 
 	dcss_ctxld_resume(dcss->ctxld);
 
-	drm_mode_config_helper_resume(dcss_drv_dev_to_drm(dev));
+	drm_mode_config_helper_resume(ddev);
+
+	drm_bridge_connector_enable_hpd(kms->connector);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.c b/drivers/gpu/drm/imx/dcss/dcss-kms.c
index 3ca49d0a3e61..135a62366ab8 100644
--- a/drivers/gpu/drm/imx/dcss/dcss-kms.c
+++ b/drivers/gpu/drm/imx/dcss/dcss-kms.c
@@ -5,6 +5,7 @@
 
 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
+#include <drm/drm_bridge_connector.h>
 #include <drm/drm_drv.h>
 #include <drm/drm_fb_helper.h>
 #include <drm/drm_gem_cma_helper.h>
@@ -74,7 +75,7 @@ static const struct drm_encoder_funcs dcss_kms_simple_encoder_funcs = {
 	.destroy = drm_encoder_cleanup,
 };
 
-static int dcss_kms_setup_encoder(struct dcss_kms_dev *kms)
+static int dcss_kms_bridge_connector_init(struct dcss_kms_dev *kms)
 {
 	struct drm_device *ddev = &kms->base;
 	struct drm_encoder *encoder = &kms->encoder;
@@ -103,7 +104,23 @@ static int dcss_kms_setup_encoder(struct dcss_kms_dev *kms)
 		return ret;
 	}
 
-	return drm_bridge_attach(encoder, bridge, NULL, 0);
+	ret = drm_bridge_attach(encoder, bridge, NULL,
+				DRM_BRIDGE_ATTACH_NO_CONNECTOR);
+	if (ret < 0) {
+		dev_err(ddev->dev, "Unable to attach bridge %pOF\n",
+			bridge->of_node);
+		return ret;
+	}
+
+	kms->connector = drm_bridge_connector_init(ddev, encoder);
+	if (IS_ERR(kms->connector)) {
+		dev_err(ddev->dev, "Unable to create bridge connector.\n");
+		return PTR_ERR(kms->connector);
+	}
+
+	drm_connector_attach_encoder(kms->connector, encoder);
+
+	return 0;
 }
 
 struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss)
@@ -131,18 +148,20 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss)
 
 	drm->irq_enabled = true;
 
-	ret = dcss_crtc_init(crtc, drm);
+	ret = dcss_kms_bridge_connector_init(kms);
 	if (ret)
 		goto cleanup_mode_config;
 
-	ret = dcss_kms_setup_encoder(kms);
+	ret = dcss_crtc_init(crtc, drm);
 	if (ret)
-		goto cleanup_crtc;
+		goto cleanup_mode_config;
 
 	drm_mode_config_reset(drm);
 
 	drm_kms_helper_poll_init(drm);
 
+	drm_bridge_connector_enable_hpd(kms->connector);
+
 	ret = drm_dev_register(drm, 0);
 	if (ret)
 		goto cleanup_crtc;
@@ -152,6 +171,7 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss)
 	return kms;
 
 cleanup_crtc:
+	drm_bridge_connector_disable_hpd(kms->connector);
 	drm_kms_helper_poll_fini(drm);
 	dcss_crtc_deinit(crtc, drm);
 
@@ -167,6 +187,7 @@ void dcss_kms_detach(struct dcss_kms_dev *kms)
 	struct drm_device *drm = &kms->base;
 
 	drm_dev_unregister(drm);
+	drm_bridge_connector_disable_hpd(kms->connector);
 	drm_kms_helper_poll_fini(drm);
 	drm_atomic_helper_shutdown(drm);
 	drm_crtc_vblank_off(&kms->crtc.base);
diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.h b/drivers/gpu/drm/imx/dcss/dcss-kms.h
index 1f51c86c6986..dfe5dd99eea3 100644
--- a/drivers/gpu/drm/imx/dcss/dcss-kms.h
+++ b/drivers/gpu/drm/imx/dcss/dcss-kms.h
@@ -29,6 +29,7 @@ struct dcss_kms_dev {
 	struct drm_device base;
 	struct dcss_crtc crtc;
 	struct drm_encoder encoder;
+	struct drm_connector *connector;
 };
 
 struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss);
-- 
2.23.0


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^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS
  2020-07-31  8:18 [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
  2020-07-31  8:18 ` [PATCH v9 3/5] drm/imx/dcss: use drm_bridge_connector API Laurentiu Palcu
@ 2020-07-31  8:18 ` Laurentiu Palcu
  2020-07-31  8:52   ` Guido Günther
  2020-07-31 19:34   ` Rob Herring
  2020-07-31  8:54 ` [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem Guido Günther
  2 siblings, 2 replies; 6+ messages in thread
From: Laurentiu Palcu @ 2020-07-31  8:18 UTC (permalink / raw)
  To: Lucas Stach, Philipp Zabel, David Airlie, Daniel Vetter,
	Rob Herring, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, NXP Linux Team
  Cc: devicetree, agx, lukas, linux-kernel, dri-devel, laurentiu.palcu,
	Laurentiu Palcu, linux-arm-kernel

From: Laurentiu Palcu <laurentiu.palcu@nxp.com>

Add bindings for iMX8MQ Display Controller Subsystem.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
---
Changes in v9:
 * Include imx8mq-clock.h in the example so we can use clock names
   instead of their values;

 .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 108 ++++++++++++++++++
 1 file changed, 108 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml

diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
new file mode 100644
index 000000000000..f1f25aa794d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
@@ -0,0 +1,108 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 NXP
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: iMX8MQ Display Controller Subsystem (DCSS)
+
+maintainers:
+  - Laurentiu Palcu <laurentiu.palcu@nxp.com>
+
+description:
+
+  The DCSS (display controller sub system) is used to source up to three
+  display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP
+  2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
+  image processing capabilities are included to provide a solution capable of
+  driving next generation high dynamic range displays.
+
+properties:
+  compatible:
+    const: nxp,imx8mq-dcss
+
+  reg:
+    items:
+      - description: DCSS base address and size, up to IRQ steer start
+      - description: DCSS BLKCTL base address and size
+
+  interrupts:
+    items:
+      - description: Context loader completion and error interrupt
+      - description: DTG interrupt used to signal context loader trigger time
+      - description: DTG interrupt for Vblank
+
+  interrupt-names:
+    items:
+      - const: ctxld
+      - const: ctxld_kick
+      - const: vblank
+
+  clocks:
+    items:
+      - description: Display APB clock for all peripheral PIO access interfaces
+      - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL
+      - description: RTRAM clock
+      - description: Pixel clock, can be driven either by HDMI phy clock or MIPI
+      - description: DTRC clock, needed by video decompressor
+
+  clock-names:
+    items:
+      - const: apb
+      - const: axi
+      - const: rtrm
+      - const: pix
+      - const: dtrc
+
+  assigned-clocks:
+    items:
+      - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_AXI_ROOT
+      - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_RTRM
+      - description: Phandle and clock specifier of either IMX8MQ_VIDEO2_PLL1_REF_SEL or
+                     IMX8MQ_VIDEO_PLL1_REF_SEL
+
+  assigned-clock-parents:
+    items:
+      - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M
+      - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M
+      - description: Phandle and clock specifier of IMX8MQ_CLK_27M
+
+  assigned-clock-rates:
+    items:
+      - description: Must be 800 MHz
+      - description: Must be 400 MHz
+
+  port:
+    type: object
+    description:
+      A port node pointing to the input port of a HDMI/DP or MIPI display bridge.
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mq-clock.h>
+    dcss: display-controller@32e00000 {
+        compatible = "nxp,imx8mq-dcss";
+        reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>;
+        interrupts = <6>, <8>, <9>;
+        interrupt-names = "ctxld", "ctxld_kick", "vblank";
+        interrupt-parent = <&irqsteer>;
+        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
+                 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, <&clk IMX8MQ_VIDEO2_PLL_OUT>,
+                 <&clk IMX8MQ_CLK_DISP_DTRC>;
+        clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
+        assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, <&clk IMX8MQ_CLK_DISP_RTRM>,
+                          <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>;
+        assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS1_PLL_800M>,
+                                 <&clk IMX8MQ_CLK_27M>;
+        assigned-clock-rates = <800000000>,
+                               <400000000>;
+        port {
+            dcss_out: endpoint {
+                remote-endpoint = <&hdmi_in>;
+            };
+        };
+    };
+
-- 
2.23.0


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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS
  2020-07-31  8:18 ` [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
@ 2020-07-31  8:52   ` Guido Günther
  2020-07-31 19:34   ` Rob Herring
  1 sibling, 0 replies; 6+ messages in thread
From: Guido Günther @ 2020-07-31  8:52 UTC (permalink / raw)
  To: Laurentiu Palcu
  Cc: devicetree, Philipp Zabel, David Airlie, Fabio Estevam,
	Sascha Hauer, lukas, linux-kernel, dri-devel, Rob Herring,
	NXP Linux Team, Daniel Vetter, Laurentiu Palcu, Shawn Guo,
	Pengutronix Kernel Team, linux-arm-kernel, Lucas Stach

Hi,
On Fri, Jul 31, 2020 at 11:18:33AM +0300, Laurentiu Palcu wrote:
> From: Laurentiu Palcu <laurentiu.palcu@nxp.com>
> 
> Add bindings for iMX8MQ Display Controller Subsystem.
> 
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
> ---
> Changes in v9:
>  * Include imx8mq-clock.h in the example so we can use clock names
>    instead of their values;

Reviewed-by: Guido Günther <agx@sigxcpu.org> 

(and passed DT bindings check for me)
 -- Guido
> 
>  .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 108 ++++++++++++++++++
>  1 file changed, 108 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
> new file mode 100644
> index 000000000000..f1f25aa794d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
> @@ -0,0 +1,108 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2019 NXP
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: iMX8MQ Display Controller Subsystem (DCSS)
> +
> +maintainers:
> +  - Laurentiu Palcu <laurentiu.palcu@nxp.com>
> +
> +description:
> +
> +  The DCSS (display controller sub system) is used to source up to three
> +  display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP
> +  2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
> +  image processing capabilities are included to provide a solution capable of
> +  driving next generation high dynamic range displays.
> +
> +properties:
> +  compatible:
> +    const: nxp,imx8mq-dcss
> +
> +  reg:
> +    items:
> +      - description: DCSS base address and size, up to IRQ steer start
> +      - description: DCSS BLKCTL base address and size
> +
> +  interrupts:
> +    items:
> +      - description: Context loader completion and error interrupt
> +      - description: DTG interrupt used to signal context loader trigger time
> +      - description: DTG interrupt for Vblank
> +
> +  interrupt-names:
> +    items:
> +      - const: ctxld
> +      - const: ctxld_kick
> +      - const: vblank
> +
> +  clocks:
> +    items:
> +      - description: Display APB clock for all peripheral PIO access interfaces
> +      - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL
> +      - description: RTRAM clock
> +      - description: Pixel clock, can be driven either by HDMI phy clock or MIPI
> +      - description: DTRC clock, needed by video decompressor
> +
> +  clock-names:
> +    items:
> +      - const: apb
> +      - const: axi
> +      - const: rtrm
> +      - const: pix
> +      - const: dtrc
> +
> +  assigned-clocks:
> +    items:
> +      - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_AXI_ROOT
> +      - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_RTRM
> +      - description: Phandle and clock specifier of either IMX8MQ_VIDEO2_PLL1_REF_SEL or
> +                     IMX8MQ_VIDEO_PLL1_REF_SEL
> +
> +  assigned-clock-parents:
> +    items:
> +      - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M
> +      - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M
> +      - description: Phandle and clock specifier of IMX8MQ_CLK_27M
> +
> +  assigned-clock-rates:
> +    items:
> +      - description: Must be 800 MHz
> +      - description: Must be 400 MHz
> +
> +  port:
> +    type: object
> +    description:
> +      A port node pointing to the input port of a HDMI/DP or MIPI display bridge.
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/imx8mq-clock.h>
> +    dcss: display-controller@32e00000 {
> +        compatible = "nxp,imx8mq-dcss";
> +        reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>;
> +        interrupts = <6>, <8>, <9>;
> +        interrupt-names = "ctxld", "ctxld_kick", "vblank";
> +        interrupt-parent = <&irqsteer>;
> +        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
> +                 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, <&clk IMX8MQ_VIDEO2_PLL_OUT>,
> +                 <&clk IMX8MQ_CLK_DISP_DTRC>;
> +        clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
> +        assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, <&clk IMX8MQ_CLK_DISP_RTRM>,
> +                          <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>;
> +        assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS1_PLL_800M>,
> +                                 <&clk IMX8MQ_CLK_27M>;
> +        assigned-clock-rates = <800000000>,
> +                               <400000000>;
> +        port {
> +            dcss_out: endpoint {
> +                remote-endpoint = <&hdmi_in>;
> +            };
> +        };
> +    };
> +
> -- 
> 2.23.0
> 

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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem
  2020-07-31  8:18 [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
  2020-07-31  8:18 ` [PATCH v9 3/5] drm/imx/dcss: use drm_bridge_connector API Laurentiu Palcu
  2020-07-31  8:18 ` [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
@ 2020-07-31  8:54 ` Guido Günther
  2 siblings, 0 replies; 6+ messages in thread
From: Guido Günther @ 2020-07-31  8:54 UTC (permalink / raw)
  To: Laurentiu Palcu
  Cc: devicetree, Fabio Estevam, lukas, linux-kernel, dri-devel,
	NXP Linux Team, Pengutronix Kernel Team, Laurentiu Palcu,
	linux-arm-kernel, Lucas Stach

Hi,
On Fri, Jul 31, 2020 at 11:18:28AM +0300, Laurentiu Palcu wrote:
> From: Laurentiu Palcu <laurentiu.palcu@nxp.com>
> 
> Hi,
> 
> This patchset adds initial DCSS support for iMX8MQ chip. Initial support
> includes only graphics plane support (no video planes), no HDR10 capabilities,
> no graphics decompression (only linear, tiled and super-tiled buffers allowed).
> 
> Support for the rest of the features will be added incrementally, in subsequent
> patches.
> 
> The patchset was tested with both HDP driver (in the downstream tree) and the upstream
> MIPI-DSI driver (with a couple of patches on top, to make it work correctly with DCSS).
> 
> Thanks,
> Laurentiu
> 
> Changes in v9:
>  * Fixed a compilation issue found by Guido in his setup: 'select
>    VIDEOMODE_HELPERS' was missing from Kconfig;
>  * Use imx8mq-clock.h in the bindings file so one can understand what
>    those clock values mean;
>  * no other changes done. Couldn't address the hang Guido reported as
>    it's not happening in my setup. However, in my tree, there are some
>    extra NWL and ADV patches applied on top of upstream ones... Also,
>    removing them and testing only with upstream, even if there's no
>    image out, does not produce a hang... :/

I don't think this should hold up merging.
Cheers,
 -- Guido

> 
> Changes in v8:
>  * Removed 'select RESET_CONTROLLER" from Kconfig as Philipp pointed
>    out. SRC is not used in DCSS driver;
>  * Nothing else changed;
> 
> Changes in v7:
>  * Added a patch to initialize the connector using the drm_bridge_connector
>    API as Sam suggested. Tested it using NWL_DSI and ADV7535 with
>    Guido's patch [1] applied and one fix for ADV [2]. Also, some extra
>    patches for ADV and NWL were needed, from our downstream tree, which
>    will be upstreamed soon by their author;
>  * Rest of the patches are untouched;
> 
> [1] https://lists.freedesktop.org/archives/dri-devel/2020-July/273025.html
> [2] https://lists.freedesktop.org/archives/dri-devel/2020-July/273132.html
> 
> Changes in v6:
>  * Addressed Rob's comment and added "additionalProperties: false" at
>    the end of the bindings' properties. However, this change surfaced
>    an issue with the assigned-clock* properties not being documented in
>    the properties section. Added the descriptions and the bindings patch
>    will need another review;
>  * Added an entry for DCSS driver in the MAINTAINERS file;
>  * Removed the component framework patch altogether;
> 
> Changes in v5:
>  * Rebased to latest;
>  * Took out component framework support and made it a separate patch so
>    that people can still test with HDP driver, which makes use of it.
>    But the idea is to get rid of it once HDP driver's next versions
>    will remove component framework as well;
>  * Slight improvement to modesetting: avoid cutting off the pixel clock
>    if the new mode and the old one are equal. Also, in this case, is
>    not necessary to wait for DTG to shut off. This would allow to switch
>    from 8b RGB to 12b YUV422, for example, with no interruptions (at least
>    from DCSS point of view);
>  * Do not fire off CTXLD when going to suspend, unless it still has
>    entries that need to be committed to DCSS;
>  * Addressed Rob's comments on bindings;
> 
> Changes in v4:
>  * Addressed Lucas and Philipp's comments:
>    * Added DRM_KMS_CMA_HELPER dependency in Kconfig;
>    * Removed usage of devm_ functions since I'm already doing all the
>      clean-up in the submodules_deinit();
>    * Moved the drm_crtc_arm_vblank_event() in dcss_crtc_atomic_flush();
>    * Removed en_completion variable from dcss_crtc since this was
>      introduced mainly to avoid vblank timeout warnings which were fixed
>      by arming the vblank event in flush() instead of begin();
>    * Removed clks_on and irq_enabled flags since all the calls to
>      enabling/disabling clocks and interrupts were balanced;
>    * Removed the custom atomic_commit callback and used the DRM core
>      helper and, in the process, got rid of a workqueue that wasn't
>      necessary anymore;
>    * Fixed some minor DT binding issues flagged by Philipp;
>    * Some other minor changes suggested by Lucas;
>  * Removed YUV formats from the supported formats as these cannot work
>    without the HDR10 module CSCs and LUTs. Will add them back when I
>    will add support for video planes;
> 
> Changes in v3:
>  * rebased to latest linux-next and made it compile as drmP.h was
>    removed;
>  * removed the patch adding the VIDEO2_PLL clock. It's already applied;
>  * removed an unnecessary 50ms sleep in the dcss_dtg_sync_set();
>  * fixed a a spurious hang reported by Lukas Hartmann and encountered
>    by me several times;
>  * mask DPR and DTG interrupts by default, as they may come enabled from
>    U-boot;
> 
> Changes in v2:
>  * Removed '0x' in node's unit-address both in DT and yaml;
>  * Made the address region size lowercase, to be consistent;
>  * Removed some left-over references to P010;
>  * Added a Kconfig dependency of DRM && ARCH_MXC. This will also silence compilation
>    issues reported by kbuild for other architectures;
> 
> 
> Laurentiu Palcu (5):
>   drm/imx: compile imx directory by default
>   drm/imx: Add initial support for DCSS on iMX8MQ
>   drm/imx/dcss: use drm_bridge_connector API
>   MAINTAINERS: Add entry for i.MX 8MQ DCSS driver
>   dt-bindings: display: imx: add bindings for DCSS
> 
>  .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 108 +++
>  MAINTAINERS                                   |   8 +
>  drivers/gpu/drm/Makefile                      |   2 +-
>  drivers/gpu/drm/imx/Kconfig                   |   2 +
>  drivers/gpu/drm/imx/Makefile                  |   1 +
>  drivers/gpu/drm/imx/dcss/Kconfig              |   9 +
>  drivers/gpu/drm/imx/dcss/Makefile             |   6 +
>  drivers/gpu/drm/imx/dcss/dcss-blkctl.c        |  70 ++
>  drivers/gpu/drm/imx/dcss/dcss-crtc.c          | 219 +++++
>  drivers/gpu/drm/imx/dcss/dcss-ctxld.c         | 424 +++++++++
>  drivers/gpu/drm/imx/dcss/dcss-dev.c           | 325 +++++++
>  drivers/gpu/drm/imx/dcss/dcss-dev.h           | 177 ++++
>  drivers/gpu/drm/imx/dcss/dcss-dpr.c           | 562 ++++++++++++
>  drivers/gpu/drm/imx/dcss/dcss-drv.c           | 138 +++
>  drivers/gpu/drm/imx/dcss/dcss-dtg.c           | 409 +++++++++
>  drivers/gpu/drm/imx/dcss/dcss-kms.c           | 198 +++++
>  drivers/gpu/drm/imx/dcss/dcss-kms.h           |  44 +
>  drivers/gpu/drm/imx/dcss/dcss-plane.c         | 405 +++++++++
>  drivers/gpu/drm/imx/dcss/dcss-scaler.c        | 826 ++++++++++++++++++
>  drivers/gpu/drm/imx/dcss/dcss-ss.c            | 180 ++++
>  20 files changed, 4112 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
>  create mode 100644 drivers/gpu/drm/imx/dcss/Kconfig
>  create mode 100644 drivers/gpu/drm/imx/dcss/Makefile
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-blkctl.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-crtc.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-ctxld.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dev.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dev.h
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dpr.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-drv.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dtg.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-kms.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-kms.h
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-plane.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-scaler.c
>  create mode 100644 drivers/gpu/drm/imx/dcss/dcss-ss.c
> 
> -- 
> 2.23.0
> 

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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS
  2020-07-31  8:18 ` [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
  2020-07-31  8:52   ` Guido Günther
@ 2020-07-31 19:34   ` Rob Herring
  1 sibling, 0 replies; 6+ messages in thread
From: Rob Herring @ 2020-07-31 19:34 UTC (permalink / raw)
  To: Laurentiu Palcu
  Cc: Pengutronix Kernel Team, devicetree, Fabio Estevam,
	Philipp Zabel, David Airlie, Shawn Guo, agx, lukas, linux-kernel,
	dri-devel, Rob Herring, NXP Linux Team, Daniel Vetter,
	Laurentiu Palcu, Sascha Hauer, linux-arm-kernel, Lucas Stach

On Fri, 31 Jul 2020 11:18:33 +0300, Laurentiu Palcu wrote:
> From: Laurentiu Palcu <laurentiu.palcu@nxp.com>
> 
> Add bindings for iMX8MQ Display Controller Subsystem.
> 
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
> ---
> Changes in v9:
>  * Include imx8mq-clock.h in the example so we can use clock names
>    instead of their values;
> 
>  .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 108 ++++++++++++++++++
>  1 file changed, 108 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>

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^ permalink raw reply	[flat|nested] 6+ messages in thread

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Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-31  8:18 [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
2020-07-31  8:18 ` [PATCH v9 3/5] drm/imx/dcss: use drm_bridge_connector API Laurentiu Palcu
2020-07-31  8:18 ` [PATCH v9 5/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
2020-07-31  8:52   ` Guido Günther
2020-07-31 19:34   ` Rob Herring
2020-07-31  8:54 ` [PATCH v9 0/5] Add support for iMX8MQ Display Controller Subsystem Guido Günther

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