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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: anshuman.khandual@arm.com, coresight@lists.linaro.org,
	linux-kernel@vger.kernel.org, leo.yan@linaro.org,
	linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org
Subject: Re: [PATCH v6 21/26] coresight: etm4x: Refactor probing routine
Date: Thu, 7 Jan 2021 17:38:28 -0700	[thread overview]
Message-ID: <20210108003828.GE43045@xps15> (raw)
In-Reply-To: <20210107123859.674252-22-suzuki.poulose@arm.com>

On Thu, Jan 07, 2021 at 12:38:54PM +0000, Suzuki K Poulose wrote:
> CoreSight ETM with system register access may not have a
> memory mapped i/o access. Refactor the ETM specific probing
> into a common routine to allow reusing the code for such ETMs.
> 
> Cc: Mike Leach <mike.leach@linaro.org>
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

In V5 you told me to review this again...  I just did so at my tag stand.

> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> Changes since v4:
>  - Refactor the "remove" callback for AMBA driver, for reuse by
>    platform_driver to follow
> ---
>  .../coresight/coresight-etm4x-core.c          | 62 ++++++++++++-------
>  1 file changed, 39 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index f5bbb6131d77..228845f6fdd8 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -1708,14 +1708,11 @@ static void etm4_pm_clear(void)
>  	}
>  }
>  
> -static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
> +static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid)
>  {
>  	int ret;
> -	void __iomem *base;
> -	struct device *dev = &adev->dev;
>  	struct coresight_platform_data *pdata = NULL;
>  	struct etmv4_drvdata *drvdata;
> -	struct resource *res = &adev->res;
>  	struct coresight_desc desc = { 0 };
>  	struct etm4_init_arg init_arg = { 0 };
>  
> @@ -1739,11 +1736,6 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
>  	if (fwnode_property_present(dev_fwnode(dev), "qcom,skip-power-up"))
>  		drvdata->skip_power_up = true;
>  
> -	/* Validity for the resource is already checked by the AMBA core */
> -	base = devm_ioremap_resource(dev, res);
> -	if (IS_ERR(base))
> -		return PTR_ERR(base);
> -
>  	drvdata->base = base;
>  
>  	spin_lock_init(&drvdata->spinlock);
> @@ -1773,7 +1765,7 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
>  	if (IS_ERR(pdata))
>  		return PTR_ERR(pdata);
>  
> -	adev->dev.platform_data = pdata;
> +	dev->platform_data = pdata;
>  
>  	desc.type = CORESIGHT_DEV_TYPE_SOURCE;
>  	desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;
> @@ -1793,7 +1785,6 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
>  
>  	etmdrvdata[drvdata->cpu] = drvdata;
>  
> -	pm_runtime_put(&adev->dev);
>  	dev_info(&drvdata->csdev->dev, "CPU%d: ETM v%d.%d initialized\n",
>  		 drvdata->cpu, ETM_ARCH_MAJOR_VERSION(drvdata->arch),
>  		 ETM_ARCH_MINOR_VERSION(drvdata->arch));
> @@ -1803,11 +1794,30 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
>  		drvdata->boot_enable = true;
>  	}
>  
> -	etm4_check_arch_features(drvdata, id->id);
> +	etm4_check_arch_features(drvdata, etm_pid);
>  
>  	return 0;
>  }
>  
> +static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id)
> +{
> +	void __iomem *base;
> +	struct device *dev = &adev->dev;
> +	struct resource *res = &adev->res;
> +	int ret;
> +
> +	/* Validity for the resource is already checked by the AMBA core */
> +	base = devm_ioremap_resource(dev, res);
> +	if (IS_ERR(base))
> +		return PTR_ERR(base);
> +
> +	ret = etm4_probe(dev, base, id->id);
> +	if (!ret)
> +		pm_runtime_put(&adev->dev);
> +
> +	return ret;
> +}
> +
>  static struct amba_cs_uci_id uci_id_etm4[] = {
>  	{
>  		/*  ETMv4 UCI data */
> @@ -1824,15 +1834,12 @@ static void clear_etmdrvdata(void *info)
>  	etmdrvdata[cpu] = NULL;
>  }
>  
> -static int etm4_remove(struct amba_device *adev)
> +static int __exit etm4_remove_dev(struct etmv4_drvdata *drvdata)
>  {
> -	struct etmv4_drvdata *drvdata = dev_get_drvdata(&adev->dev);
> -
>  	etm_perf_symlink(drvdata->csdev, false);
> -
>  	/*
> -	 * Taking hotplug lock here to avoid racing between etm4_remove and
> -	 * CPU hotplug call backs.
> +	 * Taking hotplug lock here to avoid racing between etm4_remove_dev()
> +	 * and CPU hotplug call backs.
>  	 */
>  	cpus_read_lock();
>  	/*
> @@ -1851,6 +1858,15 @@ static int etm4_remove(struct amba_device *adev)
>  	return 0;
>  }
>  
> +static int __exit etm4_remove_amba(struct amba_device *adev)
> +{
> +	struct etmv4_drvdata *drvdata = dev_get_drvdata(&adev->dev);
> +
> +	if (drvdata)
> +		return etm4_remove_dev(drvdata);
> +	return 0;
> +}
> +
>  static const struct amba_id etm4_ids[] = {
>  	CS_AMBA_ID(0x000bb95d),			/* Cortex-A53 */
>  	CS_AMBA_ID(0x000bb95e),			/* Cortex-A57 */
> @@ -1872,14 +1888,14 @@ static const struct amba_id etm4_ids[] = {
>  
>  MODULE_DEVICE_TABLE(amba, etm4_ids);
>  
> -static struct amba_driver etm4x_driver = {
> +static struct amba_driver etm4x_amba_driver = {
>  	.drv = {
>  		.name   = "coresight-etm4x",
>  		.owner  = THIS_MODULE,
>  		.suppress_bind_attrs = true,
>  	},
> -	.probe		= etm4_probe,
> -	.remove         = etm4_remove,
> +	.probe		= etm4_probe_amba,
> +	.remove         = etm4_remove_amba,
>  	.id_table	= etm4_ids,
>  };
>  
> @@ -1893,7 +1909,7 @@ static int __init etm4x_init(void)
>  	if (ret)
>  		return ret;
>  
> -	ret = amba_driver_register(&etm4x_driver);
> +	ret = amba_driver_register(&etm4x_amba_driver);
>  	if (ret) {
>  		pr_err("Error registering etm4x driver\n");
>  		etm4_pm_clear();
> @@ -1904,7 +1920,7 @@ static int __init etm4x_init(void)
>  
>  static void __exit etm4x_exit(void)
>  {
> -	amba_driver_unregister(&etm4x_driver);
> +	amba_driver_unregister(&etm4x_amba_driver);
>  	etm4_pm_clear();
>  }
>  
> -- 
> 2.24.1
> 

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  reply	other threads:[~2021-01-08  0:41 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-07 12:38 [PATCH v6 00/26] coresight: etm4x: Support for system instructions Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 01/26] coresight: etm4x: Handle access to TRCSSPCICRn Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 02/26] coresight: etm4x: Skip accessing TRCPDCR in save/restore Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 03/26] coresight: Introduce device access abstraction Suzuki K Poulose
2021-01-07 23:38   ` Mathieu Poirier
2021-01-07 12:38 ` [PATCH v6 04/26] coresight: tpiu: Prepare for using coresight " Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 05/26] coresight: Convert coresight_timeout to use " Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 06/26] coresight: Convert claim/disclaim operations to use access wrappers Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 07/26] coresight: etm4x: Always read the registers on the host CPU Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 08/26] coresight: etm4x: Convert all register accesses Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 09/26] coresight: etm4x: Add commentary on the registers Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 10/26] coresight: etm4x: Add sysreg access helpers Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 11/26] coresight: etm4x: Define DEVARCH register fields Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 12/26] coresight: etm4x: Check for Software Lock Suzuki K Poulose
2021-01-08  0:18   ` Mathieu Poirier
2021-01-07 12:38 ` [PATCH v6 13/26] coresight: etm4x: Cleanup secure exception level masks Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 14/26] coresight: etm4x: Clean up " Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 15/26] coresight: etm4x: Handle ETM architecture version Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 16/26] coresight: etm4x: Detect access early on the target CPU Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 17/26] coresight: etm4x: Use TRCDEVARCH for component discovery Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 18/26] coresight: etm4x: Expose trcdevarch via sysfs Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 19/26] coresight: etm4x: Add necessary synchronization for sysreg access Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 20/26] coresight: etm4x: Detect system instructions support Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 21/26] coresight: etm4x: Refactor probing routine Suzuki K Poulose
2021-01-08  0:38   ` Mathieu Poirier [this message]
2021-01-07 12:38 ` [PATCH v6 22/26] coresight: etm4x: Run arch feature detection on the CPU Suzuki K Poulose
2021-01-08  0:49   ` Mathieu Poirier
2021-01-07 12:38 ` [PATCH v6 23/26] coresight: etm4x: Add support for sysreg only devices Suzuki K Poulose
2021-01-08  0:55   ` Mathieu Poirier
2021-01-07 12:38 ` [PATCH v6 24/26] dts: bindings: coresight: ETM system register access only units Suzuki K Poulose
2021-01-07 12:38 ` [PATCH v6 25/26] arm64: Add TRFCR_ELx definitions Suzuki K Poulose
2021-01-08  1:01   ` Mathieu Poirier
2021-01-07 12:38 ` [PATCH v6 26/26] coresight: Add support for v8.4 SelfHosted tracing Suzuki K Poulose
2021-01-08  1:02   ` Mathieu Poirier
2021-01-08  1:09 ` [PATCH v6 00/26] coresight: etm4x: Support for system instructions Mathieu Poirier
2021-01-08  9:08   ` Suzuki K Poulose
2021-01-08 14:15     ` Suzuki K Poulose

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