From: Mark Rutland <mark.rutland@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, james.morse@arm.com, joey.gouly@arm.com,
mark.rutland@arm.com, maz@kernel.org, will@kernel.org
Subject: [PATCH v3 03/20] arm64: entry: convert SError handlers to C
Date: Tue, 25 May 2021 19:32:45 +0100 [thread overview]
Message-ID: <20210525183302.56293-4-mark.rutland@arm.com> (raw)
In-Reply-To: <20210525183302.56293-1-mark.rutland@arm.com>
For various reasons we'd like to convert the bulk of arm64's exception
triage logic to C. As a step towards that, this patch converts the EL1
and EL0 SError triage logic to C.
Separate C functions are added for the native and compat cases so that
in subsequent patches we can handle native/compat differences in C.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/exception.h | 4 ++++
arch/arm64/kernel/entry-common.c | 32 ++++++++++++++++++++++++++++++++
arch/arm64/kernel/entry.S | 16 +++++-----------
arch/arm64/kernel/traps.c | 6 +-----
4 files changed, 42 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/include/asm/exception.h b/arch/arm64/include/asm/exception.h
index 6546158d2f2d..3a859d4e8b59 100644
--- a/arch/arm64/include/asm/exception.h
+++ b/arch/arm64/include/asm/exception.h
@@ -32,8 +32,11 @@ static inline u32 disr_to_esr(u64 disr)
}
asmlinkage void el1_sync_handler(struct pt_regs *regs);
+asmlinkage void el1_error_handler(struct pt_regs *regs);
asmlinkage void el0_sync_handler(struct pt_regs *regs);
+asmlinkage void el0_error_handler(struct pt_regs *regs);
asmlinkage void el0_sync_compat_handler(struct pt_regs *regs);
+asmlinkage void el0_error_compat_handler(struct pt_regs *regs);
asmlinkage void noinstr enter_el1_irq_or_nmi(struct pt_regs *regs);
asmlinkage void noinstr exit_el1_irq_or_nmi(struct pt_regs *regs);
@@ -57,4 +60,5 @@ void do_cp15instr(unsigned int esr, struct pt_regs *regs);
void do_el0_svc(struct pt_regs *regs);
void do_el0_svc_compat(struct pt_regs *regs);
void do_ptrauth_fault(struct pt_regs *regs, unsigned int esr);
+void do_serror(struct pt_regs *regs, unsigned int esr);
#endif /* __ASM_EXCEPTION_H */
diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
index 02be1517e08f..3b7943721077 100644
--- a/arch/arm64/kernel/entry-common.c
+++ b/arch/arm64/kernel/entry-common.c
@@ -279,6 +279,16 @@ asmlinkage void noinstr el1_sync_handler(struct pt_regs *regs)
}
}
+asmlinkage void noinstr el1_error_handler(struct pt_regs *regs)
+{
+ unsigned long esr = read_sysreg(esr_el1);
+
+ local_daif_restore(DAIF_ERRCTX);
+ arm64_enter_nmi(regs);
+ do_serror(regs, esr);
+ arm64_exit_nmi(regs);
+}
+
asmlinkage void noinstr enter_from_user_mode(void)
{
lockdep_hardirqs_off(CALLER_ADDR0);
@@ -468,6 +478,23 @@ asmlinkage void noinstr el0_sync_handler(struct pt_regs *regs)
}
}
+static void __el0_error_handler_common(struct pt_regs *regs)
+{
+ unsigned long esr = read_sysreg(esr_el1);
+
+ enter_from_user_mode();
+ local_daif_restore(DAIF_ERRCTX);
+ arm64_enter_nmi(regs);
+ do_serror(regs, esr);
+ arm64_exit_nmi(regs);
+ local_daif_restore(DAIF_PROCCTX);
+}
+
+asmlinkage void noinstr el0_error_handler(struct pt_regs *regs)
+{
+ __el0_error_handler_common(regs);
+}
+
#ifdef CONFIG_COMPAT
static void noinstr el0_cp15(struct pt_regs *regs, unsigned long esr)
{
@@ -526,4 +553,9 @@ asmlinkage void noinstr el0_sync_compat_handler(struct pt_regs *regs)
el0_inv(regs, esr);
}
}
+
+asmlinkage void noinstr el0_error_compat_handler(struct pt_regs *regs)
+{
+ __el0_error_handler_common(regs);
+}
#endif /* CONFIG_COMPAT */
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 6b2f6f5c5bb8..656f3129bfef 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -757,7 +757,9 @@ SYM_CODE_END(el0_fiq_compat)
SYM_CODE_START_LOCAL_NOALIGN(el0_error_compat)
kernel_entry 0, 32
- b el0_error_naked
+ mov x0, sp
+ bl el0_error_compat_handler
+ b ret_to_user
SYM_CODE_END(el0_error_compat)
#endif
@@ -778,23 +780,15 @@ SYM_CODE_END(el0_fiq)
SYM_CODE_START_LOCAL(el1_error)
kernel_entry 1
- mrs x1, esr_el1
- enable_dbg
mov x0, sp
- bl do_serror
+ bl el1_error_handler
kernel_exit 1
SYM_CODE_END(el1_error)
SYM_CODE_START_LOCAL(el0_error)
kernel_entry 0
-el0_error_naked:
- mrs x25, esr_el1
- user_exit_irqoff
- enable_dbg
mov x0, sp
- mov x1, x25
- bl do_serror
- enable_daif
+ bl el0_error_handler
b ret_to_user
SYM_CODE_END(el0_error)
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 41f0aa92022a..5fd12d19ef4b 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -869,15 +869,11 @@ bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr)
}
}
-asmlinkage void noinstr do_serror(struct pt_regs *regs, unsigned int esr)
+void do_serror(struct pt_regs *regs, unsigned int esr)
{
- arm64_enter_nmi(regs);
-
/* non-RAS errors are not containable */
if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr))
arm64_serror_panic(regs, esr);
-
- arm64_exit_nmi(regs);
}
/* GENERIC_BUG traps */
--
2.11.0
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next prev parent reply other threads:[~2021-05-25 18:37 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-25 18:32 [PATCH v3 00/20] arm64: entry: migrate more code to C Mark Rutland
2021-05-25 18:32 ` [PATCH v3 01/20] arm64: remove redundant local_daif_mask() in bad_mode() Mark Rutland
2021-05-27 12:34 ` Marc Zyngier
2021-05-25 18:32 ` [PATCH v3 02/20] arm64: entry: unmask IRQ+FIQ after EL0 handling Mark Rutland
2021-06-04 16:47 ` Will Deacon
2021-05-25 18:32 ` Mark Rutland [this message]
2021-05-25 18:32 ` [PATCH v3 04/20] arm64: entry: move arm64_preempt_schedule_irq to entry-common.c Mark Rutland
2021-05-25 18:32 ` [PATCH v3 05/20] arm64: entry: move preempt logic to C Mark Rutland
2021-06-04 15:43 ` Will Deacon
2021-06-04 16:54 ` Mark Rutland
2021-05-25 18:32 ` [PATCH v3 06/20] arm64: entry: add a call_on_irq_stack helper Mark Rutland
2021-05-25 18:32 ` [PATCH v3 07/20] arm64: entry: convert IRQ+FIQ handlers to C Mark Rutland
2021-05-25 18:32 ` [PATCH v3 08/20] arm64: entry: organise entry handlers consistently Mark Rutland
2021-06-04 16:51 ` Will Deacon
2021-06-04 17:39 ` Mark Rutland
2021-06-04 17:44 ` Will Deacon
2021-06-04 18:01 ` Mark Rutland
2021-05-25 18:32 ` [PATCH v3 09/20] arm64: entry: organise entry vectors consistently Mark Rutland
2021-05-25 18:32 ` [PATCH v3 10/20] arm64: entry: consolidate EL1 exception returns Mark Rutland
2021-05-25 18:32 ` [PATCH v3 11/20] arm64: entry: move bad_mode() to entry-common.c Mark Rutland
2021-06-04 16:57 ` Will Deacon
2021-06-04 17:42 ` Mark Rutland
2021-06-04 17:43 ` Will Deacon
2021-05-25 18:32 ` [PATCH v3 12/20] arm64: entry: improve bad_mode() Mark Rutland
2021-05-25 18:32 ` [PATCH v3 13/20] arm64: entry: template the entry asm functions Mark Rutland
2021-05-25 18:32 ` [PATCH v3 14/20] arm64: entry: handle all vectors with C Mark Rutland
2021-06-04 17:13 ` Will Deacon
2021-05-25 18:32 ` [PATCH v3 15/20] arm64: entry: fold el1_inv() into el1h_64_sync_handler() Mark Rutland
2021-05-25 18:32 ` [PATCH v3 16/20] arm64: entry: split bad stack entry Mark Rutland
2021-05-25 18:32 ` [PATCH v3 17/20] arm64: entry: split SDEI entry Mark Rutland
2021-05-25 18:33 ` [PATCH v3 18/20] arm64: entry: make NMI entry/exit functions static Mark Rutland
2021-05-25 18:33 ` [PATCH v3 19/20] arm64: entry: don't instrument entry code with KCOV Mark Rutland
2021-06-04 17:16 ` Will Deacon
2021-06-04 17:49 ` Mark Rutland
2021-05-25 18:33 ` [PATCH v3 20/20] arm64: idle: don't instrument idle " Mark Rutland
2021-05-27 14:06 ` [PATCH v3 00/20] arm64: entry: migrate more code to C Catalin Marinas
2021-05-27 15:31 ` Marc Zyngier
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