From: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: Ard Biesheuvel <ardb@kernel.org>,
linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com,
maz@kernel.org, anshuman.khandual@arm.com, steve.capper@arm.com
Subject: Re: [RFC PATCH] arm64: mm: limit linear region to 51 bits for KVM in nVHE mode
Date: Thu, 26 Aug 2021 14:31:20 +0100 [thread overview]
Message-ID: <20210826133118.GC30910@arm.com> (raw)
In-Reply-To: <20210824105920.GB22752@willie-the-truck>
On Tue, Aug 24, 2021 at 11:59:20AM +0100, Will Deacon wrote:
> On Tue, Aug 10, 2021 at 06:12:44PM +0200, Ard Biesheuvel wrote:
> > KVM in nVHE mode divides up its VA space into two equal halves, and
> > picks the half that does not conflict with the HYP ID map to map its
> > linear region. This worked fine when the kernel's linear map itself was
> > guaranteed to cover precisely as many bits of VA space, but this was
> > changed by commit f4693c2716b35d08 ("arm64: mm: extend linear region for
> > 52-bit VA configurations").
> >
> > The result is that, depending on the placement of the ID map, kernel-VA
> > to hyp-VA translations may produce addresses that either conflict with
> > other HYP mappings (including the ID map itself) or generate addresses
> > outside of the 52-bit addressable range, neither of which is likely to
> > lead to anything useful.
> >
> > Given that 52-bit capable cores are guaranteed to implement VHE, this
> > only affects configurations such as pKVM where we opt into non-VHE mode
> > even if the hardware is VHE capable. So just for these configurations,
> > let's limit the kernel linear map to 51 bits and work around the
> > problem.
> >
> > Fixes:f4693c2716b35d08 ("arm64: mm: extend linear region for 52-bit VA configurations")
> > Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> > ---
> > NOTE: build tested only
> >
> > arch/arm64/mm/init.c | 16 +++++++++++++++-
> > 1 file changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> > index 8490ed2917ff..542dad13e2fc 100644
> > --- a/arch/arm64/mm/init.c
> > +++ b/arch/arm64/mm/init.c
> > @@ -282,7 +282,21 @@ static void __init fdt_enforce_memory_region(void)
> >
> > void __init arm64_memblock_init(void)
> > {
> > - const s64 linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual);
> > + s64 linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual);
> > +
> > + /*
> > + * Corner case: 52-bit VA capable systems running KVM in nVHE mode may
> > + * be limited in their ability to support a linear map that exceeds 51
> > + * bits of VA space, depending on the placement of the ID map. Given
> > + * that the placement of the ID map may be randomized, let's simply
> > + * limit the kernel's linear map to 51 bits as well if we detect this
> > + * configuration.
> > + */
> > + if (IS_ENABLED(CONFIG_KVM) && vabits_actual == 52 &&
> > + !is_kernel_in_hyp_mode()) {
> > + pr_info("Capping linear region to 51 bits for KVM in nVHE mode on LVA capable hardware.\n");
> > + linear_region_size = BIT(51);
> > + }
>
> Slight nit, but to avoid having to think about PAGE_END I think this would
> be a little clearer as:
>
> if (IS_ENABLED(CONFIG_KVM) && !is_kernel_in_hyp_mode())
> linear_region_size = min_t(u64, linear_region_size, BIT(51));
BTW, do we also need to check is_hyp_mode_available() (instead of just
CONFIG_KVM)? We don't need this reduction for a guest.
--
Catalin
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next prev parent reply other threads:[~2021-08-26 13:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 16:12 [RFC PATCH] arm64: mm: limit linear region to 51 bits for KVM in nVHE mode Ard Biesheuvel
2021-08-24 10:59 ` Will Deacon
2021-08-24 12:56 ` Ard Biesheuvel
2021-08-26 12:16 ` Catalin Marinas
2021-08-26 12:23 ` Ard Biesheuvel
2021-08-26 13:31 ` Catalin Marinas [this message]
2021-08-26 16:34 ` Ard Biesheuvel
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