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From: Rob Herring <robh@kernel.org>
To: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Cc: devicetree@vger.kernel.org, alexandre.belloni@bootlin.com,
	linux-kernel@vger.kernel.org, UNGLinuxDriver@microchip.com,
	krzysztof.kozlowski+dt@linaro.org, claudiu.beznea@microchip.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] dt-bindings: mfd: atmel,flexcom: Add new compatible string for lan966x
Date: Fri, 3 Jun 2022 15:36:15 -0500	[thread overview]
Message-ID: <20220603203615.GA862209-robh@kernel.org> (raw)
In-Reply-To: <20220603121802.30320-3-kavyasree.kotagiri@microchip.com>

On Fri, Jun 03, 2022 at 05:48:01PM +0530, Kavyasree Kotagiri wrote:
> LAN966x SoC flexcoms has two optional I/O lines. Namely, CS0 and CS1 in
> flexcom SPI mode. CTS and RTS in flexcom USART mode. These pins
> can be mapped to lan966x FLEXCOM_SHARED[0-20] pins and usage depends on
> functions being configured.
> 
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> ---
>  .../bindings/mfd/atmel,flexcom.yaml           | 21 ++++++++++++++++++-
>  1 file changed, 20 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
> index 221bd840b49e..6050482ad8ef 100644
> --- a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
> +++ b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
> @@ -16,7 +16,9 @@ description:
>  
>  properties:
>    compatible:
> -    const: atmel,sama5d2-flexcom
> +    enum:
> +      - atmel,sama5d2-flexcom
> +      - microchip,lan966x-flexcom
>  
>    reg:
>      maxItems: 1
> @@ -46,6 +48,21 @@ properties:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      enum: [1, 2, 3]
>  
> +  microchip,flx-shrd-pins:
> +    description: Specify the Flexcom shared pins to be used for flexcom
> +      chip-selects.
> +    $ref: /schemas/types.yaml#/definitions/uint32

The driver seems to think this is an array.

> +    minimum: 0
> +    maximum: 20
> +
> +  microchip,flx-cs-names:
> +    description: Chip select names. "cts", "rts" for flexcom USART "CTS" and
> +      "RTS" lines. "cs0", "cs1" for flexcom SPI chip-select lines.
> +    items:
> +      enum: [ cs0, cs1, cts, rts ]
> +    minItems: 1
> +    maxItems: 2
> +
>  patternProperties:
>    "^serial@[0-9a-f]+$":
>      description: See atmel-usart.txt for details of USART bindings.
> @@ -80,6 +97,8 @@ examples:
>            #size-cells = <1>;
>            ranges = <0x0 0xf8034000 0x800>;
>            atmel,flexcom-mode = <2>;
> +          microchip,flx-shrd-pins = <9>;
> +          microchip,flx-cs-names = "cs0";
>  
>            spi0: spi@400 {
>                  compatible = "atmel,at91rm9200-spi";
> -- 
> 2.17.1
> 
> 

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  reply	other threads:[~2022-06-03 20:37 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-03 12:17 [PATCH 0/3] Add support for lan966x flexcom chip-select configuration Kavyasree Kotagiri
2022-06-03 12:18 ` [PATCH 1/3] dt-bindings: mfd: atmel,flexcom: Convert to json-schema Kavyasree Kotagiri
2022-06-03 20:34   ` Rob Herring
2022-06-06 13:01   ` Krzysztof Kozlowski
2022-06-06 13:25     ` Kavyasree.Kotagiri
2022-06-07  6:55       ` Kavyasree.Kotagiri
2022-06-07  7:04         ` Krzysztof Kozlowski
2022-06-03 12:18 ` [PATCH 2/3] dt-bindings: mfd: atmel,flexcom: Add new compatible string for lan966x Kavyasree Kotagiri
2022-06-03 20:36   ` Rob Herring [this message]
2022-06-06 13:03   ` Krzysztof Kozlowski
2022-06-06 13:28     ` Kavyasree.Kotagiri
2022-06-07  7:05       ` Krzysztof Kozlowski
2022-06-07  7:54         ` Kavyasree.Kotagiri
2022-06-07  7:56           ` Krzysztof Kozlowski
2022-06-03 12:18 ` [PATCH 3/3] mfd: atmel-flexcom: Add support for lan966x flexcom chip-select configuration Kavyasree Kotagiri
2022-06-06  8:44   ` Claudiu.Beznea

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