Re: [RESEND PATCH v3 0/2] perf: ARM CoreSight PMU support

From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Besar Wicaksono <bwicaksono@nvidia.com>
Cc: suzuki.poulose@arm.com, robin.murphy@arm.com,
	catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
	sudeep.holla@arm.com, thanu.rangarajan@arm.com,
	Michael.Williams@arm.com, treding@nvidia.com,
	jonathanh@nvidia.com, vsethi@nvidia.com, mike.leach@linaro.org,
	leo.yan@linaro.org
Subject: Re: [RESEND PATCH v3 0/2] perf: ARM CoreSight PMU support
Date: Thu, 7 Jul 2022 10:37:01 -0600	[thread overview]
Message-ID: <20220707163701.GA2616901@p14s> (raw)
In-Reply-To: <20220621055035.31766-1-bwicaksono@nvidia.com>

I will look at this patchset next week.

Thanks,
Mathieu

On Tue, Jun 21, 2022 at 12:50:33AM -0500, Besar Wicaksono wrote:
> Add driver support for ARM CoreSight PMU device and event attributes for NVIDIA
> implementation. The code is based on ARM Coresight PMU architecture and ACPI ARM
> Performance Monitoring Unit table (APMT) specification below:
>  * ARM Coresight PMU:
>         https://developer.arm.com/documentation/ihi0091/latest
>  * APMT: https://developer.arm.com/documentation/den0117/latest
> 
> Notes:
>  * There is a concern on the naming of the PMU device.
>    Currently the driver is probing "arm-coresight-pmu" device, however the APMT
>    spec supports different kinds of CoreSight PMU based implementation. So it is
>    open for discussion if the name can stay or a "generic" name is required.
>    Please see the following thread:
>    http://lists.infradead.org/pipermail/linux-arm-kernel/2022-May/740485.html
> 
> The patchset applies on top of
>   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
>   master next-20220524
> 
> Changes from v2:
>  * Driver is now probing "arm-system-pmu" device.
>  * Change default PMU naming to "arm_<APMT node type>_pmu".
>  * Add implementor ops to generate custom name.
> Thanks to suzuki.poulose@arm.com for the review comments.
> v2: https://lore.kernel.org/all/20220515163044.50055-1-bwicaksono@nvidia.com/
> 
> Changes from v1:
>  * Remove CPU arch dependency.
>  * Remove 32-bit read/write helper function and just use read/writel.
>  * Add .is_visible into event attribute to filter out cycle counter event.
>  * Update pmiidr matching.
>  * Remove read-modify-write on PMCR since the driver only writes to PMCR.E.
>  * Assign default cycle event outside the 32-bit PMEVTYPER range.
>  * Rework the active event and used counter tracking.
> Thanks to robin.murphy@arm.com for the review comments.
> v1: https://lore.kernel.org/all/20220509002810.12412-1-bwicaksono@nvidia.com/
> 
> Besar Wicaksono (2):
>   perf: coresight_pmu: Add support for ARM CoreSight PMU driver
>   perf: coresight_pmu: Add support for NVIDIA SCF and MCF attribute
> 
>  arch/arm64/configs/defconfig                  |    1 +
>  drivers/perf/Kconfig                          |    2 +
>  drivers/perf/Makefile                         |    1 +
>  drivers/perf/coresight_pmu/Kconfig            |   11 +
>  drivers/perf/coresight_pmu/Makefile           |    7 +
>  .../perf/coresight_pmu/arm_coresight_pmu.c    | 1316 +++++++++++++++++
>  .../perf/coresight_pmu/arm_coresight_pmu.h    |  177 +++
>  .../coresight_pmu/arm_coresight_pmu_nvidia.c  |  312 ++++
>  .../coresight_pmu/arm_coresight_pmu_nvidia.h  |   17 +
>  9 files changed, 1844 insertions(+)
>  create mode 100644 drivers/perf/coresight_pmu/Kconfig
>  create mode 100644 drivers/perf/coresight_pmu/Makefile
>  create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.c
>  create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.h
>  create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu_nvidia.c
>  create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu_nvidia.h
> 
> 
> base-commit: 09ce5091ff971cdbfd67ad84dc561ea27f10d67a
> -- 
> 2.17.1
> 

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