From: kernel test robot <lkp@intel.com>
To: Peter Griffin <peter.griffin@linaro.org>,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org,
tomasz.figa@gmail.com, s.nawrocki@samsung.com,
linus.walleij@linaro.org, wim@linux-watchdog.org,
linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org,
arnd@arndb.de, olof@lixom.net, cw00.choi@samsung.com
Cc: oe-kbuild-all@lists.linux.dev, peter.griffin@linaro.org,
tudor.ambarus@linaro.org, andre.draszik@linaro.org,
semen.protsenko@linaro.org, soc@kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org
Subject: Re: [PATCH 13/21] clk: samsung: clk-gs101: Add cmu_top registers, plls, mux and gates
Date: Fri, 6 Oct 2023 12:16:30 +0800 [thread overview]
Message-ID: <202310061231.Awh3otY7-lkp@intel.com> (raw)
In-Reply-To: <20231005155618.700312-14-peter.griffin@linaro.org>
Hi Peter,
kernel test robot noticed the following build warnings:
[auto build test WARNING on krzk/for-next]
[also build test WARNING on robh/for-next linus/master v6.6-rc4 next-20231005]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Peter-Griffin/dt-bindings-interrupt-controller-Add-gs101-interrupt-controller/20231005-235922
base: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git for-next
patch link: https://lore.kernel.org/r/20231005155618.700312-14-peter.griffin%40linaro.org
patch subject: [PATCH 13/21] clk: samsung: clk-gs101: Add cmu_top registers, plls, mux and gates
config: nios2-allyesconfig (https://download.01.org/0day-ci/archive/20231006/202310061231.Awh3otY7-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231006/202310061231.Awh3otY7-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202310061231.Awh3otY7-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from drivers/clk/samsung/clk-gs101.c:17:
>> drivers/clk/samsung/clk-gs101.c:935:7: warning: 'mout_cmu_g2d_p' defined but not used [-Wunused-const-variable=]
935 | PNAME(mout_cmu_g2d_p) = { "dout_shared0_div3", "fout_shared3_pll",
| ^~~~~~~~~~~~~~
drivers/clk/samsung/clk.h:226:44: note: in definition of macro 'PNAME'
226 | #define PNAME(x) static const char * const x[] __initconst
| ^
>> drivers/clk/samsung/clk-gs101.c:888:7: warning: 'mout_cmu_boost_p' defined but not used [-Wunused-const-variable=]
888 | PNAME(mout_cmu_boost_p) = { "dout_shared0_div4", "dout_shared1_div4",
| ^~~~~~~~~~~~~~~~
drivers/clk/samsung/clk.h:226:44: note: in definition of macro 'PNAME'
226 | #define PNAME(x) static const char * const x[] __initconst
| ^
>> drivers/clk/samsung/clk-gs101.c:809:7: warning: 'mout_cmu_pdp_vra_p' defined but not used [-Wunused-const-variable=]
809 | PNAME(mout_cmu_pdp_vra_p) = { "fout_shared2_pll", "dout_shared0_div3",
| ^~~~~~~~~~~~~~~~~~
drivers/clk/samsung/clk.h:226:44: note: in definition of macro 'PNAME'
226 | #define PNAME(x) static const char * const x[] __initconst
| ^
vim +/mout_cmu_g2d_p +935 drivers/clk/samsung/clk-gs101.c
790
791 PNAME(mout_cmu_hsi2_ufs_embd_p) = { "oscclk", "dout_shared0_div4",
792 "dout_shared2_div2", "fout_spare_pll" };
793
794 PNAME(mout_cmu_hsi2_mmc_card_p) = { "fout_shared2_pll", "fout_shared3_pll",
795 "dout_shared0_div4", "fout_spare_pll" };
796
797 /* List of parent clocks for Muxes in CMU_TOP: for CMU_CSIS */
798 PNAME(mout_cmu_csis_bus_p) = { "dout_shared0_div3", "fout_shared3_pll",
799 "dout_shared1_div3", "dout_shared0_div4",
800 "dout_shared1_div4", "dout_shared2_div2",
801 "fout_spare_pll" };
802
803 /* List of parent clocks for Muxes in CMU_TOP: for CMU_PDP */
804 PNAME(mout_cmu_pdp_bus_p) = { "dout_shared0_div3", "fout_shared3_pll",
805 "dout_shared1_div3", "dout_shared0_div4",
806 "dout_shared1_div4", "dout_shared2_div2",
807 "fout_spare_pll" };
808
> 809 PNAME(mout_cmu_pdp_vra_p) = { "fout_shared2_pll", "dout_shared0_div3",
810 "fout_shared3_pll", "dout_shared1_div3",
811 "dout_shared0_div4", "dout_shared1_div4",
812 "fout_spare_pll" };
813
814 /* List of parent clocks for Muxes in CMU_TOP: for CMU_IPP */
815 PNAME(mout_cmu_ipp_bus_p) = { "dout_shared0_div3", "fout_shared3_pll",
816 "dout_shared1_div3", "dout_shared0_div4",
817 "dout_shared1_div4", "dout_shared2_div2",
818 "fout_spare_pll" };
819
820 /* List of parent clocks for Muxes in CMU_TOP: for CMU_G3AA */
821 PNAME(mout_cmu_g3aa_p) = { "dout_shared0_div3", "fout_shared3_pll",
822 "dout_shared1_div3", "dout_shared0_div4",
823 "dout_shared1_div4", "dout_shared2_div2",
824 "fout_spare_pll" };
825
826 /* List of parent clocks for Muxes in CMU_TOP: for CMU_ITP */
827 PNAME(mout_cmu_itp_bus_p) = { "dout_shared0_div3", "fout_shared3_pll",
828 "dout_shared1_div3", "dout_shared0_div4",
829 "dout_shared1_div4", "dout_shared2_div2",
830 "fout_spare_pll" };
831
832 /* List of parent clocks for Muxes in CMU_TOP: for CMU_DNS */
833 PNAME(mout_cmu_dns_bus_p) = { "dout_shared0_div3", "fout_shared3_pll",
834 "dout_shared1_div3", "dout_shared0_div4",
835 "dout_shared1_div4", "dout_shared2_div2",
836 "fout_spare_pll" };
837
838 /* List of parent clocks for Muxes in CMU_TOP: for CMU_TNR */
839 PNAME(mout_cmu_tnr_bus_p) = { "dout_shared0_div3", "fout_shared3_pll",
840 "dout_shared1_div3", "dout_shared0_div4",
841 "dout_shared1_div4", "dout_shared2_div2",
842 "fout_spare_pll" };
843
844 /* List of parent clocks for Muxes in CMU_TOP: for CMU_MCSC */
845 PNAME(mout_cmu_mcsc_itsc_p) = { "dout_shared0_div3", "fout_shared3_pll",
846 "dout_shared1_div3", "dout_shared0_div4",
847 "dout_shared1_div4", "dout_shared2_div2",
848 "fout_spare_pll" };
849
850 PNAME(mout_cmu_mcsc_mcsc_p) = { "dout_shared0_div3", "fout_shared3_pll",
851 "dout_shared1_div3", "dout_shared0_div4",
852 "dout_shared1_div4", "dout_shared2_div2",
853 "fout_spare_pll" };
854
855 /* List of parent clocks for Muxes in CMU_TOP: for CMU_GDC */
856 PNAME(mout_cmu_gdc_scsc_p) = { "dout_shared0_div3", "fout_shared3_pll",
857 "dout_shared1_div3", "dout_shared0_div4",
858 "dout_shared1_div4", "dout_shared2_div2",
859 "fout_spare_pll" };
860
861 PNAME(mout_cmu_gdc_gdc0_p) = { "dout_shared0_div3", "fout_shared3_pll",
862 "dout_shared1_div3", "dout_shared0_div4",
863 "dout_shared1_div4", "dout_shared2_div2",
864 "fout_spare_pll" };
865
866 PNAME(mout_cmu_gdc_gdc1_p) = { "dout_shared0_div3", "fout_shared3_pll",
867 "dout_shared1_div3", "dout_shared0_div4",
868 "dout_shared1_div4", "dout_shared2_div2",
869 "fout_spare_pll" };
870
871 /* List of parent clocks for Muxes in CMU_TOP: for CMU_MFC */
872 PNAME(mout_cmu_mfc_mfc_p) = { "dout_shared0_div3", "fout_shared3_pll",
873 "dout_shared1_div3", "dout_shared0_div4",
874 "dout_shared1_div4", "dout_shared2_div2",
875 "fout_spare_pll" };
876
877 /* List of parent clocks for Muxes in CMU_TOP: for DDRPHY0/1/2/3 */
878
879 PNAME(mout_cmu_mif_switch_p) = { "fout_shared0_pll", "fout_shared1_pll",
880 "dout_shared0_div2", "dout_shared1_div2",
881 "fout_shared2_pll", "dout_shared0_div3",
882 "fout_shared3_pll", "fout_spare_pll" };
883
884 /* List of parent clocks for Muxes in CMU_TOP: for CMU_MIF0/1/2/3 */
885 PNAME(mout_cmu_mif_busp_p) = { "dout_shared0_div4", "dout_shared1_div4",
886 "dout_shared0_div5", "fout_spare_pll" };
887
> 888 PNAME(mout_cmu_boost_p) = { "dout_shared0_div4", "dout_shared1_div4",
889 "dout_shared2_div2", "dout_shared3_div2" };
890
891 /* List of parent clocks for Muxes in CMU_TOP: for CMU_MISC */
892 PNAME(mout_cmu_misc_bus_p) = { "dout_shared0_div4", "dout_shared2_div2",
893 "dout_shared3_div2", "fout_spare_pll" };
894 PNAME(mout_cmu_misc_sss_p) = { "dout_shared0_div4", "dout_shared2_div2",
895 "dout_shared3_div2", "fout_spare_pll" };
896
897 /* List of parent clocks for Muxes in CMU_TOP: for CMU_PERIC0 */
898 PNAME(mout_cmu_peric0_bus_p) = { "dout_shared0_div4", "dout_shared2_div2",
899 "dout_shared3_div2", "fout_spare_pll" };
900 PNAME(mout_cmu_peric0_ip_p) = { "dout_shared0_div4", "dout_shared2_div2",
901 "dout_shared3_div2", "fout_spare_pll" };
902
903 /* List of parent clocks for Muxes in CMU_TOP: for CMU_PERIC1 */
904 PNAME(mout_cmu_peric1_bus_p) = { "dout_shared0_div4", "dout_shared2_div2",
905 "dout_shared3_div2", "fout_spare_pll" };
906 PNAME(mout_cmu_peric1_ip_p) = { "dout_shared0_div4", "dout_shared2_div2",
907 "dout_shared3_div2", "fout_spare_pll" };
908
909 /* List of parent clocks for Muxes in CMU_TOP: for CMU_TPU */
910 PNAME(mout_cmu_tpu_tpu_p) = { "dout_shared0_div2", "dout_shared1_div2",
911 "fout_shared2_pll", "fout_shared3_pll",
912 "dout_shared0_div3", "dout_shared1_div3",
913 "dout_shared0_div4", "fout_spare_pll" };
914
915 PNAME(mout_cmu_tpu_tpuctl_p) = { "dout_shared0_div2", "dout_shared1_div2",
916 "fout_shared2_pll", "fout_shared3_pll",
917 "dout_shared0_div3", "dout_shared1_div3",
918 "dout_shared0_div4", "fout_spare_pll" };
919
920 PNAME(mout_cmu_tpu_bus_p) = { "dout_shared0_div2", "dout_shared1_div2",
921 "fout_shared2_pll", "fout_shared3_pll",
922 "dout_shared0_div3", "dout_shared1_div3",
923 "dout_shared0_div4", "fout_spare_pll" };
924
925 PNAME(mout_cmu_tpu_uart_p) = { "dout_shared0_div4", "dout_shared2_div2",
926 "dout_shared3_div2", "fout_spare_pll" };
927
928 /* List of parent clocks for Muxes in CMU_TOP: for CMU_BO */
929 PNAME(mout_cmu_bo_bus_p) = { "fout_shared2_pll", "dout_shared0_div3",
930 "fout_shared3_pll", "dout_shared1_div3",
931 "dout_shared0_div4", "dout_shared1_div4",
932 "fout_spare_pll" };
933
934 /* List of parent clocks for Muxes in CMU_TOP: for CMU_G2D */
> 935 PNAME(mout_cmu_g2d_p) = { "dout_shared0_div3", "fout_shared3_pll",
936 "dout_shared1_div3", "dout_shared0_div4",
937 "dout_shared1_div4", "dout_shared2_div2",
938 "fout_spare_pll" };
939
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next prev parent reply other threads:[~2023-10-06 4:17 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-05 15:55 [PATCH 00/21] Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board Peter Griffin
2023-10-05 15:55 ` [PATCH 01/21] dt-bindings: interrupt-controller: Add gs101 interrupt controller Peter Griffin
2023-10-05 16:04 ` Krzysztof Kozlowski
2023-10-06 21:52 ` Linus Walleij
2023-10-05 15:55 ` [PATCH 02/21] dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible Peter Griffin
2023-10-05 16:05 ` Krzysztof Kozlowski
2023-10-05 15:56 ` [PATCH 03/21] dt-bindings: clock: Add Google gs101 clock management unit bindings Peter Griffin
2023-10-05 16:06 ` Krzysztof Kozlowski
2023-10-05 15:56 ` [PATCH 04/21] dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 Peter Griffin
2023-10-05 16:07 ` Krzysztof Kozlowski
2023-10-06 12:41 ` Peter Griffin
2023-10-06 12:43 ` Krzysztof Kozlowski
2023-10-05 15:56 ` [PATCH 05/21] dt-bindings: watchdog: Document Google gs101 & gs201 watchdog bindings Peter Griffin
2023-10-05 16:08 ` Krzysztof Kozlowski
2023-10-05 17:37 ` William McVicker
2023-10-05 15:56 ` [PATCH 06/21] dt-bindings: arm: google: Add bindings for Google ARM platforms Peter Griffin
2023-10-06 20:44 ` Rob Herring
2023-10-05 15:56 ` [PATCH 07/21] dt-bindings: pinctrl: samsung: add google,gs101-pinctrl compatible Peter Griffin
2023-10-05 16:10 ` Krzysztof Kozlowski
2023-10-05 15:56 ` [PATCH 08/21] dt-bindings: pinctrl: samsung: add gs101-wakeup-eint compatible Peter Griffin
2023-10-05 16:10 ` Krzysztof Kozlowski
2023-10-05 15:56 ` [PATCH 09/21] dt-bindings: clock: gs101: Add cmu_top clock indices Peter Griffin
2023-10-05 16:11 ` Krzysztof Kozlowski
2023-10-08 22:48 ` Chanwoo Choi
2023-10-05 15:56 ` [PATCH 10/21] dt-bindings: clock: gs101: Add cmu_apm " Peter Griffin
2023-10-05 16:11 ` Krzysztof Kozlowski
2023-10-05 15:56 ` [PATCH 11/21] dt-bindings: clock: gs101: Add cmu_misc " Peter Griffin
2023-10-05 15:56 ` [PATCH 12/21] clk: samsung: clk-pll: Add support for pll_{0516,0517,518} Peter Griffin
2023-10-05 17:39 ` William McVicker
2023-10-08 22:51 ` Chanwoo Choi
2023-10-05 15:56 ` [PATCH 13/21] clk: samsung: clk-gs101: Add cmu_top registers, plls, mux and gates Peter Griffin
2023-10-05 17:42 ` William McVicker
2023-10-05 17:45 ` Krzysztof Kozlowski
2023-10-06 4:16 ` kernel test robot [this message]
2023-10-14 6:37 ` kernel test robot
2023-10-05 15:56 ` [PATCH 14/21] clk: samsung: clk-gs101: add CMU_APM support Peter Griffin
2023-10-05 17:43 ` William McVicker
2023-10-05 17:45 ` William McVicker
2023-10-05 15:56 ` [PATCH 15/21] clk: google: gs101: Add support for CMU_MISC clock unit Peter Griffin
2023-10-06 5:20 ` kernel test robot
2023-10-05 15:56 ` [PATCH 16/21] pinctrl: samsung: Add gs101 SoC pinctrl configuration Peter Griffin
2023-10-06 6:33 ` Krzysztof Kozlowski
2023-10-09 7:49 ` Peter Griffin
2023-10-05 15:56 ` [PATCH 17/21] watchdog: s3c2410_wdt: Add support for Google tensor SoCs Peter Griffin
2023-10-05 18:58 ` Guenter Roeck
2023-10-09 11:56 ` Peter Griffin
2023-10-05 15:56 ` [PATCH 18/21] arm64: dts: google: Add initial Google gs101 SoC support Peter Griffin
2023-10-05 16:21 ` Krzysztof Kozlowski
2023-10-05 17:59 ` William McVicker
2023-10-05 18:05 ` Greg KH
2023-10-05 19:18 ` Krzysztof Kozlowski
2023-10-05 19:23 ` Greg KH
2023-10-05 19:29 ` Krzysztof Kozlowski
2023-10-05 23:19 ` William McVicker
2023-10-06 6:06 ` Krzysztof Kozlowski
2023-10-06 8:48 ` Arnd Bergmann
2023-10-06 16:33 ` William McVicker
2023-10-07 14:34 ` Krzysztof Kozlowski
2023-10-09 16:10 ` William McVicker
2023-10-05 19:21 ` Krzysztof Kozlowski
2023-10-05 19:22 ` Krzysztof Kozlowski
2023-10-05 19:26 ` William McVicker
2023-10-09 12:01 ` Tudor Ambarus
2023-10-05 15:56 ` [PATCH 19/21] google/gs101: Add dt overlay for oriole board Peter Griffin
2023-10-05 16:33 ` Krzysztof Kozlowski
2023-10-09 20:03 ` William McVicker
2023-10-06 7:08 ` Geert Uytterhoeven
2023-10-06 20:52 ` Rob Herring
2023-10-10 12:09 ` Peter Griffin
2023-10-05 15:56 ` [PATCH 20/21] arm64: defconfig: Enable Google Tensor SoC Peter Griffin
2023-10-05 15:56 ` [PATCH 21/21] MAINTAINERS: add entry for " Peter Griffin
2023-10-05 16:32 ` [PATCH 00/21] Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board Krzysztof Kozlowski
2023-10-09 11:39 ` Peter Griffin
2023-10-09 11:10 ` Krzysztof Kozlowski
2023-10-09 11:40 ` Peter Griffin
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