[PATCH 1/2] ARM: dts: ux500: Fix up the thermal nodes

[PATCH 1/2] ARM: dts: ux500: Fix up the thermal nodes

[Linus Walleij]

The thermal driver for the DB8500 was never properly converted
to device tree, the node should definitely be activated for
all board variants so move this down into the main SoC
DTSI, and default on.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/ste-dbx5x0.dtsi  | 22 +++++++++++++++++++++-
 arch/arm/boot/dts/ste-snowball.dts | 29 -----------------------------
 2 files changed, 21 insertions(+), 30 deletions(-)

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index b1a31134f860..7953eea7c486 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -505,10 +505,30 @@
 			thermal@801573c0 {
 				compatible = "stericsson,db8500-thermal";
 				reg = <0x801573c0 0x40>;
+				interrupt-parent = <&prcmu>;
 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
 					     <22 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
-				status = "disabled";
+				num-trips = <4>;
+
+				trip0-temp = <70000>;
+				trip0-type = "active";
+				trip0-cdev-num = <1>;
+				trip0-cdev-name0 = "thermal-cpufreq-0";
+
+				trip1-temp = <75000>;
+				trip1-type = "active";
+				trip1-cdev-num = <1>;
+				trip1-cdev-name0 = "thermal-cpufreq-0";
+
+				trip2-temp = <80000>;
+				trip2-type = "active";
+				trip2-cdev-num = <1>;
+				trip2-cdev-name0 = "thermal-cpufreq-0";
+
+				trip3-temp = <85000>;
+				trip3-type = "critical";
+				trip3-cdev-num = <0>;
 			};
 
 			db8500-prcmu-regulators {
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index 3428290644ba..064e8abec954 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -376,40 +376,11 @@
 			pinctrl-0 = <&ssp0_snowball_mode>;
 		};
 
-		cpufreq-cooling {
-			status = "okay";
-		};
-
 		prcmu@80157000 {
 			cpufreq {
 				status = "okay";
 			};
 
-			thermal@801573c0 {
-				num-trips = <4>;
-
-				trip0-temp = <70000>;
-				trip0-type = "active";
-				trip0-cdev-num = <1>;
-				trip0-cdev-name0 = "thermal-cpufreq-0";
-
-				trip1-temp = <75000>;
-				trip1-type = "active";
-				trip1-cdev-num = <1>;
-				trip1-cdev-name0 = "thermal-cpufreq-0";
-
-				trip2-temp = <80000>;
-				trip2-type = "active";
-				trip2-cdev-num = <1>;
-				trip2-cdev-name0 = "thermal-cpufreq-0";
-
-				trip3-temp = <85000>;
-				trip3-type = "critical";
-				trip3-cdev-num = <0>;
-
-				status = "okay";
-			};
-
 			ab8500 {
 				ab8500-gpio {
 					/*
-- 
2.21.0


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[PATCH 2/2] ARM: dts: ux500: Update thermal zone

[Linus Walleij]

After moving the DB8500 thermal driver to use device tree
we define the default thermal zone for the Ux500 in the
device tree replacing the oldstyle hardcoded trigger
points.

This default thermal zone utilizes the cpufreq driver
(using the generic OF cpufreq back-end) as a passive
cooling device, and defines a critical trip point when
the temperature goes above 85 degrees celsius which will
(hopefully) make the system shut down if the temperature
cannot be controlled.

This default policy can later be augmented for specific
subdevices if these have tighter temperature conditions.

After this patch we get:

/sys/class/thermal/thermal_zone0 (CPU thermal zone)
This reports the rough temperature and trip points
from the thermal zone in the device tree.

By executing two yes > /dev/null & jobs fully utilizing
the two CPU cores we can notice the temperature climbing
in the thermal zone in response and falling when we kill
the jobs.

/syc/class/thermal/cooling_device0 (cpufreq cooling)
this reports all 4 available cpufreq frequencies as
states.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/ste-dbx5x0.dtsi | 57 +++++++++++++++++++------------
 1 file changed, 36 insertions(+), 21 deletions(-)

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 7953eea7c486..9ee50f339e7a 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -44,6 +44,7 @@
 			clocks = <&prcmu_clk PRCMU_ARMSS>;
 			clock-names = "cpu";
 			clock-latency = <20000>;
+			#cooling-cells = <2>;
 		};
 		CPU1: cpu@301 {
 			device_type = "cpu";
@@ -52,6 +53,39 @@
 		};
 	};
 
+	thermal-zones {
+		/*
+		 * Thermal zone for the SoC, using the thermal sensor in the
+		 * PRCMU for temperature and the cpufreq driver for passive
+		 * cooling.
+		 */
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+
+			thermal-sensors = <&thermal>;
+
+			trips {
+				cpu_alert: cpu-alert {
+					temperature = <70000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				cpu-crit {
+					temperature = <85000>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				trip = <&cpu_alert>;
+				cooling-device = <&CPU0 0 2>;
+				contribution = <100>;
+			};
+		};
+	};
+
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -502,33 +536,14 @@
 				reg = <0x80157450 0xC>;
 			};
 
-			thermal@801573c0 {
+			thermal: thermal@801573c0 {
 				compatible = "stericsson,db8500-thermal";
 				reg = <0x801573c0 0x40>;
 				interrupt-parent = <&prcmu>;
 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
 					     <22 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
-				num-trips = <4>;
-
-				trip0-temp = <70000>;
-				trip0-type = "active";
-				trip0-cdev-num = <1>;
-				trip0-cdev-name0 = "thermal-cpufreq-0";
-
-				trip1-temp = <75000>;
-				trip1-type = "active";
-				trip1-cdev-num = <1>;
-				trip1-cdev-name0 = "thermal-cpufreq-0";
-
-				trip2-temp = <80000>;
-				trip2-type = "active";
-				trip2-cdev-num = <1>;
-				trip2-cdev-name0 = "thermal-cpufreq-0";
-
-				trip3-temp = <85000>;
-				trip3-type = "critical";
-				trip3-cdev-num = <0>;
+				#thermal-sensor-cells = <0>;
 			};
 
 			db8500-prcmu-regulators {
-- 
2.21.0


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Re: [PATCH 1/2] ARM: dts: ux500: Fix up the thermal nodes

[Daniel Lezcano]

On 28/08/2019 15:52, Linus Walleij wrote:
> The thermal driver for the DB8500 was never properly converted
> to device tree, the node should definitely be activated for
> all board variants so move this down into the main SoC
> DTSI, and default on.
> 
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/ste-dbx5x0.dtsi  | 22 +++++++++++++++++++++-
>  arch/arm/boot/dts/ste-snowball.dts | 29 -----------------------------
>  2 files changed, 21 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
> index b1a31134f860..7953eea7c486 100644
> --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
> +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
> @@ -505,10 +505,30 @@
>  			thermal@801573c0 {
>  				compatible = "stericsson,db8500-thermal";
>  				reg = <0x801573c0 0x40>;
> +				interrupt-parent = <&prcmu>;
>  				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
>  					     <22 IRQ_TYPE_LEVEL_HIGH>;
>  				interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
> -				status = "disabled";
> +				num-trips = <4>;
> +
> +				trip0-temp = <70000>;
> +				trip0-type = "active";
> +				trip0-cdev-num = <1>;
> +				trip0-cdev-name0 = "thermal-cpufreq-0";
> +
> +				trip1-temp = <75000>;
> +				trip1-type = "active";
> +				trip1-cdev-num = <1>;
> +				trip1-cdev-name0 = "thermal-cpufreq-0";
> +
> +				trip2-temp = <80000>;
> +				trip2-type = "active";
> +				trip2-cdev-num = <1>;
> +				trip2-cdev-name0 = "thermal-cpufreq-0";
> +
> +				trip3-temp = <85000>;
> +				trip3-type = "critical";
> +				trip3-cdev-num = <0>;

I think you can fold both patches, that would be clearer than moving and
then removing.

>  			};
>  
>  			db8500-prcmu-regulators {
> diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
> index 3428290644ba..064e8abec954 100644
> --- a/arch/arm/boot/dts/ste-snowball.dts
> +++ b/arch/arm/boot/dts/ste-snowball.dts
> @@ -376,40 +376,11 @@
>  			pinctrl-0 = <&ssp0_snowball_mode>;
>  		};
>  
> -		cpufreq-cooling {
> -			status = "okay";
> -		};
> -
>  		prcmu@80157000 {
>  			cpufreq {
>  				status = "okay";
>  			};
>  
> -			thermal@801573c0 {
> -				num-trips = <4>;
> -
> -				trip0-temp = <70000>;
> -				trip0-type = "active";
> -				trip0-cdev-num = <1>;
> -				trip0-cdev-name0 = "thermal-cpufreq-0";
> -
> -				trip1-temp = <75000>;
> -				trip1-type = "active";
> -				trip1-cdev-num = <1>;
> -				trip1-cdev-name0 = "thermal-cpufreq-0";
> -
> -				trip2-temp = <80000>;
> -				trip2-type = "active";
> -				trip2-cdev-num = <1>;
> -				trip2-cdev-name0 = "thermal-cpufreq-0";
> -
> -				trip3-temp = <85000>;
> -				trip3-type = "critical";
> -				trip3-cdev-num = <0>;
> -
> -				status = "okay";
> -			};
> -
>  			ab8500 {
>  				ab8500-gpio {
>  					/*
> 


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Re: [PATCH 2/2] ARM: dts: ux500: Update thermal zone

[Daniel Lezcano]

On 28/08/2019 15:52, Linus Walleij wrote:
> After moving the DB8500 thermal driver to use device tree
> we define the default thermal zone for the Ux500 in the
> device tree replacing the oldstyle hardcoded trigger
> points.
> 
> This default thermal zone utilizes the cpufreq driver
> (using the generic OF cpufreq back-end) as a passive
> cooling device, and defines a critical trip point when
> the temperature goes above 85 degrees celsius which will
> (hopefully) make the system shut down if the temperature
> cannot be controlled.
> 
> This default policy can later be augmented for specific
> subdevices if these have tighter temperature conditions.
> 
> After this patch we get:
> 
> /sys/class/thermal/thermal_zone0 (CPU thermal zone)
> This reports the rough temperature and trip points
> from the thermal zone in the device tree.
> 
> By executing two yes > /dev/null & jobs fully utilizing
> the two CPU cores we can notice the temperature climbing
> in the thermal zone in response and falling when we kill
> the jobs.
> 
> /syc/class/thermal/cooling_device0 (cpufreq cooling)
> this reports all 4 available cpufreq frequencies as
> states.
> 
> Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/ste-dbx5x0.dtsi | 57 +++++++++++++++++++------------
>  1 file changed, 36 insertions(+), 21 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
> index 7953eea7c486..9ee50f339e7a 100644
> --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
> +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
> @@ -44,6 +44,7 @@
>  			clocks = <&prcmu_clk PRCMU_ARMSS>;
>  			clock-names = "cpu";
>  			clock-latency = <20000>;
> +			#cooling-cells = <2>;
>  		};
>  		CPU1: cpu@301 {
>  			device_type = "cpu";
> @@ -52,6 +53,39 @@
>  		};
>  	};
>  
> +	thermal-zones {
> +		/*
> +		 * Thermal zone for the SoC, using the thermal sensor in the
> +		 * PRCMU for temperature and the cpufreq driver for passive
> +		 * cooling.
> +		 */
> +		cpu_thermal: cpu-thermal {
> +			polling-delay-passive = <0>;
> +			polling-delay = <1000>;

Assuming zero for both.

If the temperature is below 'cpu_alert', no polling will be done (which
good for PM reason). When the temperature is reached, then the sensor
will fire an interrupt, leading to the thermal zone update, which in
turn does the mitigation. As the temperature is updated by the
interrupts, a polling is pointless when mitigating because the tz is
updated automatically. On the other hand, I don't know if the slope of
the temperature change will be correctly represented with this change
and how that may impact the governor if the temperature sampling is
variable (not based on polling but on interrupt events).

IMO the polling-delay should be zero, and the polling-delay-passive
should be something like 250.

In order to disable the mitigation, the sensor should update the
temperature with a value under the 'cpu_alert'. I guess that is the case
because the lowest temperature is 15000mC, right ?

> +			thermal-sensors = <&thermal>;
> +
> +			trips {
> +				cpu_alert: cpu-alert {
> +					temperature = <70000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +				cpu-crit {
> +					temperature = <85000>;
> +					hysteresis = <0>;
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				trip = <&cpu_alert>;
> +				cooling-device = <&CPU0 0 2>;

Except it is done on purpose, 0 2 means restricting the number of state
of the cooling device.

It could/should be:

<&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

> +				contribution = <100>;
> +			};
> +		};
> +	};
> +
>  	soc {
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> @@ -502,33 +536,14 @@
>  				reg = <0x80157450 0xC>;
>  			};
>  
> -			thermal@801573c0 {
> +			thermal: thermal@801573c0 {
>  				compatible = "stericsson,db8500-thermal";
>  				reg = <0x801573c0 0x40>;
>  				interrupt-parent = <&prcmu>;
>  				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
>  					     <22 IRQ_TYPE_LEVEL_HIGH>;
>  				interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
> -				num-trips = <4>;
> -
> -				trip0-temp = <70000>;
> -				trip0-type = "active";
> -				trip0-cdev-num = <1>;
> -				trip0-cdev-name0 = "thermal-cpufreq-0";
> -
> -				trip1-temp = <75000>;
> -				trip1-type = "active";
> -				trip1-cdev-num = <1>;
> -				trip1-cdev-name0 = "thermal-cpufreq-0";
> -
> -				trip2-temp = <80000>;
> -				trip2-type = "active";
> -				trip2-cdev-num = <1>;
> -				trip2-cdev-name0 = "thermal-cpufreq-0";
> -
> -				trip3-temp = <85000>;
> -				trip3-type = "critical";
> -				trip3-cdev-num = <0>;
> +				#thermal-sensor-cells = <0>;
>  			};
>  
>  			db8500-prcmu-regulators {
> 


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