RE: [PATCH] arm64: dts: realtek: Add Realtek rtd1619 and mjolnir

From: James Tai <james.tai@realtek.com>
To: "Andreas Färber" <afaerber@suse.de>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	"linux-realtek-soc@lists.infradead.org"
	<linux-realtek-soc@lists.infradead.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	"'linux-kernel@vger.kernel.org'" <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH] arm64: dts: realtek: Add Realtek rtd1619 and mjolnir
Date: Fri, 8 Nov 2019 15:36:07 +0000	[thread overview]
Message-ID: <43B123F21A8CFE44A9641C099E4196FFCF920024@RTITMBSVM04.realtek.com.tw> (raw)
In-Reply-To: <25fdd8eb-f1a0-82ae-9c4b-22325b163b0e@suse.de>

Hi Andreas,

Thank you for your review.

[...]
> Just to be sure: This is one cluster of 6 CPUs? Or is it some 4+2 big.LITTLE,
> DynamiQ or whatever multi-cluster configuration with different frequencies,
> power domains or something?
> 
Yes, it is one cluster of 6 CPUs.

[...]
> > +
> > +		l2: l2-cache {
> > +			compatible = "cache";
> > +			next-level-cache = <&l3>;
> > +
> > +		};
> > +
> > +		l3: l3-cache {
> > +			compatible = "cache";
> > +		};
> 
> Caches look weird - only cpu0 uses L2 and all others use L3 directly?
> 
Yes, only cpu0 uses L2 and others use L3 directly.

[...]
> Generic question also applying to my RTD1295/RTD1195 patches: Are you sure
> about GIC_CPU_MASK_RAW(0xf) or could this be GIC_CPU_MASK_SIMPLE(6)
> in this case? This here would seem equivalent of GIC_CPU_MASK_SIMPLE(8).
>
The GICv3 does not have affinity bitmap in the binding for PPI
interrupts. So remove the GIC_CPU_MASK_RAW() macro.

[...] 
> 
> And double-check whether you actually need <2> - compare rtd129x.dtsi using
> <1> because nothing went beyond 32-bit address space. It was a review
> request back then. Can RTD1619 have more than 2 GiB RAM, with a second
> RAM region in high mem, requiring two cells for memory nodes?
> 
The RTD1619 can support more than 2 GiB RAM.

[...]
> 
> Is the UART no longer behind an IRQ mux on RTD1619, or is the above the IRQ
> mux interrupt as a workaround for lack of in-tree irqchip driver?
> 
Yes, the UART no longer behind an IRQ mux on RTD1619.

[...] 
> Are you sure you don't have GICC, GICH, GICV and IRQ? No MBI support?
> 
The RTD1619 don't have GICC, GICH, GICV and no support MBI.

> For RTD1295 I extended the GICv2 node during review, and KVM initialized
> fine, although I'm not sure whether I've run an actual guest yet, given how
> many drivers were missing still.
> 
> (I'd also appreciate Realtek to review my RTD1195 patch's GIC [1] for whether
> we should have all four regions and some interrupt there - the OEM's U-Boot
> doesn't boot in HYP mode, so I can't test myself.)
> 
I will help with review.

[...]

Regards,
James

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel