* [PATCH mvebu-dt] ARM: dts: turris-omnia: Fix mpp26 pin name and comment
@ 2022-07-27 12:56 Marek Behún
2022-09-02 13:58 ` Gregory CLEMENT
0 siblings, 1 reply; 2+ messages in thread
From: Marek Behún @ 2022-07-27 12:56 UTC (permalink / raw)
To: Gregory CLEMENT; +Cc: linux-arm-kernel, pali, Marek Behún
There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.
Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-385-turris-omnia.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts
index f4878df39753..487dece2033c 100644
--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -478,7 +478,7 @@ spi0cs0_pins: spi0cs0-pins {
marvell,function = "spi0";
};
- spi0cs1_pins: spi0cs1-pins {
+ spi0cs2_pins: spi0cs2-pins {
marvell,pins = "mpp26";
marvell,function = "spi0";
};
@@ -513,7 +513,7 @@ partition@100000 {
};
};
- /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
+ /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
};
&uart0 {
--
2.35.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH mvebu-dt] ARM: dts: turris-omnia: Fix mpp26 pin name and comment
2022-07-27 12:56 [PATCH mvebu-dt] ARM: dts: turris-omnia: Fix mpp26 pin name and comment Marek Behún
@ 2022-09-02 13:58 ` Gregory CLEMENT
0 siblings, 0 replies; 2+ messages in thread
From: Gregory CLEMENT @ 2022-09-02 13:58 UTC (permalink / raw)
To: Marek Behún; +Cc: linux-arm-kernel, pali, Marek Behún
Marek Behún <kabel@kernel.org> writes:
> There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
> which is routed to CN11 pin header, is documented as SPI CS1, but
> MPP[26] pin does not support this function. Instead it controls chip
> select 2 if in "spi0" mode.
>
> Fix the name of the pin node in pinctrl node and fix the comment in SPI
> node.
>
> Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
> Signed-off-by: Marek Behún <kabel@kernel.org>
Applied on mvebu/dt
Thanks,
Gregory
> ---
> arch/arm/boot/dts/armada-385-turris-omnia.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts
> index f4878df39753..487dece2033c 100644
> --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
> +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
> @@ -478,7 +478,7 @@ spi0cs0_pins: spi0cs0-pins {
> marvell,function = "spi0";
> };
>
> - spi0cs1_pins: spi0cs1-pins {
> + spi0cs2_pins: spi0cs2-pins {
> marvell,pins = "mpp26";
> marvell,function = "spi0";
> };
> @@ -513,7 +513,7 @@ partition@100000 {
> };
> };
>
> - /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
> + /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
> };
>
> &uart0 {
> --
> 2.35.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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