* [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings
@ 2018-04-18 16:34 srinivas.kandagatla
2018-04-19 14:49 ` Thierry Escande
2018-05-10 9:03 ` Amit Kucheria
0 siblings, 2 replies; 4+ messages in thread
From: srinivas.kandagatla @ 2018-04-18 16:34 UTC (permalink / raw)
To: andy.gross, linux-arm-msm
Cc: david.brown, robh+dt, linux-soc, linux-kernel, devicetree,
linux-arm-kernel, Srinivas Kandagatla
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index cfbd72186762..5d66a575c7e1 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -180,7 +180,7 @@
pmu {
compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4)| IRQ_TYPE_LEVEL_HIGH)>;
};
thermal-zones {
@@ -513,7 +513,7 @@
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b6000 0x500>;
- interrupts = <GIC_SPI 96 0>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -528,7 +528,7 @@
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b8000 0x500>;
- interrupts = <GIC_SPI 98 0>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -543,7 +543,7 @@
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078ba000 0x500>;
- interrupts = <GIC_SPI 100 0>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -575,7 +575,7 @@
"mi2s-bit-clk3";
#sound-dai-cells = <1>;
- interrupts = <0 160 0>;
+ interrupts = <0 160 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "lpass-irq-lpaif";
reg = <0x07708000 0x10000>;
reg-names = "lpass-lpaif";
@@ -595,7 +595,7 @@
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
reg-names = "hc_mem", "core_mem";
- interrupts = <0 123 0>, <0 138 0>;
+ interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>, <0 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>,
@@ -612,7 +612,7 @@
reg = <0x07864900 0x11c>, <0x07864000 0x800>;
reg-names = "hc_mem", "core_mem";
- interrupts = <0 125 0>, <0 221 0>;
+ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, <0 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
<&gcc GCC_SDCC2_AHB_CLK>,
@@ -819,7 +819,7 @@
iommu-ctx@2000 {
compatible = "qcom,msm-iommu-v1-ns";
reg = <0x2000 0x1000>;
- interrupts = <GIC_SPI 242 0>;
+ interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -864,7 +864,7 @@
"bus_clk",
"vsync_clk";
- interrupts = <0 72 0>;
+ interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
--
2.16.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings
2018-04-18 16:34 [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings srinivas.kandagatla
@ 2018-04-19 14:49 ` Thierry Escande
2018-05-10 9:03 ` Amit Kucheria
1 sibling, 0 replies; 4+ messages in thread
From: Thierry Escande @ 2018-04-19 14:49 UTC (permalink / raw)
To: srinivas.kandagatla, andy.gross, linux-arm-msm
Cc: david.brown, robh+dt, linux-soc, linux-kernel, devicetree,
linux-arm-kernel
On 18/04/2018 18:34, srinivas.kandagatla@linaro.org wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>
> Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
> patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
> the use of IRQ_TYPE_NONE").
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index cfbd72186762..5d66a575c7e1 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
Reviewed-by: Thierry Escande <thierry.escande@linaro.org>
Also successfully tested on dragonboard 410c so:
Tested-by: Thierry Escande <thierry.escande@linaro.org>
> @@ -180,7 +180,7 @@
>
> pmu {
> compatible = "arm,cortex-a53-pmu";
> - interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
> + interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4)| IRQ_TYPE_LEVEL_HIGH)>;
> };
>
> thermal-zones {
> @@ -513,7 +513,7 @@
> blsp_i2c2: i2c@78b6000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078b6000 0x500>;
> - interrupts = <GIC_SPI 96 0>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
> clock-names = "iface", "core";
> @@ -528,7 +528,7 @@
> blsp_i2c4: i2c@78b8000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078b8000 0x500>;
> - interrupts = <GIC_SPI 98 0>;
> + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
> clock-names = "iface", "core";
> @@ -543,7 +543,7 @@
> blsp_i2c6: i2c@78ba000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078ba000 0x500>;
> - interrupts = <GIC_SPI 100 0>;
> + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
> clock-names = "iface", "core";
> @@ -575,7 +575,7 @@
> "mi2s-bit-clk3";
> #sound-dai-cells = <1>;
>
> - interrupts = <0 160 0>;
> + interrupts = <0 160 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "lpass-irq-lpaif";
> reg = <0x07708000 0x10000>;
> reg-names = "lpass-lpaif";
> @@ -595,7 +595,7 @@
> reg = <0x07824900 0x11c>, <0x07824000 0x800>;
> reg-names = "hc_mem", "core_mem";
>
> - interrupts = <0 123 0>, <0 138 0>;
> + interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>, <0 138 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "hc_irq", "pwr_irq";
> clocks = <&gcc GCC_SDCC1_APPS_CLK>,
> <&gcc GCC_SDCC1_AHB_CLK>,
> @@ -612,7 +612,7 @@
> reg = <0x07864900 0x11c>, <0x07864000 0x800>;
> reg-names = "hc_mem", "core_mem";
>
> - interrupts = <0 125 0>, <0 221 0>;
> + interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, <0 221 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "hc_irq", "pwr_irq";
> clocks = <&gcc GCC_SDCC2_APPS_CLK>,
> <&gcc GCC_SDCC2_AHB_CLK>,
> @@ -819,7 +819,7 @@
> iommu-ctx@2000 {
> compatible = "qcom,msm-iommu-v1-ns";
> reg = <0x2000 0x1000>;
> - interrupts = <GIC_SPI 242 0>;
> + interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
> };
> };
>
> @@ -864,7 +864,7 @@
> "bus_clk",
> "vsync_clk";
>
> - interrupts = <0 72 0>;
> + interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
>
> interrupt-controller;
> #interrupt-cells = <1>;
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings
2018-04-18 16:34 [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings srinivas.kandagatla
2018-04-19 14:49 ` Thierry Escande
@ 2018-05-10 9:03 ` Amit Kucheria
2018-05-10 12:08 ` Vinod Koul
1 sibling, 1 reply; 4+ messages in thread
From: Amit Kucheria @ 2018-05-10 9:03 UTC (permalink / raw)
To: srinivas.kandagatla
Cc: Andy Gross, linux-arm-msm, David Brown, Rob Herring, linux-soc,
LKML, devicetree, lakml
On Wed, Apr 18, 2018 at 7:34 PM, <srinivas.kandagatla@linaro.org> wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>
> Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
> patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
> the use of IRQ_TYPE_NONE").
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
(boot report here:
https://storage.kernelci.org/qcom-lt/integration-linux-qcomlt/v4.17-rc4-247-gbe94bee41bf6/arm64/defconfig/lab-bjorn/boot-apq8016-sbc.txt)
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index cfbd72186762..5d66a575c7e1 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -180,7 +180,7 @@
>
> pmu {
> compatible = "arm,cortex-a53-pmu";
> - interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
> + interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4)| IRQ_TYPE_LEVEL_HIGH)>;
> };
>
> thermal-zones {
> @@ -513,7 +513,7 @@
> blsp_i2c2: i2c@78b6000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078b6000 0x500>;
> - interrupts = <GIC_SPI 96 0>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
> clock-names = "iface", "core";
> @@ -528,7 +528,7 @@
> blsp_i2c4: i2c@78b8000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078b8000 0x500>;
> - interrupts = <GIC_SPI 98 0>;
> + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
> clock-names = "iface", "core";
> @@ -543,7 +543,7 @@
> blsp_i2c6: i2c@78ba000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078ba000 0x500>;
> - interrupts = <GIC_SPI 100 0>;
> + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
> clock-names = "iface", "core";
> @@ -575,7 +575,7 @@
> "mi2s-bit-clk3";
> #sound-dai-cells = <1>;
>
> - interrupts = <0 160 0>;
> + interrupts = <0 160 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "lpass-irq-lpaif";
> reg = <0x07708000 0x10000>;
> reg-names = "lpass-lpaif";
> @@ -595,7 +595,7 @@
> reg = <0x07824900 0x11c>, <0x07824000 0x800>;
> reg-names = "hc_mem", "core_mem";
>
> - interrupts = <0 123 0>, <0 138 0>;
> + interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>, <0 138 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "hc_irq", "pwr_irq";
> clocks = <&gcc GCC_SDCC1_APPS_CLK>,
> <&gcc GCC_SDCC1_AHB_CLK>,
> @@ -612,7 +612,7 @@
> reg = <0x07864900 0x11c>, <0x07864000 0x800>;
> reg-names = "hc_mem", "core_mem";
>
> - interrupts = <0 125 0>, <0 221 0>;
> + interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, <0 221 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "hc_irq", "pwr_irq";
> clocks = <&gcc GCC_SDCC2_APPS_CLK>,
> <&gcc GCC_SDCC2_AHB_CLK>,
> @@ -819,7 +819,7 @@
> iommu-ctx@2000 {
> compatible = "qcom,msm-iommu-v1-ns";
> reg = <0x2000 0x1000>;
> - interrupts = <GIC_SPI 242 0>;
> + interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
> };
> };
>
> @@ -864,7 +864,7 @@
> "bus_clk",
> "vsync_clk";
>
> - interrupts = <0 72 0>;
> + interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
>
> interrupt-controller;
> #interrupt-cells = <1>;
> --
> 2.16.2
>
> --
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> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings
2018-05-10 9:03 ` Amit Kucheria
@ 2018-05-10 12:08 ` Vinod Koul
0 siblings, 0 replies; 4+ messages in thread
From: Vinod Koul @ 2018-05-10 12:08 UTC (permalink / raw)
To: Amit Kucheria
Cc: srinivas.kandagatla, Andy Gross, linux-arm-msm, David Brown,
Rob Herring, linux-soc, LKML, devicetree, lakml
On 10-05-18, 12:03, Amit Kucheria wrote:
> On Wed, Apr 18, 2018 at 7:34 PM, <srinivas.kandagatla@linaro.org> wrote:
> > From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> >
> > Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
> > patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
> > the use of IRQ_TYPE_NONE").
> >
> > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>
> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
> Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
--
~Vinod
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-05-10 12:08 UTC | newest]
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2018-04-18 16:34 [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings srinivas.kandagatla
2018-04-19 14:49 ` Thierry Escande
2018-05-10 9:03 ` Amit Kucheria
2018-05-10 12:08 ` Vinod Koul
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