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From: Lina Iyer <ilina@codeaurora.org>
To: sboyd@kernel.org, evgreen@chromium.org, marc.zyngier@arm.com
Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org,
	linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com,
	bjorn.andersson@linaro.org, Thierry Reding <treding@nvidia.com>
Subject: [PATCH 1/7] gpio: Add support for hierarchical IRQ domains
Date: Wed, 19 Dec 2018 15:10:59 -0700	[thread overview]
Message-ID: <20181219221105.3004-2-ilina@codeaurora.org> (raw)
In-Reply-To: <20181219221105.3004-1-ilina@codeaurora.org>

From: Thierry Reding <treding@nvidia.com>

Hierarchical IRQ domains can be used to stack different IRQ controllers
on top of each other. One specific use-case where this can be useful is
if a power management controller has top-level controls for wakeup
interrupts. In such cases, the power management controller can be a
parent to other interrupt controllers and program additional registers
when an IRQ has its wake capability enabled or disabled.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/gpio/gpiolib.c      | 15 +++++++++++----
 include/linux/gpio/driver.h |  6 ++++++
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 230e41562462..eb08de2e7c1d 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1917,7 +1917,9 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
 		type = IRQ_TYPE_NONE;
 	}
 
-	gpiochip->to_irq = gpiochip_to_irq;
+	if (!gpiochip->to_irq)
+		gpiochip->to_irq = gpiochip_to_irq;
+
 	gpiochip->irq.default_type = type;
 	gpiochip->irq.lock_key = lock_key;
 	gpiochip->irq.request_key = request_key;
@@ -1927,9 +1929,14 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
 	else
 		ops = &gpiochip_domain_ops;
 
-	gpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,
-						     gpiochip->irq.first,
-						     ops, gpiochip);
+	if (gpiochip->irq.parent_domain)
+		gpiochip->irq.domain = irq_domain_add_hierarchy(gpiochip->irq.parent_domain,
+								0, gpiochip->ngpio,
+								np, ops, gpiochip);
+	else
+		gpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,
+							     gpiochip->irq.first,
+							     ops, gpiochip);
 	if (!gpiochip->irq.domain)
 		return -EINVAL;
 
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 2db62b550b95..abcdb0c25a93 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -47,6 +47,12 @@ struct gpio_irq_chip {
 	 */
 	const struct irq_domain_ops *domain_ops;
 
+	/**
+	 * @parent_domain:
+	 *
+	 */
+	struct irq_domain *parent_domain;
+
 	/**
 	 * @handler:
 	 *
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2018-12-19 22:10 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-19 22:10 [PATCH 0/7] qcom: support wakeup capable GPIOs Lina Iyer
2018-12-19 22:10 ` Lina Iyer [this message]
2019-01-18 18:12   ` [PATCH 1/7] gpio: Add support for hierarchical IRQ domains Doug Anderson
2018-12-19 22:11 ` [PATCH 2/7] irqdomain: add bus token DOMAIN_BUS_WAKEUP Lina Iyer
2018-12-19 22:11 ` [PATCH 3/7] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs Lina Iyer
2018-12-20 20:19   ` Stephen Boyd
2019-01-07 18:48     ` Lina Iyer
2019-01-11 22:55       ` Stephen Boyd
2019-01-11 23:34         ` Lina Iyer
2018-12-19 22:11 ` [PATCH 4/7] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO Lina Iyer
2018-12-29  0:07   ` Rob Herring
2019-01-07 18:51     ` Lina Iyer
2019-01-08 14:49       ` Rob Herring
2019-01-09 17:31         ` Lina Iyer
2019-01-09 19:36           ` Rob Herring
2019-01-11 23:20             ` Stephen Boyd
2019-01-23 20:52               ` Stephen Boyd
2019-01-31 21:53                 ` Stephen Boyd
2019-02-01  7:09                   ` Stephen Boyd
2019-02-06 17:07                     ` Lina Iyer
2019-02-06 18:47                       ` Stephen Boyd
2019-02-12 16:05             ` Lina Iyer
2018-12-19 22:11 ` [PATCH 5/7] drivers: pinctrl: msm: setup GPIO irqchip hierarchy Lina Iyer
2018-12-20 20:03   ` Stephen Boyd
2019-01-07 18:54     ` Lina Iyer
2019-01-16 23:13     ` Lina Iyer
2019-01-23 21:00       ` Stephen Boyd
2018-12-19 22:11 ` [PATCH 6/7] arm64: dts: msm: add PDC device bindings for sdm845 Lina Iyer
2018-12-20 18:14   ` Doug Anderson
2019-01-07 18:52     ` Lina Iyer
2019-01-17 23:36       ` Doug Anderson
2018-12-19 22:11 ` [PATCH 7/7] arm64: dts: msm: setup PDC as wakeup parent for GPIOs for SDM845 Lina Iyer

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