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From: Niklas Cassel <niklas.cassel@linaro.org>
To: Andy Gross <agross@kernel.org>, Ilia Lin <ilia.lin@kernel.org>,
	Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, jorge.ramirez-ortiz@linaro.org,
	bjorn.andersson@linaro.org, ulf.hansson@linaro.org,
	Niklas Cassel <niklas.cassel@linaro.org>,
	Rob Herring <robh@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v3 06/14] dt-bindings: cpufreq: qcom-nvmem: Support pstates provided by a power domain
Date: Mon, 19 Aug 2019 12:09:57 +0200
Message-ID: <20190819100957.17095-1-niklas.cassel@linaro.org> (raw)
In-Reply-To: <20190725104144.22924-7-niklas.cassel@linaro.org>

Some Qualcomm SoCs have support for Core Power Reduction (CPR).
On these platforms, we need to attach to the power domain provider
providing the performance states, so that the leaky device (the CPU)
can configure the performance states (which represent different
CPU clock frequencies).

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes since V2:
-Picked up Rob's Reviewed-by on V2.
-As Rob pointed out in V1, it should be
"In 'cpu' nodes" and not "In 'cpus' nodes".
-In Example 2: include the qcom,opp-fuse-level property rather than "...",
since Rob pointed out in the review of V1 of "dt-bindings: opp: Add
 qcom-opp bindings with properties needed for CPR", that this property was
missing in this patch.

 .../bindings/opp/qcom-nvmem-cpufreq.txt       | 113 +++++++++++++++++-
 1 file changed, 112 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
index c5ea8b90e35d..1e6261570f3e 100644
--- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
+++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
@@ -14,7 +14,7 @@ operating-points-v2 table when it is parsed by the OPP framework.
 
 Required properties:
 --------------------
-In 'cpus' nodes:
+In 'cpu' nodes:
 - operating-points-v2: Phandle to the operating-points-v2 table to use.
 
 In 'operating-points-v2' table:
@@ -23,6 +23,15 @@ In 'operating-points-v2' table:
 
 Optional properties:
 --------------------
+In 'cpu' nodes:
+- power-domains: A phandle pointing to the PM domain specifier which provides
+		the performance states available for active state management.
+		Please refer to the power-domains bindings
+		Documentation/devicetree/bindings/power/power_domain.txt
+		and also examples below.
+- power-domain-names: Should be
+	- 'cpr' for qcs404.
+
 In 'operating-points-v2' table:
 - nvmem-cells: A phandle pointing to a nvmem-cells node representing the
 		efuse registers that has information about the
@@ -682,3 +691,105 @@ soc {
 		};
 	};
 };
+
+Example 2:
+---------
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		CPU0: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x100>;
+			....
+			clocks = <&apcs_glb>;
+			operating-points-v2 = <&cpu_opp_table>;
+			power-domains = <&cprpd>;
+			power-domain-names = "cpr";
+		};
+
+		CPU1: cpu@101 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x101>;
+			....
+			clocks = <&apcs_glb>;
+			operating-points-v2 = <&cpu_opp_table>;
+			power-domains = <&cprpd>;
+			power-domain-names = "cpr";
+		};
+
+		CPU2: cpu@102 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x102>;
+			....
+			clocks = <&apcs_glb>;
+			operating-points-v2 = <&cpu_opp_table>;
+			power-domains = <&cprpd>;
+			power-domain-names = "cpr";
+		};
+
+		CPU3: cpu@103 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x103>;
+			....
+			clocks = <&apcs_glb>;
+			operating-points-v2 = <&cpu_opp_table>;
+			power-domains = <&cprpd>;
+			power-domain-names = "cpr";
+		};
+	};
+
+	cpu_opp_table: cpu-opp-table {
+		compatible = "operating-points-v2-kryo-cpu";
+		opp-shared;
+
+		opp-1094400000 {
+			opp-hz = /bits/ 64 <1094400000>;
+			required-opps = <&cpr_opp1>;
+		};
+		opp-1248000000 {
+			opp-hz = /bits/ 64 <1248000000>;
+			required-opps = <&cpr_opp2>;
+		};
+		opp-1401600000 {
+			opp-hz = /bits/ 64 <1401600000>;
+			required-opps = <&cpr_opp3>;
+		};
+	};
+
+	cpr_opp_table: cpr-opp-table {
+		compatible = "operating-points-v2-qcom-level";
+
+		cpr_opp1: opp1 {
+			opp-level = <1>;
+			qcom,opp-fuse-level = <1>;
+		};
+		cpr_opp2: opp2 {
+			opp-level = <2>;
+			qcom,opp-fuse-level = <2>;
+		};
+		cpr_opp3: opp3 {
+			opp-level = <3>;
+			qcom,opp-fuse-level = <3>;
+		};
+	};
+
+....
+
+soc {
+....
+	cprpd: cpr@b018000 {
+		compatible = "qcom,qcs404-cpr", "qcom,cpr";
+		reg = <0x0b018000 0x1000>;
+		....
+		vdd-apc-supply = <&pms405_s3>;
+		#power-domain-cells = <0>;
+		operating-points-v2 = <&cpr_opp_table>;
+		....
+	};
+};
-- 
2.21.0


  parent reply index

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-25 10:41 [PATCH v2 00/14] Add support for QCOM Core Power Reduction Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 01/14] opp: Add dev_pm_opp_find_level_exact() Niklas Cassel
2019-07-26  8:03   ` Viresh Kumar
2019-07-25 10:41 ` [PATCH v2 02/14] dt-bindings: cpufreq: Re-organise kryo cpufreq to use it for other nvmem based qcom socs Niklas Cassel
2019-07-26  8:04   ` Viresh Kumar
2019-07-25 10:41 ` [PATCH v2 03/14] cpufreq: qcom: " Niklas Cassel
2019-08-18  1:06   ` Stephen Boyd
2019-07-25 10:41 ` [PATCH v2 04/14] dt-bindings: cpufreq: qcom-nvmem: Make speedbin related properties optional Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 05/14] cpufreq: qcom: Refactor the driver to make it easier to extend Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 06/14] dt-bindings: cpufreq: qcom-nvmem: Support pstates provided by a power domain Niklas Cassel
2019-08-16 21:21   ` Rob Herring
2019-08-19 10:09   ` Niklas Cassel [this message]
2019-08-19 17:59     ` [PATCH v3 " Stephen Boyd
2019-08-22 10:27       ` Niklas Cassel
2019-08-28 17:52         ` Stephen Boyd
2019-08-30 10:29     ` [PATCH v4 06/14] dt-bindings: opp: " Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 07/14] cpufreq: qcom: Add support for qcs404 on nvmem driver Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 08/14] cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 09/14] dt-bindings: opp: Add qcom-opp bindings with properties needed for CPR Niklas Cassel
2019-08-19 10:12   ` [PATCH v3 " Niklas Cassel
2019-08-19 17:58     ` Stephen Boyd
2019-08-23 12:34     ` Rob Herring
2019-07-25 10:41 ` [PATCH v2 10/14] dt-bindings: power: avs: Add support for CPR (Core Power Reduction) Niklas Cassel
2019-08-17  6:14   ` Stephen Boyd
2019-08-22 10:20     ` Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 11/14] " Niklas Cassel
2019-08-18  1:04   ` Stephen Boyd
2019-07-25 10:41 ` [PATCH v2 12/14] arm64: dts: qcom: qcs404: Add CPR and populate OPP table Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 13/14] arm64: defconfig: enable CONFIG_QCOM_CPR Niklas Cassel
2019-07-25 10:41 ` [PATCH v2 14/14] arm64: defconfig: enable CONFIG_ARM_QCOM_CPUFREQ_NVMEM Niklas Cassel
2019-07-26  8:08 ` [PATCH v2 00/14] Add support for QCOM Core Power Reduction Viresh Kumar

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