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From: Marijn Suijten <marijn.suijten@somainline.org>
To: phone-devel@vger.kernel.org, Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Vinod Koul <vkoul@kernel.org>
Cc: ~postmarketos/upstreaming@lists.sr.ht,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@somainline.org>,
	"Konrad Dybcio" <konrad.dybcio@somainline.org>,
	"Martin Botka" <martin.botka@somainline.org>,
	"Jami Kettunen" <jami.kettunen@somainline.org>,
	"Marijn Suijten" <marijn.suijten@somainline.org>,
	"Sean Paul" <sean@poorly.run>, "David Airlie" <airlied@gmail.com>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Stephen Boyd" <swboyd@chromium.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Jessica Zhang" <quic_jesszhan@quicinc.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Kuogee Hsieh" <quic_khsieh@quicinc.com>,
	"Jani Nikula" <jani.nikula@intel.com>,
	sunliming <sunliming@kylinos.cn>,
	"Sam Ravnborg" <sam@ravnborg.org>,
	"Haowen Bai" <baihaowen@meizu.com>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Loic Poulain" <loic.poulain@linaro.org>,
	"Vinod Polimera" <quic_vpolimer@quicinc.com>,
	"Douglas Anderson" <dianders@chromium.org>,
	"Vladimir Lypak" <vladimir.lypak@gmail.com>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	"Marek Vasut" <marex@denx.de>
Subject: [PATCH v2 2/8] drm/msm/dsi: Use DSC slice(s) packet size to compute word count
Date: Thu, 22 Dec 2022 00:19:37 +0100	[thread overview]
Message-ID: <20221221231943.1961117-3-marijn.suijten@somainline.org> (raw)
In-Reply-To: <20221221231943.1961117-1-marijn.suijten@somainline.org>

According to downstream the value to use for WORD_COUNT is
bytes_per_pkt, which denotes the number of bytes in a packet based on
how many slices have been configured by the panel driver times the
width of a slice times the number of bytes per pixel.

The DSC panels seen thus far use one byte per pixel, only one slice
per packet, and a slice width of half the panel width leading to the
desired bytes_per_pkt+1 value to be equal to hdisplay/2+1.  This however
isn't the case anymore for panels that configure two slices per packet,
where the value should now be hdisplay+1.

Note that the aforementioned panel (on a Sony Xperia XZ3, sdm845) with
slice_count=1 has also been tested to successfully accept slice_count=2,
which would have shown corrupted output previously.

Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index b83cf70b1adb..0686c35a6fd4 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -989,7 +989,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
 		if (!msm_host->dsc)
 			wc = hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1;
 		else
-			wc = mode->hdisplay / 2 + 1;
+			wc = msm_host->dsc->slice_chunk_size * msm_host->dsc->slice_count + 1;
 
 		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL,
 			DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(wc) |
-- 
2.39.0


  parent reply	other threads:[~2022-12-21 23:20 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-21 23:19 [PATCH v2 0/8] drm/msm: DSC Electric Boogaloo for sm8[12]50 Marijn Suijten
2022-12-21 23:19 ` [PATCH v2 1/8] drm/msm/dpu: Wire up DSC mask for active CTL configuration Marijn Suijten
2023-01-08 23:23   ` Dmitry Baryshkov
2022-12-21 23:19 ` Marijn Suijten [this message]
2022-12-21 23:19 ` [PATCH v2 3/8] drm/msm/dsi: Flip greater-than check for slice_count and slice_per_intf Marijn Suijten
2022-12-21 23:19 ` [PATCH v2 4/8] drm/msm/dpu: Disallow unallocated resources to be returned Marijn Suijten
2023-01-08 23:28   ` Dmitry Baryshkov
2023-01-08 23:30     ` Dmitry Baryshkov
2023-01-09  8:23       ` Marijn Suijten
2023-01-09  9:06         ` Dmitry Baryshkov
2023-01-09 17:12           ` Marijn Suijten
2023-01-09 18:24             ` Dmitry Baryshkov
2022-12-21 23:19 ` [PATCH v2 5/8] drm/msm/dpu: Reject topologies for which no DSC blocks are available Marijn Suijten
2023-01-08 23:29   ` Dmitry Baryshkov
2022-12-21 23:19 ` [PATCH v2 6/8] drm/msm/dpu: Remove num_enc from topology struct in favour of num_dsc Marijn Suijten
2023-01-08 23:31   ` Dmitry Baryshkov
2023-01-09  8:21     ` Marijn Suijten
2023-01-09  9:08       ` Dmitry Baryshkov
2022-12-21 23:19 ` [PATCH v2 7/8] drm/msm/dpu: Implement DSC binding to PP block for CTL V1 Marijn Suijten
2022-12-21 23:19 ` [PATCH v2 8/8] drm/msm/dpu: Add DSC configuration for SM8150 and SM8250 Marijn Suijten
2023-01-05 14:49 ` [PATCH v2 0/8] drm/msm: DSC Electric Boogaloo for sm8[12]50 Daniel Vetter
2023-01-09  7:59   ` Marijn Suijten
2023-01-09 22:41 ` Dmitry Baryshkov
2023-01-09 23:43   ` Dmitry Baryshkov

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