From: Marijn Suijten <marijn.suijten@somainline.org>
To: phone-devel@vger.kernel.org, Rob Clark <robdclark@gmail.com>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Vinod Koul <vkoul@kernel.org>
Cc: ~postmarketos/upstreaming@lists.sr.ht,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@somainline.org>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Martin Botka" <martin.botka@somainline.org>,
"Jami Kettunen" <jami.kettunen@somainline.org>,
"Marijn Suijten" <marijn.suijten@somainline.org>,
"Sean Paul" <sean@poorly.run>, "David Airlie" <airlied@gmail.com>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Stephen Boyd" <swboyd@chromium.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Jessica Zhang" <quic_jesszhan@quicinc.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Kuogee Hsieh" <quic_khsieh@quicinc.com>,
"Jani Nikula" <jani.nikula@intel.com>,
sunliming <sunliming@kylinos.cn>,
"Sam Ravnborg" <sam@ravnborg.org>,
"Haowen Bai" <baihaowen@meizu.com>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Loic Poulain" <loic.poulain@linaro.org>,
"Vinod Polimera" <quic_vpolimer@quicinc.com>,
"Douglas Anderson" <dianders@chromium.org>,
"Vladimir Lypak" <vladimir.lypak@gmail.com>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 8/8] drm/msm/dpu: Add DSC configuration for SM8150 and SM8250
Date: Thu, 22 Dec 2022 00:19:43 +0100 [thread overview]
Message-ID: <20221221231943.1961117-9-marijn.suijten@somainline.org> (raw)
In-Reply-To: <20221221231943.1961117-1-marijn.suijten@somainline.org>
These DSC blocks on CTL V1 need to set its corresponding PINGPONG block
index in a hardware register to configure where to send pixel output to,
via the newly-added DPU_DSC_OUTPUT_CTRL feature flag.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 23 ++++++++++++++-----
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 318f0b4dbf6e..114ad8ca4554 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1566,18 +1566,25 @@ static const struct dpu_merge_3d_cfg sm8150_merge_3d[] = {
/*************************************************************
* DSC sub blocks config
*************************************************************/
-#define DSC_BLK(_name, _id, _base) \
+#define DSC_BLK(_name, _id, _base, _features) \
{\
.name = _name, .id = _id, \
.base = _base, .len = 0x140, \
- .features = 0, \
+ .features = _features, \
}
static struct dpu_dsc_cfg sdm845_dsc[] = {
- DSC_BLK("dsc_0", DSC_0, 0x80000),
- DSC_BLK("dsc_1", DSC_1, 0x80400),
- DSC_BLK("dsc_2", DSC_2, 0x80800),
- DSC_BLK("dsc_3", DSC_3, 0x80c00),
+ DSC_BLK("dsc_0", DSC_0, 0x80000, 0),
+ DSC_BLK("dsc_1", DSC_1, 0x80400, 0),
+ DSC_BLK("dsc_2", DSC_2, 0x80800, 0),
+ DSC_BLK("dsc_3", DSC_3, 0x80c00, 0),
+};
+
+static struct dpu_dsc_cfg sm8150_dsc[] = {
+ DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
+ DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
+ DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
+ DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
};
/*************************************************************
@@ -2474,6 +2481,8 @@ static const struct dpu_mdss_cfg sm8150_dpu_cfg = {
.mixer = sm8150_lm,
.dspp_count = ARRAY_SIZE(sm8150_dspp),
.dspp = sm8150_dspp,
+ .dsc_count = ARRAY_SIZE(sm8150_dsc),
+ .dsc = sm8150_dsc,
.pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
@@ -2524,6 +2533,8 @@ static const struct dpu_mdss_cfg sm8250_dpu_cfg = {
.mixer = sm8150_lm,
.dspp_count = ARRAY_SIZE(sm8150_dspp),
.dspp = sm8150_dspp,
+ .dsc_count = ARRAY_SIZE(sm8150_dsc),
+ .dsc = sm8150_dsc,
.pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
--
2.39.0
next prev parent reply other threads:[~2022-12-21 23:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-21 23:19 [PATCH v2 0/8] drm/msm: DSC Electric Boogaloo for sm8[12]50 Marijn Suijten
2022-12-21 23:19 ` [PATCH v2 1/8] drm/msm/dpu: Wire up DSC mask for active CTL configuration Marijn Suijten
2023-01-08 23:23 ` Dmitry Baryshkov
2022-12-21 23:19 ` [PATCH v2 2/8] drm/msm/dsi: Use DSC slice(s) packet size to compute word count Marijn Suijten
2022-12-21 23:19 ` [PATCH v2 3/8] drm/msm/dsi: Flip greater-than check for slice_count and slice_per_intf Marijn Suijten
2022-12-21 23:19 ` [PATCH v2 4/8] drm/msm/dpu: Disallow unallocated resources to be returned Marijn Suijten
2023-01-08 23:28 ` Dmitry Baryshkov
2023-01-08 23:30 ` Dmitry Baryshkov
2023-01-09 8:23 ` Marijn Suijten
2023-01-09 9:06 ` Dmitry Baryshkov
2023-01-09 17:12 ` Marijn Suijten
2023-01-09 18:24 ` Dmitry Baryshkov
2022-12-21 23:19 ` [PATCH v2 5/8] drm/msm/dpu: Reject topologies for which no DSC blocks are available Marijn Suijten
2023-01-08 23:29 ` Dmitry Baryshkov
2022-12-21 23:19 ` [PATCH v2 6/8] drm/msm/dpu: Remove num_enc from topology struct in favour of num_dsc Marijn Suijten
2023-01-08 23:31 ` Dmitry Baryshkov
2023-01-09 8:21 ` Marijn Suijten
2023-01-09 9:08 ` Dmitry Baryshkov
2022-12-21 23:19 ` [PATCH v2 7/8] drm/msm/dpu: Implement DSC binding to PP block for CTL V1 Marijn Suijten
2022-12-21 23:19 ` Marijn Suijten [this message]
2023-01-05 14:49 ` [PATCH v2 0/8] drm/msm: DSC Electric Boogaloo for sm8[12]50 Daniel Vetter
2023-01-09 7:59 ` Marijn Suijten
2023-01-09 22:41 ` Dmitry Baryshkov
2023-01-09 23:43 ` Dmitry Baryshkov
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