linux-arm-msm.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Fenglin Wu <quic_fenglinw@quicinc.com>
To: Stephen Boyd <sboyd@kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Cc: <collinsd@codeaurora.org>, <subbaram@codeaurora.org>,
	<tglx@linutronix.de>, <maz@kernel.org>
Subject: Re: [RESEND PATCH v1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler
Date: Thu, 14 Oct 2021 11:11:40 +0800	[thread overview]
Message-ID: <6ca3f254-90ad-e0e5-ced9-0f12deb408c6@quicinc.com> (raw)
In-Reply-To: <163415312707.936959.13741150880359468709@swboyd.mtv.corp.google.com>


On 10/14/2021 3:25 AM, Stephen Boyd wrote:
> Quoting Fenglin Wu (2021-10-12 22:31:22)
>> On 10/13/2021 2:02 AM, Stephen Boyd wrote:
>>> Quoting Fenglin Wu (2021-09-16 23:32:58)
>>>> From: David Collins <collinsd@codeaurora.org>
>>>>
>>>> Check that the apid for an SPMI interrupt falls between the
>>>> min_apid and max_apid that can be handled by the APPS processor
>>>> before invoking the per-apid interrupt handler:
>>>> periph_interrupt().
>>>>
>>>> This avoids an access violation in rare cases where the status
>>>> bit is set for an interrupt that is not owned by the APPS
>>>> processor.
>>>>
>>>> Signed-off-by: David Collins <collinsd@codeaurora.org>
>>>> Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
>>>> ---
>>> Fixes? BTW, a lot of these patches are irqchip specific. It would be
>>> good to get review from irqchip maintainers. Maybe we should split the
>>> irqchip driver off via the auxiliary bus so that irqchip maintainers can
>>> review. Please Cc them on irqchip related patches.
>>>
>>> IRQCHIP DRIVERS
>>> M:      Thomas Gleixner <tglx@linutronix.de>
>>> M:      Marc Zyngier <maz@kernel.org>
>> Sure, copied Thomas and Marc for code review.
>> This is a fix to avoid the register access violation in a case that an
>> interrupt is fired in a PMIC module which is not owned by APPS
>> processor.
> Got it.
>
>>>>    drivers/spmi/spmi-pmic-arb.c | 6 ++++++
>>>>    1 file changed, 6 insertions(+)
>>>>
>>>> diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
>>>> index 4d7ad004..c4adc06 100644
>>>> --- a/drivers/spmi/spmi-pmic-arb.c
>>>> +++ b/drivers/spmi/spmi-pmic-arb.c
>>>> @@ -535,6 +535,12 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
>>>>                           id = ffs(status) - 1;
>>>>                           status &= ~BIT(id);
>>>>                           apid = id + i * 32;
>>>> +                       if (apid < pmic_arb->min_apid
>>>> +                           || apid > pmic_arb->max_apid) {
>>> The || goes on the line above. What about making a local variable for
>>> first and last and then shifting by 5 in the loop?
>>>
>>> int first = pmic_arb->min_apid;
>>> int last = pmic_arb->max_apid;
>>>
>>> for (i = first >> 5; i <= last >> 5; i++)
>>>
>>>        if (apid < first || apid > last)
>> ACK, will update it following this.
>>>> +                               WARN_ONCE(true, "spurious spmi irq received for apid=%d\n",
>>>> +                                       apid);
>>> Is there any way to recover from this? Or once the mapping is wrong
>>> we're going to get interrupts that we don't know what to do with
>>> forever?
>> This is a rare case that the unexpected interrupt is fired in a module
>> not owned by APPS process, so the interrupt itself is not expected hence
>> no need to recover from this but just bail out to avoid following register
>> access violation.
> And then the irq stops coming? It feels like a misconfiguration in the
> firmware that we're trying to hide, hence the WARN_ONCE(). Can we
> somehow silence irqs that aren't owned by the APPS when this driver
> probes so that they can't even happen after probe?
Actually this is a rarely happened case that couldn't be reproduced easily
and consistently for further debug. I agreed this should be caused by HW
misconfiguration or even some unknown HW bug that it would send out SPMI
interrupt messages with incorrect APID, but we have never had any chance
to find out the root cause. The patch here simply checked the APID and
bail out if it's not in the valid range, it won't cause anything bad but
improves the SW robustness. After that, the IRQ won't be triggered again
because the latched status in PMIC is not cleared. Also, because of the
access restriction to the registers corresponding to this APID, there is
nothing we can do from APPS processor side to keep it silent.

  reply	other threads:[~2021-10-14  3:11 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-17  6:32 [RESEND PATCH v1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
2021-09-17  6:32 ` [RESEND PATCH v1 1/9] spmi: pmic-arb: add a print in cleanup_irq Fenglin Wu
2021-10-12 17:46   ` Stephen Boyd
2021-10-13  4:15     ` Fenglin Wu
2021-10-13 19:35       ` Stephen Boyd
2021-10-14  2:26         ` Fenglin Wu
2021-10-15  1:09           ` Stephen Boyd
2021-10-15  1:27             ` Fenglin Wu
2021-10-18  0:16               ` Fenglin Wu
2021-09-17  6:32 ` [RESEND PATCH v1 2/9] spmi: pmic-arb: do not ack and clear peripheral interrupts " Fenglin Wu
2021-09-17  6:32 ` [RESEND PATCH v1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler Fenglin Wu
2021-10-12 18:02   ` Stephen Boyd
2021-10-13  5:31     ` Fenglin Wu
2021-10-13 19:25       ` Stephen Boyd
2021-10-14  3:11         ` Fenglin Wu [this message]
2021-10-15  1:15           ` Stephen Boyd
2021-10-15  1:54             ` Fenglin Wu
2021-09-17  6:32 ` [RESEND PATCH v1 4/9] spmi: pmic-arb: add support to dispatch interrupt based on IRQ status Fenglin Wu
2021-09-17  6:33 ` [RESEND PATCH v1 5/9] spmi: pmic-arb: correct duplicate APID to PPID mapping logic Fenglin Wu
2021-10-12 17:44   ` Stephen Boyd
2021-10-13  5:37     ` Fenglin Wu
2021-09-17  6:33 ` [RESEND PATCH v1 6/9] spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes Fenglin Wu
2021-09-17  6:33 ` [RESEND PATCH v1 7/9] spmi: pmic-arb: support updating interrupt type flags Fenglin Wu
2021-10-12 17:42   ` Stephen Boyd
2021-10-13  6:27     ` Fenglin Wu
2021-10-13 19:37       ` Stephen Boyd
2021-10-14  3:17         ` Fenglin Wu
2021-09-17  6:33 ` [RESEND PATCH v1 8/9] spmi: pmic-arb: make interrupt support optional Fenglin Wu
2021-10-12 17:41   ` Stephen Boyd
2021-10-13  8:36     ` Fenglin Wu
2021-10-13 19:38       ` Stephen Boyd
2021-10-14  3:20         ` Fenglin Wu
2021-10-15  1:17           ` Stephen Boyd
2021-10-15  1:30             ` Fenglin Wu
2021-09-17  6:33 ` [RESEND PATCH v1 9/9] spmi: pmic-arb: increase SPMI transaction timeout delay Fenglin Wu
  -- strict thread matches above, loose matches on Subject: below --
2021-09-01  8:18 [RESEND PATCH v1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
2021-09-01  8:18 ` [RESEND PATCH v1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler Fenglin Wu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6ca3f254-90ad-e0e5-ced9-0f12deb408c6@quicinc.com \
    --to=quic_fenglinw@quicinc.com \
    --cc=collinsd@codeaurora.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=subbaram@codeaurora.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).