* [PATCH v4 01/12] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:44 ` Konrad Dybcio
2022-05-14 14:10 ` [PATCH v4 02/12] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy " Dmitry Baryshkov
` (10 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
They should be enabled in the board DT files. No existing boards use
them at this moment.
Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 240293592ef9..8697d40e9b74 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 {
phys = <&dsi0_phy>;
phy-names = "dsi";
+ status = "disabled";
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 {
clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
clock-names = "iface", "ref";
+ status = "disabled";
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v4 01/12] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
2022-05-14 14:10 ` [PATCH v4 01/12] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
@ 2022-05-14 14:44 ` Konrad Dybcio
0 siblings, 0 replies; 21+ messages in thread
From: Konrad Dybcio @ 2022-05-14 14:44 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Marijn Suijten
Cc: linux-arm-msm, devicetree
On 14/05/2022 16:10, Dmitry Baryshkov wrote:
> Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
> They should be enabled in the board DT files. No existing boards use
> them at this moment.
>
> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 240293592ef9..8697d40e9b74 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 {
> phys = <&dsi0_phy>;
> phy-names = "dsi";
>
> + status = "disabled";
> +
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 {
>
> clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
> clock-names = "iface", "ref";
> + status = "disabled";
> };
> };
>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Konrad
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v4 02/12] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 01/12] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:44 ` Konrad Dybcio
2022-05-14 14:10 ` [PATCH v4 03/12] arm64: dts: qcom: sdm630: disable GPU " Dmitry Baryshkov
` (9 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
Follow the typical practice and keep DSI1/DSI1 PHY disabled by default.
They should be enabled in the board DT files. No existing boards use
them at this moment.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi
index eccf6fde16b4..023b0ac4118c 100644
--- a/arch/arm64/boot/dts/qcom/sdm660.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi
@@ -192,6 +192,8 @@ dsi1: dsi@c996000 {
phys = <&dsi1_phy>;
phy-names = "dsi";
+ status = "disabled";
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 {
clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "ref";
+ status = "disabled";
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v4 02/12] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default
2022-05-14 14:10 ` [PATCH v4 02/12] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy " Dmitry Baryshkov
@ 2022-05-14 14:44 ` Konrad Dybcio
2022-05-14 14:45 ` Konrad Dybcio
0 siblings, 1 reply; 21+ messages in thread
From: Konrad Dybcio @ 2022-05-14 14:44 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Marijn Suijten
Cc: linux-arm-msm, devicetree
On 14/05/2022 16:10, Dmitry Baryshkov wrote:
> Follow the typical practice and keep DSI1/DSI1 PHY disabled by default.
> They should be enabled in the board DT files. No existing boards use
> them at this moment.
>
> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi
> index eccf6fde16b4..023b0ac4118c 100644
> --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi
> @@ -192,6 +192,8 @@ dsi1: dsi@c996000 {
> phys = <&dsi1_phy>;
> phy-names = "dsi";
>
> + status = "disabled";
> +
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 {
>
> clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
> clock-names = "iface", "ref";
> + status = "disabled";
> };
> };
>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Konrad
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v4 02/12] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default
2022-05-14 14:44 ` Konrad Dybcio
@ 2022-05-14 14:45 ` Konrad Dybcio
0 siblings, 0 replies; 21+ messages in thread
From: Konrad Dybcio @ 2022-05-14 14:45 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Marijn Suijten
Cc: linux-arm-msm, devicetree
On 14/05/2022 16:44, Konrad Dybcio wrote:
>
> On 14/05/2022 16:10, Dmitry Baryshkov wrote:
>> Follow the typical practice and keep DSI1/DSI1 PHY disabled by default.
>> They should be enabled in the board DT files. No existing boards use
>> them at this moment.
>>
>> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>> arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi
>> b/arch/arm64/boot/dts/qcom/sdm660.dtsi
>> index eccf6fde16b4..023b0ac4118c 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi
>> @@ -192,6 +192,8 @@ dsi1: dsi@c996000 {
>> phys = <&dsi1_phy>;
>> phy-names = "dsi";
>> + status = "disabled";
>> +
>> ports {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> @@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 {
>> clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
>> clock-names = "iface", "ref";
>> + status = "disabled";
>> };
>> };
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
>
>
> Konrad
Sorry, I went too fast and r-b'd this twice.. :P
Konrad
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v4 03/12] arm64: dts: qcom: sdm630: disable GPU by default
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 01/12] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 02/12] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy " Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 04/12] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Dmitry Baryshkov
` (8 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
The SoC's device tree file disables gpucc and adreno's SMMU by default.
So let's disable the GPU too. Moreover it looks like SMMU might be not
usable without additional patches (which means that GPU is unusable
too). No board uses GPU at this moment.
Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration")
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 8697d40e9b74..e8bb170e8b2f 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1050,6 +1050,8 @@ adreno_gpu: gpu@5000000 {
operating-points-v2 = <&gpu_sdm630_opp_table>;
+ status = "disabled";
+
gpu_sdm630_opp_table: opp-table {
compatible = "operating-points-v2";
opp-775000000 {
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v4 04/12] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (2 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 03/12] arm64: dts: qcom: sdm630: disable GPU " Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 05/12] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
` (7 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
According to the downstram DT file, the qusb2phy ref clock should be
GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK.
Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration")
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index e8bb170e8b2f..5be0ec06ed86 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1262,7 +1262,7 @@ qusb2phy: phy@c012000 {
#phy-cells = <0>;
clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_RX1_USB2_CLKREF_CLK>;
+ <&gcc GCC_RX0_USB2_CLKREF_CLK>;
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v4 05/12] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (3 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 04/12] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:46 ` Konrad Dybcio
2022-05-14 14:10 ` [PATCH v4 06/12] arm64: dts: qcom: sdm630: add second (HS) USB host support Dmitry Baryshkov
` (6 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
In preparation to adding second USB host/PHY pair, change first USB
PHY's label to qusb2phy0.
Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
index 42af1fade461..00baacf28c63 100644
--- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
@@ -224,7 +224,7 @@ &pon_resin {
linux,code = <KEY_VOLUMEUP>;
};
-&qusb2phy {
+&qusb2phy0 {
status = "okay";
vdd-supply = <&vreg_l1b_0p925>;
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 5be0ec06ed86..eb8504e5735c 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1250,13 +1250,13 @@ usb3_dwc3: usb@a800000 {
* haven't seen any devices making use of it.
*/
maximum-speed = "high-speed";
- phys = <&qusb2phy>;
+ phys = <&qusb2phy0>;
phy-names = "usb2-phy";
snps,hird-threshold = /bits/ 8 <0>;
};
};
- qusb2phy: phy@c012000 {
+ qusb2phy0: phy@c012000 {
compatible = "qcom,sdm660-qusb2-phy";
reg = <0x0c012000 0x180>;
#phy-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
index dcbaacf18f66..9280c1f0c334 100644
--- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
+++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
@@ -103,7 +103,7 @@ &pon_resin {
linux,code = <KEY_VOLUMEDOWN>;
};
-&qusb2phy {
+&qusb2phy0 {
status = "okay";
vdd-supply = <&vreg_l1b_0p925>;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v4 05/12] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0
2022-05-14 14:10 ` [PATCH v4 05/12] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
@ 2022-05-14 14:46 ` Konrad Dybcio
0 siblings, 0 replies; 21+ messages in thread
From: Konrad Dybcio @ 2022-05-14 14:46 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Marijn Suijten
Cc: linux-arm-msm, devicetree
On 14/05/2022 16:10, Dmitry Baryshkov wrote:
> In preparation to adding second USB host/PHY pair, change first USB
> PHY's label to qusb2phy0.
>
> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Konrad
> arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++--
> arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> index 42af1fade461..00baacf28c63 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> @@ -224,7 +224,7 @@ &pon_resin {
> linux,code = <KEY_VOLUMEUP>;
> };
>
> -&qusb2phy {
> +&qusb2phy0 {
> status = "okay";
>
> vdd-supply = <&vreg_l1b_0p925>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 5be0ec06ed86..eb8504e5735c 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -1250,13 +1250,13 @@ usb3_dwc3: usb@a800000 {
> * haven't seen any devices making use of it.
> */
> maximum-speed = "high-speed";
> - phys = <&qusb2phy>;
> + phys = <&qusb2phy0>;
> phy-names = "usb2-phy";
> snps,hird-threshold = /bits/ 8 <0>;
> };
> };
>
> - qusb2phy: phy@c012000 {
> + qusb2phy0: phy@c012000 {
> compatible = "qcom,sdm660-qusb2-phy";
> reg = <0x0c012000 0x180>;
> #phy-cells = <0>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> index dcbaacf18f66..9280c1f0c334 100644
> --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> @@ -103,7 +103,7 @@ &pon_resin {
> linux,code = <KEY_VOLUMEDOWN>;
> };
>
> -&qusb2phy {
> +&qusb2phy0 {
> status = "okay";
>
> vdd-supply = <&vreg_l1b_0p925>;
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v4 06/12] arm64: dts: qcom: sdm630: add second (HS) USB host support
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (4 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 05/12] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 07/12] arm64: dts: qcom: sdm630: fix gpu's interconnect path Dmitry Baryshkov
` (5 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
Add DT entries for the second DWC3 USB host, which is limited to the
USB2.0 (HighSpeed), and the corresponding QUSB PHY.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 55 ++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index eb8504e5735c..2b5dbc12bdf8 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1270,6 +1270,20 @@ qusb2phy0: phy@c012000 {
status = "disabled";
};
+ qusb2phy1: phy@c014000 {
+ compatible = "qcom,sdm660-qusb2-phy";
+ reg = <0x0c014000 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+ <&gcc GCC_RX1_USB2_CLKREF_CLK>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
+ nvmem-cells = <&qusb2_hstx_trim>;
+ status = "disabled";
+ };
+
sdhc_2: sdhci@c084000 {
compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
reg = <0x0c084000 0x1000>;
@@ -1375,6 +1389,47 @@ opp-384000000 {
};
};
+ usb2: usb@c2f8800 {
+ compatible = "qcom,sdm660-dwc3", "qcom,dwc3";
+ reg = <0x0c2f8800 0x400>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_CFG_NOC_USB2_AXI_CLK>,
+ <&gcc GCC_USB20_MASTER_CLK>,
+ <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB20_SLEEP_CLK>;
+ clock-names = "cfg_noc", "core",
+ "mock_utmi", "sleep";
+
+ assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB20_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <60000000>;
+
+ interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hs_phy_irq";
+
+ qcom,select-utmi-as-pipe-clk;
+
+ resets = <&gcc GCC_USB_20_BCR>;
+
+ usb2_dwc3: usb@c200000 {
+ compatible = "snps,dwc3";
+ reg = <0x0c200000 0xc8d0>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+
+ /* This is the HS-only host */
+ maximum-speed = "high-speed";
+ phys = <&qusb2phy1>;
+ phy-names = "usb2-phy";
+ snps,hird-threshold = /bits/ 8 <0>;
+ };
+ };
+
mmcc: clock-controller@c8c0000 {
compatible = "qcom,mmcc-sdm630";
reg = <0x0c8c0000 0x40000>;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v4 07/12] arm64: dts: qcom: sdm630: fix gpu's interconnect path
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (5 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 06/12] arm64: dts: qcom: sdm630: add second (HS) USB host support Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 08/12] arm64: dts: qcom: sdm630: use defined symbols for interconnects Dmitry Baryshkov
` (4 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is
a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream
GPU uses MASTER_OXILI here, <&bimc 1 ...>.
Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration")
Reported-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 2b5dbc12bdf8..6d0bc9e8fb5b 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1045,7 +1045,7 @@ adreno_gpu: gpu@5000000 {
nvmem-cells = <&gpu_speed_bin>;
nvmem-cell-names = "speed_bin";
- interconnects = <&gnoc 1 &bimc 5>;
+ interconnects = <&bimc 1 &bimc 5>;
interconnect-names = "gfx-mem";
operating-points-v2 = <&gpu_sdm630_opp_table>;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v4 08/12] arm64: dts: qcom: sdm630: use defined symbols for interconnects
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (6 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 07/12] arm64: dts: qcom: sdm630: fix gpu's interconnect path Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 09/12] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Dmitry Baryshkov
` (3 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
Replace numeric values with the symbolic names defined in the bindings
header.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 23 ++++++++++++-----------
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 6d0bc9e8fb5b..44f048934fc6 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,gpucc-sdm660.h>
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/interconnect/qcom,sdm660.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -1045,7 +1046,7 @@ adreno_gpu: gpu@5000000 {
nvmem-cells = <&gpu_speed_bin>;
nvmem-cell-names = "speed_bin";
- interconnects = <&bimc 1 &bimc 5>;
+ interconnects = <&bimc MASTER_OXILI &bimc SLAVE_EBI>;
interconnect-names = "gfx-mem";
operating-points-v2 = <&gpu_sdm630_opp_table>;
@@ -1299,8 +1300,8 @@ sdhc_2: sdhci@c084000 {
<&xo_board>;
clock-names = "core", "iface", "xo";
- interconnects = <&a2noc 3 &a2noc 10>,
- <&gnoc 0 &cnoc 28>;
+ interconnects = <&a2noc MASTER_SDCC_2 &a2noc SLAVE_A2NOC_SNOC>,
+ <&gnoc MASTER_APSS_PROC &cnoc SLAVE_SDCC_2>;
operating-points-v2 = <&sdhc2_opp_table>;
pinctrl-names = "default", "sleep";
@@ -1351,8 +1352,8 @@ sdhc_1: sdhci@c0c4000 {
<&gcc GCC_SDCC1_ICE_CORE_CLK>;
clock-names = "core", "iface", "xo", "ice";
- interconnects = <&a2noc 2 &a2noc 10>,
- <&gnoc 0 &cnoc 27>;
+ interconnects = <&a2noc MASTER_SDCC_1 &a2noc SLAVE_A2NOC_SNOC>,
+ <&gnoc MASTER_APSS_PROC &cnoc SLAVE_SDCC_1>;
interconnect-names = "sdhc1-ddr", "cpu-sdhc1";
operating-points-v2 = <&sdhc1_opp_table>;
pinctrl-names = "default", "sleep";
@@ -1525,9 +1526,9 @@ mdp: mdp@c901000 {
"core",
"vsync";
- interconnects = <&mnoc 2 &bimc 5>,
- <&mnoc 3 &bimc 5>,
- <&gnoc 0 &mnoc 17>;
+ interconnects = <&mnoc MASTER_MDP_P0 &bimc SLAVE_EBI>,
+ <&mnoc MASTER_MDP_P1 &bimc SLAVE_EBI>,
+ <&gnoc MASTER_APSS_PROC &mnoc SLAVE_DISPLAY_CFG>;
interconnect-names = "mdp0-mem",
"mdp1-mem",
"rotator-mem";
@@ -2034,7 +2035,7 @@ camss: camss@ca00000 {
"cphy_csid1",
"cphy_csid2",
"cphy_csid3";
- interconnects = <&mnoc 5 &bimc 5>;
+ interconnects = <&mnoc MASTER_VFE &bimc SLAVE_EBI>;
interconnect-names = "vfe-mem";
iommus = <&mmss_smmu 0xc00>,
<&mmss_smmu 0xc01>,
@@ -2097,8 +2098,8 @@ venus: video-codec@cc00000 {
<&mmcc VIDEO_AXI_CLK>,
<&mmcc THROTTLE_VIDEO_AXI_CLK>;
clock-names = "core", "iface", "bus", "bus_throttle";
- interconnects = <&gnoc 0 &mnoc 13>,
- <&mnoc 4 &bimc 5>;
+ interconnects = <&gnoc MASTER_APSS_PROC &mnoc SLAVE_VENUS_CFG>,
+ <&mnoc MASTER_VENUS &bimc SLAVE_EBI>;
interconnect-names = "cpu-cfg", "video-mem";
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&mmss_smmu 0x400>,
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v4 09/12] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (7 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 08/12] arm64: dts: qcom: sdm630: use defined symbols for interconnects Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:50 ` Konrad Dybcio
2022-05-14 14:10 ` [PATCH v4 10/12] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Dmitry Baryshkov
` (2 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
Fix the device tree node in the &sdc2_state_on override. The sdm630 uses
'clk' rather than 'pinconf-clk'.
Fixes: 4c1d849ec047 ("arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
index b96da53f2f1e..58f687fc49e0 100644
--- a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
+++ b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
@@ -19,7 +19,7 @@ / {
};
&sdc2_state_on {
- pinconf-clk {
+ clk {
drive-strength = <14>;
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v4 09/12] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf
2022-05-14 14:10 ` [PATCH v4 09/12] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Dmitry Baryshkov
@ 2022-05-14 14:50 ` Konrad Dybcio
0 siblings, 0 replies; 21+ messages in thread
From: Konrad Dybcio @ 2022-05-14 14:50 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Marijn Suijten
Cc: linux-arm-msm, devicetree
On 14/05/2022 16:10, Dmitry Baryshkov wrote:
> Fix the device tree node in the &sdc2_state_on override. The sdm630 uses
> 'clk' rather than 'pinconf-clk'.
>
> Fixes: 4c1d849ec047 ("arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Konrad
> arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
> index b96da53f2f1e..58f687fc49e0 100644
> --- a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
> @@ -19,7 +19,7 @@ / {
> };
>
> &sdc2_state_on {
> - pinconf-clk {
> + clk {
> drive-strength = <14>;
> };
> };
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v4 10/12] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (8 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 09/12] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 11/12] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Dmitry Baryshkov
2022-05-14 14:10 ` [PATCH v4 12/12] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
11 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
This results in dts duplication, but per mutual agreement card detect
pin configuration belongs to the board files. Move it from the SoC
dtsi to the board DT files.
Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 16 ++++++++++++++++
arch/arm64/boot/dts/qcom/sdm630.dtsi | 12 ------------
.../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 16 ++++++++++++++++
3 files changed, 32 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
index 00baacf28c63..ccde9951e4fb 100644
--- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
@@ -549,6 +549,22 @@ vreg_l19a_3p3: l19 {
};
};
+&sdc2_state_on {
+ sd-cd {
+ pins = "gpio54";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_state_off {
+ sd-cd {
+ pins = "gpio54";
+ bias-disable;
+ drive-strength = <2>;
+ };
+};
+
&sdhc_1 {
status = "okay";
supports-cqe;
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 44f048934fc6..e6f06a548011 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -983,12 +983,6 @@ data {
bias-pull-up;
drive-strength = <10>;
};
-
- sd-cd {
- pins = "gpio54";
- bias-pull-up;
- drive-strength = <2>;
- };
};
sdc2_state_off: sdc2-off {
@@ -1009,12 +1003,6 @@ data {
bias-pull-up;
drive-strength = <2>;
};
-
- sd-cd {
- pins = "gpio54";
- bias-disable;
- drive-strength = <2>;
- };
};
};
diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
index 9280c1f0c334..2b1216502eb0 100644
--- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
+++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
@@ -363,6 +363,22 @@ vreg_l19a_3p3: l19 {
};
};
+&sdc2_state_on {
+ sd-cd {
+ pins = "gpio54";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_state_off {
+ sd-cd {
+ pins = "gpio54";
+ bias-disable;
+ drive-strength = <2>;
+ };
+};
+
&sdhc_1 {
status = "okay";
supports-cqe;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v4 11/12] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (9 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 10/12] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
2022-05-14 14:43 ` Konrad Dybcio
2022-05-14 14:10 ` [PATCH v4 12/12] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
11 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
The IFC6560 is a board from Inforce Computing, built around the SDA660
SoC. This patch describes core clocks, some regulators from the two
PMICs, debug uart, storage, bluetooth and audio DSP remoteproc.
The regulator settings are inherited from prior work by Konrad Dybcio
and AngeloGioacchino Del Regno.
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/sda660-inforce-ifc6560.dts | 471 ++++++++++++++++++
2 files changed, 472 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index f9e6343acd03..5f717fe0e8d0 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
new file mode 100644
index 000000000000..d1923c1310f6
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
@@ -0,0 +1,471 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Linaro Ltd.
+ * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org>
+ * Copyright (c) 2020, AngeloGioacchino Del Regno
+ * <angelogioacchino.delregno@somainline.org>
+ */
+
+/dts-v1/;
+
+#include "sdm660.dtsi"
+#include "pm660.dtsi"
+#include "pm660l.dtsi"
+
+/ {
+ model = "Inforce 6560 Single Board Computer";
+ compatible = "inforce,ifc6560", "qcom,sda660";
+ chassis-type = "embedded"; /* SBC */
+
+ aliases {
+ serial0 = &blsp1_uart2;
+ serial1 = &blsp2_uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ volup {
+ label = "Volume Up";
+ gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ debounce-interval = <15>;
+ };
+ };
+
+ /*
+ * Until we hook up type-c detection, we
+ * have to stick with this. But it works.
+ */
+ extcon_usb: extcon-usb {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7533_out>;
+ };
+ };
+ };
+
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ v3p3_bck_bst: v3p3-bck-bst-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "v3p3_bck_bst";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ vin-supply = <&vph_pwr>;
+ };
+
+ v1p2_ldo: v1p2-ldo-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "v1p2_ldo";
+
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ vin-supply = <&vph_pwr>;
+ };
+
+ v5p0_boost: v5p0-boost-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "v5p0_boost";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ vin-supply = <&vph_pwr>;
+ };
+};
+
+&adsp_pil {
+ firmware-name = "qcom/ifc6560/adsp.mbn";
+};
+
+&blsp1_dma {
+ /*
+ * The board will lock up if we toggle the BLSP clock, unless the
+ * BAM DMA interconnects support is in place.
+ */
+ /delete-property/ clocks;
+};
+
+&blsp_i2c6 {
+ status = "okay";
+
+ adv7533: hdmi@39 {
+ compatible = "adi,adv7535";
+ reg = <0x39>, <0x66>;
+ reg-names = "main", "edid";
+
+ interrupt-parent = <&pm660l_gpios>;
+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+
+ clocks = <&rpmcc RPM_SMD_BB_CLK2>;
+ clock-names = "cec";
+ /*
+ * Limit to 3 lanes to prevent the bridge from changing amount
+ * of lanes in the fly. MSM DSI host doesn't like that.
+ */
+ adi,dsi-lanes = <3>;
+ avdd-supply = <&vreg_l13a_1p8>;
+ dvdd-supply = <&vreg_l13a_1p8>;
+ pvdd-supply = <&vreg_l13a_1p8>;
+ a2vdd-supply = <&vreg_l13a_1p8>;
+ v3p3-supply = <&v3p3_bck_bst>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adv7533_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ adv7533_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
+&blsp1_uart2 {
+ status = "okay";
+};
+
+&blsp2_dma {
+ /*
+ * The board will lock up if we toggle the BLSP clock, unless the
+ * BAM DMA interconnects support is in place.
+ */
+ /delete-property/ clocks;
+};
+
+&blsp2_uart1 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,wcn3990-bt";
+
+ vddio-supply = <&vreg_l13a_1p8>;
+ vddxo-supply = <&vreg_l9a_1p8>;
+ vddrf-supply = <&vreg_l6a_1p3>;
+ vddch0-supply = <&vreg_l19a_3p3>;
+ max-speed = <3200000>;
+ };
+};
+
+&dsi0 {
+ status = "okay";
+ vdda-supply = <&vreg_l1a_1p225>;
+};
+
+&dsi0_out {
+ remote-endpoint = <&adv7533_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+&dsi0_phy {
+ status = "okay";
+ vcca-supply = <&vreg_l1b_0p925>;
+};
+
+&mdp {
+ status = "okay";
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mmss_smmu {
+ status = "okay";
+};
+
+&pon_pwrkey {
+ status = "okay";
+};
+
+&pon_resin {
+ status = "okay";
+
+ linux,code = <KEY_VOLUMEUP>;
+};
+
+&qusb2phy0 {
+ status = "okay";
+
+ vdd-supply = <&vreg_l1b_0p925>;
+ vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
+};
+
+&qusb2phy1 {
+ status = "okay";
+
+ vdd-supply = <&vreg_l1b_0p925>;
+ vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
+};
+
+&rpm_requests {
+ pm660-regulators {
+ compatible = "qcom,rpm-pm660-regulators";
+
+ vdd_s1-supply = <&vph_pwr>;
+ vdd_s2-supply = <&vph_pwr>;
+ vdd_s3-supply = <&vph_pwr>;
+ vdd_s4-supply = <&vph_pwr>;
+ vdd_s5-supply = <&vph_pwr>;
+ vdd_s6-supply = <&vph_pwr>;
+
+ vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>;
+ vdd_l2_l3-supply = <&vreg_s2b_1p05>;
+ vdd_l5-supply = <&vreg_s2b_1p05>;
+ vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>;
+ vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>;
+
+ vreg_s4a_2p04: s4 {
+ regulator-min-microvolt = <1805000>;
+ regulator-max-microvolt = <2040000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-ramp-delay = <0>;
+ regulator-always-on;
+ };
+
+ vreg_s5a_1p35: s5 {
+ regulator-min-microvolt = <1224000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-ramp-delay = <0>;
+ };
+
+ vreg_l1a_1p225: l1 {
+ regulator-min-microvolt = <1150000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l6a_1p3: l6 {
+ regulator-min-microvolt = <1304000>;
+ regulator-max-microvolt = <1368000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l8a_1p8: l8 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+ regulator-system-load = <325000>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l9a_1p8: l9 {
+ regulator-min-microvolt = <1804000>;
+ regulator-max-microvolt = <1896000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l13a_1p8: l13 {
+ /* This gives power to the LPDDR4: never turn it off! */
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1944000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vreg_l19a_3p3: l19 {
+ regulator-min-microvolt = <3312000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+ regulator-allow-set-load;
+ };
+ };
+
+ pm660l-regulators {
+ compatible = "qcom,rpm-pm660l-regulators";
+
+ vdd_s1-supply = <&vph_pwr>;
+ vdd_s2-supply = <&vph_pwr>;
+ vdd_s3_s4-supply = <&vph_pwr>;
+ vdd_s5-supply = <&vph_pwr>;
+ vdd_s6-supply = <&vph_pwr>;
+
+ vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>;
+ vdd_l2-supply = <&vreg_bob>;
+ vdd_l3_l5_l7_l8-supply = <&vreg_bob>;
+ vdd_l4_l6-supply = <&vreg_bob>;
+ vdd_bob-supply = <&vph_pwr>;
+
+ vreg_s2b_1p05: s2 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-ramp-delay = <0>;
+ };
+
+ vreg_l1b_0p925: l1 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <925000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l2b_2p95: l2 {
+ regulator-min-microvolt = <1648000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l4b_2p95: l4 {
+ regulator-min-microvolt = <2944000>;
+ regulator-max-microvolt = <2952000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+
+ regulator-min-microamp = <200>;
+ regulator-max-microamp = <600000>;
+ regulator-system-load = <570000>;
+ regulator-allow-set-load;
+ };
+
+ /*
+ * Downstream specifies a range of 1721-3600mV,
+ * but the only assigned consumers are SDHCI2 VMMC
+ * and Coresight QPDI that both request pinned 2.95V.
+ * Tighten the range to 1.8-3.328 (closest to 3.3) to
+ * make the mmc driver happy.
+ */
+ vreg_l5b_2p95: l5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3328000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-system-load = <800000>;
+ regulator-ramp-delay = <0>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l7b_3p125: l7 {
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <3125000>;
+ regulator-enable-ramp-delay = <250>;
+ };
+
+ vreg_l8b_3p3: l8 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-enable-ramp-delay = <250>;
+ regulator-ramp-delay = <0>;
+ };
+
+ vreg_bob: bob {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3624000>;
+ regulator-enable-ramp-delay = <500>;
+ regulator-ramp-delay = <0>;
+ };
+ };
+};
+
+&sdc2_state_on {
+ sd-cd {
+ pins = "gpio54";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_state_off {
+ sd-cd {
+ pins = "gpio54";
+ bias-disable;
+ drive-strength = <2>;
+ };
+};
+
+&sdhc_1 {
+ status = "okay";
+ supports-cqe;
+
+ vmmc-supply = <&vreg_l4b_2p95>;
+ vqmmc-supply = <&vreg_l8a_1p8>;
+
+ mmc-ddr-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+};
+
+&sdhc_2 {
+ status = "okay";
+
+ vmmc-supply = <&vreg_l5b_2p95>;
+ vqmmc-supply = <&vreg_l2b_2p95>;
+
+ cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
+ no-sdio;
+ no-emmc;
+};
+
+&tlmm {
+ gpio-reserved-ranges = <0 4>, <8 4>;
+
+ sdc2_card_det_n: sd-card-det-n {
+ pins = "gpio54";
+ function = "gpio";
+ bias-pull-up;
+ };
+};
+
+&usb2 {
+ status = "okay";
+};
+
+&usb2_dwc3 {
+ dr_mode = "host";
+};
+
+&usb3 {
+ status = "okay";
+};
+
+&usb3_dwc3 {
+ dr_mode = "peripheral";
+ extcon = <&extcon_usb>;
+};
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v4 11/12] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support
2022-05-14 14:10 ` [PATCH v4 11/12] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Dmitry Baryshkov
@ 2022-05-14 14:43 ` Konrad Dybcio
2022-05-14 18:51 ` Dmitry Baryshkov
0 siblings, 1 reply; 21+ messages in thread
From: Konrad Dybcio @ 2022-05-14 14:43 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Marijn Suijten
Cc: linux-arm-msm, devicetree
On 14/05/2022 16:10, Dmitry Baryshkov wrote:
> The IFC6560 is a board from Inforce Computing, built around the SDA660
> SoC. This patch describes core clocks, some regulators from the two
> PMICs, debug uart, storage, bluetooth and audio DSP remoteproc.
>
> The regulator settings are inherited from prior work by Konrad Dybcio
> and AngeloGioacchino Del Regno.
>
> Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 471 ++++++++++++++++++
> 2 files changed, 472 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index f9e6343acd03..5f717fe0e8d0 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> new file mode 100644
> index 000000000000..d1923c1310f6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> @@ -0,0 +1,471 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, Linaro Ltd.
> + * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org>
> + * Copyright (c) 2020, AngeloGioacchino Del Regno
> + * <angelogioacchino.delregno@somainline.org>
> + */
> +
> +/dts-v1/;
> +
> +#include "sdm660.dtsi"
> +#include "pm660.dtsi"
> +#include "pm660l.dtsi"
> +
> +/ {
> + model = "Inforce 6560 Single Board Computer";
> + compatible = "inforce,ifc6560", "qcom,sda660";
> + chassis-type = "embedded"; /* SBC */
> +
> + aliases {
> + serial0 = &blsp1_uart2;
> + serial1 = &blsp2_uart1;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + volup {
> + label = "Volume Up";
> + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + debounce-interval = <15>;
> + };
> + };
> +
> + /*
> + * Until we hook up type-c detection, we
> + * have to stick with this. But it works.
> + */
> + extcon_usb: extcon-usb {
> + compatible = "linux,extcon-usb-gpio";
> + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;
> + };
> +
> + hdmi-out {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con: endpoint {
> + remote-endpoint = <&adv7533_out>;
> + };
> + };
> + };
> +
> + vph_pwr: vph-pwr-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3800000>;
> + regulator-max-microvolt = <3800000>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + v3p3_bck_bst: v3p3-bck-bst-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "v3p3_bck_bst";
> +
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + vin-supply = <&vph_pwr>;
> + };
> +
> + v1p2_ldo: v1p2-ldo-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "v1p2_ldo";
> +
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> +
> + vin-supply = <&vph_pwr>;
> + };
> +
> + v5p0_boost: v5p0-boost-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "v5p0_boost";
> +
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> +
> + vin-supply = <&vph_pwr>;
> + };
> +};
> +
> +&adsp_pil {
> + firmware-name = "qcom/ifc6560/adsp.mbn";
> +};
> +
> +&blsp1_dma {
> + /*
> + * The board will lock up if we toggle the BLSP clock, unless the
> + * BAM DMA interconnects support is in place.
> + */
> + /delete-property/ clocks;
> +};
> +
> +&blsp_i2c6 {
> + status = "okay";
> +
> + adv7533: hdmi@39 {
> + compatible = "adi,adv7535";
> + reg = <0x39>, <0x66>;
> + reg-names = "main", "edid";
> +
> + interrupt-parent = <&pm660l_gpios>;
> + interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
> +
> + clocks = <&rpmcc RPM_SMD_BB_CLK2>;
> + clock-names = "cec";
> + /*
> + * Limit to 3 lanes to prevent the bridge from changing amount
> + * of lanes in the fly. MSM DSI host doesn't like that.
> + */
> + adi,dsi-lanes = <3>;
> + avdd-supply = <&vreg_l13a_1p8>;
> + dvdd-supply = <&vreg_l13a_1p8>;
> + pvdd-supply = <&vreg_l13a_1p8>;
> + a2vdd-supply = <&vreg_l13a_1p8>;
> + v3p3-supply = <&v3p3_bck_bst>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + adv7533_in: endpoint {
> + remote-endpoint = <&dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + adv7533_out: endpoint {
> + remote-endpoint = <&hdmi_con>;
> + };
> + };
> + };
> + };
> +};
> +
> +&blsp1_uart2 {
> + status = "okay";
> +};
> +
> +&blsp2_dma {
> + /*
> + * The board will lock up if we toggle the BLSP clock, unless the
> + * BAM DMA interconnects support is in place.
> + */
> + /delete-property/ clocks;
> +};
> +
> +&blsp2_uart1 {
> + status = "okay";
> +
> + bluetooth {
> + compatible = "qcom,wcn3990-bt";
> +
> + vddio-supply = <&vreg_l13a_1p8>;
> + vddxo-supply = <&vreg_l9a_1p8>;
> + vddrf-supply = <&vreg_l6a_1p3>;
> + vddch0-supply = <&vreg_l19a_3p3>;
> + max-speed = <3200000>;
> + };
> +};
> +
> +&dsi0 {
> + status = "okay";
> + vdda-supply = <&vreg_l1a_1p225>;
> +};
> +
> +&dsi0_out {
> + remote-endpoint = <&adv7533_in>;
> + data-lanes = <0 1 2 3>;
> +};
> +
> +&dsi0_phy {
> + status = "okay";
> + vcca-supply = <&vreg_l1b_0p925>;
> +};
> +
> +&mdp {
> + status = "okay";
> +};
It's enabled by default.
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/qcom/sdm630.dtsi?h=next-20220513#n1454
> +
> +&mdss {
> + status = "okay";
> +};
> +
> +&mmss_smmu {
> + status = "okay";
> +};
> +
> +&pon_pwrkey {
> + status = "okay";
> +};
> +
> +&pon_resin {
> + status = "okay";
> +
> + linux,code = <KEY_VOLUMEUP>;
> +};
> +
> +&qusb2phy0 {
> + status = "okay";
> +
> + vdd-supply = <&vreg_l1b_0p925>;
> + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
> +};
> +
> +&qusb2phy1 {
> + status = "okay";
> +
> + vdd-supply = <&vreg_l1b_0p925>;
> + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
> +};
> +
> +&rpm_requests {
> + pm660-regulators {
> + compatible = "qcom,rpm-pm660-regulators";
> +
> + vdd_s1-supply = <&vph_pwr>;
> + vdd_s2-supply = <&vph_pwr>;
> + vdd_s3-supply = <&vph_pwr>;
> + vdd_s4-supply = <&vph_pwr>;
> + vdd_s5-supply = <&vph_pwr>;
> + vdd_s6-supply = <&vph_pwr>;
> +
> + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>;
> + vdd_l2_l3-supply = <&vreg_s2b_1p05>;
> + vdd_l5-supply = <&vreg_s2b_1p05>;
> + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>;
> + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>;
> +
> + vreg_s4a_2p04: s4 {
> + regulator-min-microvolt = <1805000>;
> + regulator-max-microvolt = <2040000>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-ramp-delay = <0>;
> + regulator-always-on;
> + };
> +
> + vreg_s5a_1p35: s5 {
> + regulator-min-microvolt = <1224000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-ramp-delay = <0>;
> + };
> +
> + vreg_l1a_1p225: l1 {
> + regulator-min-microvolt = <1150000>;
> + regulator-max-microvolt = <1250000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l6a_1p3: l6 {
> + regulator-min-microvolt = <1304000>;
> + regulator-max-microvolt = <1368000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l8a_1p8: l8 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> + regulator-system-load = <325000>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l9a_1p8: l9 {
> + regulator-min-microvolt = <1804000>;
> + regulator-max-microvolt = <1896000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l13a_1p8: l13 {
> + /* This gives power to the LPDDR4: never turn it off! */
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1944000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vreg_l19a_3p3: l19 {
> + regulator-min-microvolt = <3312000>;
> + regulator-max-microvolt = <3400000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> + regulator-allow-set-load;
> + };
> + };
> +
> + pm660l-regulators {
> + compatible = "qcom,rpm-pm660l-regulators";
> +
> + vdd_s1-supply = <&vph_pwr>;
> + vdd_s2-supply = <&vph_pwr>;
> + vdd_s3_s4-supply = <&vph_pwr>;
> + vdd_s5-supply = <&vph_pwr>;
> + vdd_s6-supply = <&vph_pwr>;
> +
> + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>;
> + vdd_l2-supply = <&vreg_bob>;
> + vdd_l3_l5_l7_l8-supply = <&vreg_bob>;
> + vdd_l4_l6-supply = <&vreg_bob>;
> + vdd_bob-supply = <&vph_pwr>;
> +
> + vreg_s2b_1p05: s2 {
> + regulator-min-microvolt = <1050000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-ramp-delay = <0>;
> + };
> +
> + vreg_l1b_0p925: l1 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <925000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l2b_2p95: l2 {
> + regulator-min-microvolt = <1648000>;
> + regulator-max-microvolt = <3100000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l4b_2p95: l4 {
> + regulator-min-microvolt = <2944000>;
> + regulator-max-microvolt = <2952000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> +
> + regulator-min-microamp = <200>;
> + regulator-max-microamp = <600000>;
> + regulator-system-load = <570000>;
> + regulator-allow-set-load;
> + };
> +
> + /*
> + * Downstream specifies a range of 1721-3600mV,
> + * but the only assigned consumers are SDHCI2 VMMC
> + * and Coresight QPDI that both request pinned 2.95V.
> + * Tighten the range to 1.8-3.328 (closest to 3.3) to
> + * make the mmc driver happy.
> + */
> + vreg_l5b_2p95: l5 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3328000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-system-load = <800000>;
> + regulator-ramp-delay = <0>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l7b_3p125: l7 {
> + regulator-min-microvolt = <2700000>;
> + regulator-max-microvolt = <3125000>;
> + regulator-enable-ramp-delay = <250>;
> + };
> +
> + vreg_l8b_3p3: l8 {
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <3400000>;
> + regulator-enable-ramp-delay = <250>;
> + regulator-ramp-delay = <0>;
> + };
> +
> + vreg_bob: bob {
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3624000>;
> + regulator-enable-ramp-delay = <500>;
> + regulator-ramp-delay = <0>;
> + };
> + };
> +};
> +
> +&sdc2_state_on {
I'm not sure if letters go before numbers, that said this may not
necessarily be wrong.
> + sd-cd {
> + pins = "gpio54";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +};
> +
> +&sdc2_state_off {
> + sd-cd {
> + pins = "gpio54";
> + bias-disable;
> + drive-strength = <2>;
> + };
> +};
> +
> +&sdhc_1 {
> + status = "okay";
> + supports-cqe;
> +
> + vmmc-supply = <&vreg_l4b_2p95>;
> + vqmmc-supply = <&vreg_l8a_1p8>;
> +
> + mmc-ddr-1_8v;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> +};
> +
> +&sdhc_2 {
> + status = "okay";
> +
> + vmmc-supply = <&vreg_l5b_2p95>;
> + vqmmc-supply = <&vreg_l2b_2p95>;
> +
> + cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
> + no-sdio;
> + no-emmc;
> +};
> +
> +&tlmm {
> + gpio-reserved-ranges = <0 4>, <8 4>;
> +
> + sdc2_card_det_n: sd-card-det-n {
> + pins = "gpio54";
> + function = "gpio";
> + bias-pull-up;
> + };
Unused now, I think
> +};
> +
> +&usb2 {
> + status = "okay";
> +};
> +
> +&usb2_dwc3 {
> + dr_mode = "host";
> +};
> +
> +&usb3 {
> + status = "okay";
> +};
> +
> +&usb3_dwc3 {
> + dr_mode = "peripheral";
> + extcon = <&extcon_usb>;
> +};
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v4 11/12] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support
2022-05-14 14:43 ` Konrad Dybcio
@ 2022-05-14 18:51 ` Dmitry Baryshkov
2022-05-14 19:44 ` Konrad Dybcio
0 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 18:51 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Marijn Suijten, linux-arm-msm, devicetree
On Sat, 14 May 2022 at 17:43, Konrad Dybcio
<konrad.dybcio@somainline.org> wrote:
>
>
> On 14/05/2022 16:10, Dmitry Baryshkov wrote:
> > The IFC6560 is a board from Inforce Computing, built around the SDA660
> > SoC. This patch describes core clocks, some regulators from the two
> > PMICs, debug uart, storage, bluetooth and audio DSP remoteproc.
> >
> > The regulator settings are inherited from prior work by Konrad Dybcio
> > and AngeloGioacchino Del Regno.
> >
> > Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > arch/arm64/boot/dts/qcom/Makefile | 1 +
> > .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 471 ++++++++++++++++++
> > 2 files changed, 472 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> >
> > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> > index f9e6343acd03..5f717fe0e8d0 100644
> > --- a/arch/arm64/boot/dts/qcom/Makefile
> > +++ b/arch/arm64/boot/dts/qcom/Makefile
> > @@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb
> > +dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
> > diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> > new file mode 100644
> > index 000000000000..d1923c1310f6
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> > @@ -0,0 +1,471 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +/*
> > + * Copyright (c) 2021, Linaro Ltd.
> > + * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org>
> > + * Copyright (c) 2020, AngeloGioacchino Del Regno
> > + * <angelogioacchino.delregno@somainline.org>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "sdm660.dtsi"
> > +#include "pm660.dtsi"
> > +#include "pm660l.dtsi"
> > +
> > +/ {
> > + model = "Inforce 6560 Single Board Computer";
> > + compatible = "inforce,ifc6560", "qcom,sda660";
> > + chassis-type = "embedded"; /* SBC */
> > +
> > + aliases {
> > + serial0 = &blsp1_uart2;
> > + serial1 = &blsp2_uart1;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + gpio-keys {
> > + compatible = "gpio-keys";
> > +
> > + volup {
> > + label = "Volume Up";
> > + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
> > + linux,code = <KEY_VOLUMEUP>;
> > + debounce-interval = <15>;
> > + };
> > + };
> > +
> > + /*
> > + * Until we hook up type-c detection, we
> > + * have to stick with this. But it works.
> > + */
> > + extcon_usb: extcon-usb {
> > + compatible = "linux,extcon-usb-gpio";
> > + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;
> > + };
> > +
> > + hdmi-out {
> > + compatible = "hdmi-connector";
> > + type = "a";
> > +
> > + port {
> > + hdmi_con: endpoint {
> > + remote-endpoint = <&adv7533_out>;
> > + };
> > + };
> > + };
> > +
> > + vph_pwr: vph-pwr-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vph_pwr";
> > + regulator-min-microvolt = <3800000>;
> > + regulator-max-microvolt = <3800000>;
> > +
> > + regulator-always-on;
> > + regulator-boot-on;
> > + };
> > +
> > + v3p3_bck_bst: v3p3-bck-bst-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "v3p3_bck_bst";
> > +
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > +
> > + vin-supply = <&vph_pwr>;
> > + };
> > +
> > + v1p2_ldo: v1p2-ldo-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "v1p2_ldo";
> > +
> > + regulator-min-microvolt = <1200000>;
> > + regulator-max-microvolt = <1200000>;
> > +
> > + vin-supply = <&vph_pwr>;
> > + };
> > +
> > + v5p0_boost: v5p0-boost-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "v5p0_boost";
> > +
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > +
> > + vin-supply = <&vph_pwr>;
> > + };
> > +};
> > +
> > +&adsp_pil {
> > + firmware-name = "qcom/ifc6560/adsp.mbn";
> > +};
> > +
> > +&blsp1_dma {
> > + /*
> > + * The board will lock up if we toggle the BLSP clock, unless the
> > + * BAM DMA interconnects support is in place.
> > + */
> > + /delete-property/ clocks;
> > +};
> > +
> > +&blsp_i2c6 {
> > + status = "okay";
> > +
> > + adv7533: hdmi@39 {
> > + compatible = "adi,adv7535";
> > + reg = <0x39>, <0x66>;
> > + reg-names = "main", "edid";
> > +
> > + interrupt-parent = <&pm660l_gpios>;
> > + interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
> > +
> > + clocks = <&rpmcc RPM_SMD_BB_CLK2>;
> > + clock-names = "cec";
> > + /*
> > + * Limit to 3 lanes to prevent the bridge from changing amount
> > + * of lanes in the fly. MSM DSI host doesn't like that.
> > + */
> > + adi,dsi-lanes = <3>;
> > + avdd-supply = <&vreg_l13a_1p8>;
> > + dvdd-supply = <&vreg_l13a_1p8>;
> > + pvdd-supply = <&vreg_l13a_1p8>;
> > + a2vdd-supply = <&vreg_l13a_1p8>;
> > + v3p3-supply = <&v3p3_bck_bst>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > +
> > + adv7533_in: endpoint {
> > + remote-endpoint = <&dsi0_out>;
> > + };
> > + };
> > +
> > + port@1 {
> > + reg = <1>;
> > +
> > + adv7533_out: endpoint {
> > + remote-endpoint = <&hdmi_con>;
> > + };
> > + };
> > + };
> > + };
> > +};
> > +
> > +&blsp1_uart2 {
> > + status = "okay";
> > +};
> > +
> > +&blsp2_dma {
> > + /*
> > + * The board will lock up if we toggle the BLSP clock, unless the
> > + * BAM DMA interconnects support is in place.
> > + */
> > + /delete-property/ clocks;
> > +};
> > +
> > +&blsp2_uart1 {
> > + status = "okay";
> > +
> > + bluetooth {
> > + compatible = "qcom,wcn3990-bt";
> > +
> > + vddio-supply = <&vreg_l13a_1p8>;
> > + vddxo-supply = <&vreg_l9a_1p8>;
> > + vddrf-supply = <&vreg_l6a_1p3>;
> > + vddch0-supply = <&vreg_l19a_3p3>;
> > + max-speed = <3200000>;
> > + };
> > +};
> > +
> > +&dsi0 {
> > + status = "okay";
> > + vdda-supply = <&vreg_l1a_1p225>;
> > +};
> > +
> > +&dsi0_out {
> > + remote-endpoint = <&adv7533_in>;
> > + data-lanes = <0 1 2 3>;
> > +};
> > +
> > +&dsi0_phy {
> > + status = "okay";
> > + vcca-supply = <&vreg_l1b_0p925>;
> > +};
> > +
> > +&mdp {
> > + status = "okay";
> > +};
>
> It's enabled by default.
I thought I removed this chunk!
>
>
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/qcom/sdm630.dtsi?h=next-20220513#n1454
>
>
> > +
> > +&mdss {
> > + status = "okay";
> > +};
> > +
> > +&mmss_smmu {
> > + status = "okay";
> > +};
> > +
> > +&pon_pwrkey {
> > + status = "okay";
> > +};
> > +
> > +&pon_resin {
> > + status = "okay";
> > +
> > + linux,code = <KEY_VOLUMEUP>;
> > +};
> > +
> > +&qusb2phy0 {
> > + status = "okay";
> > +
> > + vdd-supply = <&vreg_l1b_0p925>;
> > + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
> > +};
> > +
> > +&qusb2phy1 {
> > + status = "okay";
> > +
> > + vdd-supply = <&vreg_l1b_0p925>;
> > + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
> > +};
> > +
> > +&rpm_requests {
> > + pm660-regulators {
> > + compatible = "qcom,rpm-pm660-regulators";
> > +
> > + vdd_s1-supply = <&vph_pwr>;
> > + vdd_s2-supply = <&vph_pwr>;
> > + vdd_s3-supply = <&vph_pwr>;
> > + vdd_s4-supply = <&vph_pwr>;
> > + vdd_s5-supply = <&vph_pwr>;
> > + vdd_s6-supply = <&vph_pwr>;
> > +
> > + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>;
> > + vdd_l2_l3-supply = <&vreg_s2b_1p05>;
> > + vdd_l5-supply = <&vreg_s2b_1p05>;
> > + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>;
> > + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>;
> > +
> > + vreg_s4a_2p04: s4 {
> > + regulator-min-microvolt = <1805000>;
> > + regulator-max-microvolt = <2040000>;
> > + regulator-enable-ramp-delay = <200>;
> > + regulator-ramp-delay = <0>;
> > + regulator-always-on;
> > + };
> > +
> > + vreg_s5a_1p35: s5 {
> > + regulator-min-microvolt = <1224000>;
> > + regulator-max-microvolt = <1350000>;
> > + regulator-enable-ramp-delay = <200>;
> > + regulator-ramp-delay = <0>;
> > + };
> > +
> > + vreg_l1a_1p225: l1 {
> > + regulator-min-microvolt = <1150000>;
> > + regulator-max-microvolt = <1250000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + vreg_l6a_1p3: l6 {
> > + regulator-min-microvolt = <1304000>;
> > + regulator-max-microvolt = <1368000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + vreg_l8a_1p8: l8 {
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > + regulator-system-load = <325000>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + vreg_l9a_1p8: l9 {
> > + regulator-min-microvolt = <1804000>;
> > + regulator-max-microvolt = <1896000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + vreg_l13a_1p8: l13 {
> > + /* This gives power to the LPDDR4: never turn it off! */
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1944000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > + regulator-always-on;
> > + regulator-boot-on;
> > + };
> > +
> > + vreg_l19a_3p3: l19 {
> > + regulator-min-microvolt = <3312000>;
> > + regulator-max-microvolt = <3400000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > + regulator-allow-set-load;
> > + };
> > + };
> > +
> > + pm660l-regulators {
> > + compatible = "qcom,rpm-pm660l-regulators";
> > +
> > + vdd_s1-supply = <&vph_pwr>;
> > + vdd_s2-supply = <&vph_pwr>;
> > + vdd_s3_s4-supply = <&vph_pwr>;
> > + vdd_s5-supply = <&vph_pwr>;
> > + vdd_s6-supply = <&vph_pwr>;
> > +
> > + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>;
> > + vdd_l2-supply = <&vreg_bob>;
> > + vdd_l3_l5_l7_l8-supply = <&vreg_bob>;
> > + vdd_l4_l6-supply = <&vreg_bob>;
> > + vdd_bob-supply = <&vph_pwr>;
> > +
> > + vreg_s2b_1p05: s2 {
> > + regulator-min-microvolt = <1050000>;
> > + regulator-max-microvolt = <1050000>;
> > + regulator-enable-ramp-delay = <200>;
> > + regulator-ramp-delay = <0>;
> > + };
> > +
> > + vreg_l1b_0p925: l1 {
> > + regulator-min-microvolt = <800000>;
> > + regulator-max-microvolt = <925000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + vreg_l2b_2p95: l2 {
> > + regulator-min-microvolt = <1648000>;
> > + regulator-max-microvolt = <3100000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + vreg_l4b_2p95: l4 {
> > + regulator-min-microvolt = <2944000>;
> > + regulator-max-microvolt = <2952000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > +
> > + regulator-min-microamp = <200>;
> > + regulator-max-microamp = <600000>;
> > + regulator-system-load = <570000>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + /*
> > + * Downstream specifies a range of 1721-3600mV,
> > + * but the only assigned consumers are SDHCI2 VMMC
> > + * and Coresight QPDI that both request pinned 2.95V.
> > + * Tighten the range to 1.8-3.328 (closest to 3.3) to
> > + * make the mmc driver happy.
> > + */
> > + vreg_l5b_2p95: l5 {
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <3328000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-system-load = <800000>;
> > + regulator-ramp-delay = <0>;
> > + regulator-allow-set-load;
> > + };
> > +
> > + vreg_l7b_3p125: l7 {
> > + regulator-min-microvolt = <2700000>;
> > + regulator-max-microvolt = <3125000>;
> > + regulator-enable-ramp-delay = <250>;
> > + };
> > +
> > + vreg_l8b_3p3: l8 {
> > + regulator-min-microvolt = <2800000>;
> > + regulator-max-microvolt = <3400000>;
> > + regulator-enable-ramp-delay = <250>;
> > + regulator-ramp-delay = <0>;
> > + };
> > +
> > + vreg_bob: bob {
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3624000>;
> > + regulator-enable-ramp-delay = <500>;
> > + regulator-ramp-delay = <0>;
> > + };
> > + };
> > +};
> > +
> > +&sdc2_state_on {
>
> I'm not sure if letters go before numbers, that said this may not
> necessarily be wrong.
In my opinion, the numbers come before letters. But in this case it's
even simpler, If I understand your concern correctly.
It is 'sdc2...' vs 'sdhc...'.
>
>
> > + sd-cd {
> > + pins = "gpio54";
> > + bias-pull-up;
> > + drive-strength = <2>;
> > + };
> > +};
> > +
> > +&sdc2_state_off {
> > + sd-cd {
> > + pins = "gpio54";
> > + bias-disable;
> > + drive-strength = <2>;
> > + };
> > +};
> > +
> > +&sdhc_1 {
> > + status = "okay";
> > + supports-cqe;
> > +
> > + vmmc-supply = <&vreg_l4b_2p95>;
> > + vqmmc-supply = <&vreg_l8a_1p8>;
> > +
> > + mmc-ddr-1_8v;
> > + mmc-hs400-1_8v;
> > + mmc-hs400-enhanced-strobe;
> > +};
> > +
> > +&sdhc_2 {
> > + status = "okay";
> > +
> > + vmmc-supply = <&vreg_l5b_2p95>;
> > + vqmmc-supply = <&vreg_l2b_2p95>;
> > +
> > + cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
> > + no-sdio;
> > + no-emmc;
> > +};
> > +
> > +&tlmm {
> > + gpio-reserved-ranges = <0 4>, <8 4>;
> > +
> > + sdc2_card_det_n: sd-card-det-n {
> > + pins = "gpio54";
> > + function = "gpio";
> > + bias-pull-up;
> > + };
>
> Unused now, I think
Ugh. True.
>
>
> > +};
> > +
> > +&usb2 {
> > + status = "okay";
> > +};
> > +
> > +&usb2_dwc3 {
> > + dr_mode = "host";
> > +};
> > +
> > +&usb3 {
> > + status = "okay";
> > +};
> > +
> > +&usb3_dwc3 {
> > + dr_mode = "peripheral";
> > + extcon = <&extcon_usb>;
> > +};
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v4 11/12] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support
2022-05-14 18:51 ` Dmitry Baryshkov
@ 2022-05-14 19:44 ` Konrad Dybcio
0 siblings, 0 replies; 21+ messages in thread
From: Konrad Dybcio @ 2022-05-14 19:44 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Marijn Suijten, linux-arm-msm, devicetree
On 14.05.2022 20:51, Dmitry Baryshkov wrote:
> On Sat, 14 May 2022 at 17:43, Konrad Dybcio
> <konrad.dybcio@somainline.org> wrote:
>>
>>
>> On 14/05/2022 16:10, Dmitry Baryshkov wrote:
>>> The IFC6560 is a board from Inforce Computing, built around the SDA660
>>> SoC. This patch describes core clocks, some regulators from the two
>>> PMICs, debug uart, storage, bluetooth and audio DSP remoteproc.
>>>
>>> The regulator settings are inherited from prior work by Konrad Dybcio
>>> and AngeloGioacchino Del Regno.
>>>
>>> Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>> ---
>>> arch/arm64/boot/dts/qcom/Makefile | 1 +
>>> .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 471 ++++++++++++++++++
>>> 2 files changed, 472 insertions(+)
>>> create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>> index f9e6343acd03..5f717fe0e8d0 100644
>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>> @@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb
>>> +dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
>>> diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
>>> new file mode 100644
>>> index 000000000000..d1923c1310f6
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
>>> @@ -0,0 +1,471 @@
>>> +// SPDX-License-Identifier: BSD-3-Clause
>>> +/*
>>> + * Copyright (c) 2021, Linaro Ltd.
>>> + * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org>
>>> + * Copyright (c) 2020, AngeloGioacchino Del Regno
>>> + * <angelogioacchino.delregno@somainline.org>
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "sdm660.dtsi"
>>> +#include "pm660.dtsi"
>>> +#include "pm660l.dtsi"
>>> +
>>> +/ {
>>> + model = "Inforce 6560 Single Board Computer";
>>> + compatible = "inforce,ifc6560", "qcom,sda660";
>>> + chassis-type = "embedded"; /* SBC */
>>> +
>>> + aliases {
>>> + serial0 = &blsp1_uart2;
>>> + serial1 = &blsp2_uart1;
>>> + };
>>> +
>>> + chosen {
>>> + stdout-path = "serial0:115200n8";
>>> + };
>>> +
>>> + gpio-keys {
>>> + compatible = "gpio-keys";
>>> +
>>> + volup {
>>> + label = "Volume Up";
>>> + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
>>> + linux,code = <KEY_VOLUMEUP>;
>>> + debounce-interval = <15>;
>>> + };
>>> + };
>>> +
>>> + /*
>>> + * Until we hook up type-c detection, we
>>> + * have to stick with this. But it works.
>>> + */
>>> + extcon_usb: extcon-usb {
>>> + compatible = "linux,extcon-usb-gpio";
>>> + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;
>>> + };
>>> +
>>> + hdmi-out {
>>> + compatible = "hdmi-connector";
>>> + type = "a";
>>> +
>>> + port {
>>> + hdmi_con: endpoint {
>>> + remote-endpoint = <&adv7533_out>;
>>> + };
>>> + };
>>> + };
>>> +
>>> + vph_pwr: vph-pwr-regulator {
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "vph_pwr";
>>> + regulator-min-microvolt = <3800000>;
>>> + regulator-max-microvolt = <3800000>;
>>> +
>>> + regulator-always-on;
>>> + regulator-boot-on;
>>> + };
>>> +
>>> + v3p3_bck_bst: v3p3-bck-bst-regulator {
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "v3p3_bck_bst";
>>> +
>>> + regulator-min-microvolt = <3300000>;
>>> + regulator-max-microvolt = <3300000>;
>>> +
>>> + vin-supply = <&vph_pwr>;
>>> + };
>>> +
>>> + v1p2_ldo: v1p2-ldo-regulator {
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "v1p2_ldo";
>>> +
>>> + regulator-min-microvolt = <1200000>;
>>> + regulator-max-microvolt = <1200000>;
>>> +
>>> + vin-supply = <&vph_pwr>;
>>> + };
>>> +
>>> + v5p0_boost: v5p0-boost-regulator {
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "v5p0_boost";
>>> +
>>> + regulator-min-microvolt = <5000000>;
>>> + regulator-max-microvolt = <5000000>;
>>> +
>>> + vin-supply = <&vph_pwr>;
>>> + };
>>> +};
>>> +
>>> +&adsp_pil {
>>> + firmware-name = "qcom/ifc6560/adsp.mbn";
>>> +};
>>> +
>>> +&blsp1_dma {
>>> + /*
>>> + * The board will lock up if we toggle the BLSP clock, unless the
>>> + * BAM DMA interconnects support is in place.
>>> + */
>>> + /delete-property/ clocks;
>>> +};
>>> +
>>> +&blsp_i2c6 {
>>> + status = "okay";
>>> +
>>> + adv7533: hdmi@39 {
>>> + compatible = "adi,adv7535";
>>> + reg = <0x39>, <0x66>;
>>> + reg-names = "main", "edid";
>>> +
>>> + interrupt-parent = <&pm660l_gpios>;
>>> + interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
>>> +
>>> + clocks = <&rpmcc RPM_SMD_BB_CLK2>;
>>> + clock-names = "cec";
>>> + /*
>>> + * Limit to 3 lanes to prevent the bridge from changing amount
>>> + * of lanes in the fly. MSM DSI host doesn't like that.
>>> + */
>>> + adi,dsi-lanes = <3>;
>>> + avdd-supply = <&vreg_l13a_1p8>;
>>> + dvdd-supply = <&vreg_l13a_1p8>;
>>> + pvdd-supply = <&vreg_l13a_1p8>;
>>> + a2vdd-supply = <&vreg_l13a_1p8>;
>>> + v3p3-supply = <&v3p3_bck_bst>;
>>> +
>>> + ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@0 {
>>> + reg = <0>;
>>> +
>>> + adv7533_in: endpoint {
>>> + remote-endpoint = <&dsi0_out>;
>>> + };
>>> + };
>>> +
>>> + port@1 {
>>> + reg = <1>;
>>> +
>>> + adv7533_out: endpoint {
>>> + remote-endpoint = <&hdmi_con>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> +};
>>> +
>>> +&blsp1_uart2 {
>>> + status = "okay";
>>> +};
>>> +
>>> +&blsp2_dma {
>>> + /*
>>> + * The board will lock up if we toggle the BLSP clock, unless the
>>> + * BAM DMA interconnects support is in place.
>>> + */
>>> + /delete-property/ clocks;
>>> +};
>>> +
>>> +&blsp2_uart1 {
>>> + status = "okay";
>>> +
>>> + bluetooth {
>>> + compatible = "qcom,wcn3990-bt";
>>> +
>>> + vddio-supply = <&vreg_l13a_1p8>;
>>> + vddxo-supply = <&vreg_l9a_1p8>;
>>> + vddrf-supply = <&vreg_l6a_1p3>;
>>> + vddch0-supply = <&vreg_l19a_3p3>;
>>> + max-speed = <3200000>;
>>> + };
>>> +};
>>> +
>>> +&dsi0 {
>>> + status = "okay";
>>> + vdda-supply = <&vreg_l1a_1p225>;
>>> +};
>>> +
>>> +&dsi0_out {
>>> + remote-endpoint = <&adv7533_in>;
>>> + data-lanes = <0 1 2 3>;
>>> +};
>>> +
>>> +&dsi0_phy {
>>> + status = "okay";
>>> + vcca-supply = <&vreg_l1b_0p925>;
>>> +};
>>> +
>>> +&mdp {
>>> + status = "okay";
>>> +};
>>
>> It's enabled by default.
>
> I thought I removed this chunk!
>
>>
>>
>> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/qcom/sdm630.dtsi?h=next-20220513#n1454
>>
>>
>>> +
>>> +&mdss {
>>> + status = "okay";
>>> +};
>>> +
>>> +&mmss_smmu {
>>> + status = "okay";
>>> +};
>>> +
>>> +&pon_pwrkey {
>>> + status = "okay";
>>> +};
>>> +
>>> +&pon_resin {
>>> + status = "okay";
>>> +
>>> + linux,code = <KEY_VOLUMEUP>;
>>> +};
>>> +
>>> +&qusb2phy0 {
>>> + status = "okay";
>>> +
>>> + vdd-supply = <&vreg_l1b_0p925>;
>>> + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
>>> +};
>>> +
>>> +&qusb2phy1 {
>>> + status = "okay";
>>> +
>>> + vdd-supply = <&vreg_l1b_0p925>;
>>> + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
>>> +};
>>> +
>>> +&rpm_requests {
>>> + pm660-regulators {
>>> + compatible = "qcom,rpm-pm660-regulators";
>>> +
>>> + vdd_s1-supply = <&vph_pwr>;
>>> + vdd_s2-supply = <&vph_pwr>;
>>> + vdd_s3-supply = <&vph_pwr>;
>>> + vdd_s4-supply = <&vph_pwr>;
>>> + vdd_s5-supply = <&vph_pwr>;
>>> + vdd_s6-supply = <&vph_pwr>;
>>> +
>>> + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>;
>>> + vdd_l2_l3-supply = <&vreg_s2b_1p05>;
>>> + vdd_l5-supply = <&vreg_s2b_1p05>;
>>> + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>;
>>> + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>;
>>> +
>>> + vreg_s4a_2p04: s4 {
>>> + regulator-min-microvolt = <1805000>;
>>> + regulator-max-microvolt = <2040000>;
>>> + regulator-enable-ramp-delay = <200>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-always-on;
>>> + };
>>> +
>>> + vreg_s5a_1p35: s5 {
>>> + regulator-min-microvolt = <1224000>;
>>> + regulator-max-microvolt = <1350000>;
>>> + regulator-enable-ramp-delay = <200>;
>>> + regulator-ramp-delay = <0>;
>>> + };
>>> +
>>> + vreg_l1a_1p225: l1 {
>>> + regulator-min-microvolt = <1150000>;
>>> + regulator-max-microvolt = <1250000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + vreg_l6a_1p3: l6 {
>>> + regulator-min-microvolt = <1304000>;
>>> + regulator-max-microvolt = <1368000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + vreg_l8a_1p8: l8 {
>>> + regulator-min-microvolt = <1800000>;
>>> + regulator-max-microvolt = <1800000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-system-load = <325000>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + vreg_l9a_1p8: l9 {
>>> + regulator-min-microvolt = <1804000>;
>>> + regulator-max-microvolt = <1896000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + vreg_l13a_1p8: l13 {
>>> + /* This gives power to the LPDDR4: never turn it off! */
>>> + regulator-min-microvolt = <1800000>;
>>> + regulator-max-microvolt = <1944000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-always-on;
>>> + regulator-boot-on;
>>> + };
>>> +
>>> + vreg_l19a_3p3: l19 {
>>> + regulator-min-microvolt = <3312000>;
>>> + regulator-max-microvolt = <3400000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-allow-set-load;
>>> + };
>>> + };
>>> +
>>> + pm660l-regulators {
>>> + compatible = "qcom,rpm-pm660l-regulators";
>>> +
>>> + vdd_s1-supply = <&vph_pwr>;
>>> + vdd_s2-supply = <&vph_pwr>;
>>> + vdd_s3_s4-supply = <&vph_pwr>;
>>> + vdd_s5-supply = <&vph_pwr>;
>>> + vdd_s6-supply = <&vph_pwr>;
>>> +
>>> + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>;
>>> + vdd_l2-supply = <&vreg_bob>;
>>> + vdd_l3_l5_l7_l8-supply = <&vreg_bob>;
>>> + vdd_l4_l6-supply = <&vreg_bob>;
>>> + vdd_bob-supply = <&vph_pwr>;
>>> +
>>> + vreg_s2b_1p05: s2 {
>>> + regulator-min-microvolt = <1050000>;
>>> + regulator-max-microvolt = <1050000>;
>>> + regulator-enable-ramp-delay = <200>;
>>> + regulator-ramp-delay = <0>;
>>> + };
>>> +
>>> + vreg_l1b_0p925: l1 {
>>> + regulator-min-microvolt = <800000>;
>>> + regulator-max-microvolt = <925000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + vreg_l2b_2p95: l2 {
>>> + regulator-min-microvolt = <1648000>;
>>> + regulator-max-microvolt = <3100000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + vreg_l4b_2p95: l4 {
>>> + regulator-min-microvolt = <2944000>;
>>> + regulator-max-microvolt = <2952000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> +
>>> + regulator-min-microamp = <200>;
>>> + regulator-max-microamp = <600000>;
>>> + regulator-system-load = <570000>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + /*
>>> + * Downstream specifies a range of 1721-3600mV,
>>> + * but the only assigned consumers are SDHCI2 VMMC
>>> + * and Coresight QPDI that both request pinned 2.95V.
>>> + * Tighten the range to 1.8-3.328 (closest to 3.3) to
>>> + * make the mmc driver happy.
>>> + */
>>> + vreg_l5b_2p95: l5 {
>>> + regulator-min-microvolt = <1800000>;
>>> + regulator-max-microvolt = <3328000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-system-load = <800000>;
>>> + regulator-ramp-delay = <0>;
>>> + regulator-allow-set-load;
>>> + };
>>> +
>>> + vreg_l7b_3p125: l7 {
>>> + regulator-min-microvolt = <2700000>;
>>> + regulator-max-microvolt = <3125000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + };
>>> +
>>> + vreg_l8b_3p3: l8 {
>>> + regulator-min-microvolt = <2800000>;
>>> + regulator-max-microvolt = <3400000>;
>>> + regulator-enable-ramp-delay = <250>;
>>> + regulator-ramp-delay = <0>;
>>> + };
>>> +
>>> + vreg_bob: bob {
>>> + regulator-min-microvolt = <3300000>;
>>> + regulator-max-microvolt = <3624000>;
>>> + regulator-enable-ramp-delay = <500>;
>>> + regulator-ramp-delay = <0>;
>>> + };
>>> + };
>>> +};
>>> +
>>> +&sdc2_state_on {
>>
>> I'm not sure if letters go before numbers, that said this may not
>> necessarily be wrong.
>
> In my opinion, the numbers come before letters. But in this case it's
> even simpler, If I understand your concern correctly.
> It is 'sdc2...' vs 'sdhc...'.
Woah, right.. there's the reason I need my glasses..
Konrad
>
>>
>>
>>> + sd-cd {
>>> + pins = "gpio54";
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + };
>>> +};
>>> +
>>> +&sdc2_state_off {
>>> + sd-cd {
>>> + pins = "gpio54";
>>> + bias-disable;
>>> + drive-strength = <2>;
>>> + };
>>> +};
>>> +
>>> +&sdhc_1 {
>>> + status = "okay";
>>> + supports-cqe;
>>> +
>>> + vmmc-supply = <&vreg_l4b_2p95>;
>>> + vqmmc-supply = <&vreg_l8a_1p8>;
>>> +
>>> + mmc-ddr-1_8v;
>>> + mmc-hs400-1_8v;
>>> + mmc-hs400-enhanced-strobe;
>>> +};
>>> +
>>> +&sdhc_2 {
>>> + status = "okay";
>>> +
>>> + vmmc-supply = <&vreg_l5b_2p95>;
>>> + vqmmc-supply = <&vreg_l2b_2p95>;
>>> +
>>> + cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
>>> + no-sdio;
>>> + no-emmc;
>>> +};
>>> +
>>> +&tlmm {
>>> + gpio-reserved-ranges = <0 4>, <8 4>;
>>> +
>>> + sdc2_card_det_n: sd-card-det-n {
>>> + pins = "gpio54";
>>> + function = "gpio";
>>> + bias-pull-up;
>>> + };
>>
>> Unused now, I think
>
> Ugh. True.
>
>>
>>
>>> +};
>>> +
>>> +&usb2 {
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb2_dwc3 {
>>> + dr_mode = "host";
>>> +};
>>> +
>>> +&usb3 {
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb3_dwc3 {
>>> + dr_mode = "peripheral";
>>> + extcon = <&extcon_usb>;
>>> +};
>
>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v4 12/12] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board
2022-05-14 14:10 [PATCH v4 00/12] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
` (10 preceding siblings ...)
2022-05-14 14:10 ` [PATCH v4 11/12] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Dmitry Baryshkov
@ 2022-05-14 14:10 ` Dmitry Baryshkov
11 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2022-05-14 14:10 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio, Marijn Suijten
Cc: linux-arm-msm, devicetree
Add binding documentation for the Inforce IFC6560 board which uses
Snapdragon SDA660.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 129cdd246223..ac4ee0f874ea 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -41,6 +41,7 @@ description: |
sa8155p
sc7180
sc7280
+ sda660
sdm630
sdm632
sdm660
@@ -225,6 +226,11 @@ properties:
- google,senor
- const: qcom,sc7280
+ - items:
+ - enum:
+ - inforce,ifc6560
+ - const: qcom,sda660
+
- items:
- enum:
- fairphone,fp3
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread