* [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 for APQ8026 and MSM8226 @ 2021-05-13 15:01 Bartosz Dudziak 2021-05-13 15:01 ` [PATCH 2/2] cpuidle: qcom: Add SPM register data " Bartosz Dudziak 2021-05-18 1:10 ` [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 " Rob Herring 0 siblings, 2 replies; 5+ messages in thread From: Bartosz Dudziak @ 2021-05-13 15:01 UTC (permalink / raw) To: Rob Herring, Andy Gross, Bjorn Andersson, Rafael J. Wysocki, Daniel Lezcano, David Sterba, Jens Axboe, devicetree, linux-kernel, linux-arm-msm, linux-pm Cc: Bartosz Dudziak Add the dt-binding compatible in the SPM AVS Wrapper 2 (SAW2) for the APQ8026 and MSM8226 SoC platforms. Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> --- Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt index ae4afc6dcf..73e70e99e1 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt +++ b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt @@ -25,7 +25,9 @@ PROPERTIES "qcom,saw2" A more specific value could be one of: "qcom,apq8064-saw2-v1.1-cpu" + "qcom,msm8226-saw2-v2.1-cpu" "qcom,msm8974-saw2-v2.1-cpu" + "qcom,apq8026-saw2-v2.1-cpu" "qcom,apq8084-saw2-v2.1-cpu" - reg: -- 2.25.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] cpuidle: qcom: Add SPM register data for APQ8026 and MSM8226 2021-05-13 15:01 [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 for APQ8026 and MSM8226 Bartosz Dudziak @ 2021-05-13 15:01 ` Bartosz Dudziak 2021-05-13 18:24 ` Stephan Gerhold 2021-05-18 1:10 ` [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 " Rob Herring 1 sibling, 1 reply; 5+ messages in thread From: Bartosz Dudziak @ 2021-05-13 15:01 UTC (permalink / raw) To: Rob Herring, Andy Gross, Bjorn Andersson, Rafael J. Wysocki, Daniel Lezcano, David Sterba, Jens Axboe, devicetree, linux-kernel, linux-arm-msm, linux-pm Cc: Bartosz Dudziak Add APQ8026 and MSM8226 SoCs register data to SPM AVS Wrapper 2 (SAW2) power controller driver. Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> --- drivers/cpuidle/cpuidle-qcom-spm.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c index adf91a6e4d..9711a98d68 100644 --- a/drivers/cpuidle/cpuidle-qcom-spm.c +++ b/drivers/cpuidle/cpuidle-qcom-spm.c @@ -87,6 +87,18 @@ static const struct spm_reg_data spm_reg_8974_8084_cpu = { .start_index[PM_SLEEP_MODE_SPC] = 3, }; +/* SPM register data for 8026, 8226 */ +static const struct spm_reg_data spm_reg_8x26_cpu = { + .reg_offset = spm_reg_offset_v2_1, + .spm_cfg = 0x0, + .spm_dly = 0x3C102800, + .seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90, + 0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B, + 0x80, 0x10, 0x26, 0x30, 0x0F }, + .start_index[PM_SLEEP_MODE_STBY] = 0, + .start_index[PM_SLEEP_MODE_SPC] = 5, +}; + static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = { [SPM_REG_CFG] = 0x08, [SPM_REG_SPM_CTL] = 0x20, @@ -259,6 +271,10 @@ static struct spm_driver_data *spm_get_drv(struct platform_device *pdev, } static const struct of_device_id spm_match_table[] = { + { .compatible = "qcom,apq8026-saw2-v2.1-cpu", + .data = &spm_reg_8x26_cpu }, + { .compatible = "qcom,msm8226-saw2-v2.1-cpu", + .data = &spm_reg_8x26_cpu }, { .compatible = "qcom,msm8974-saw2-v2.1-cpu", .data = &spm_reg_8974_8084_cpu }, { .compatible = "qcom,apq8084-saw2-v2.1-cpu", -- 2.25.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] cpuidle: qcom: Add SPM register data for APQ8026 and MSM8226 2021-05-13 15:01 ` [PATCH 2/2] cpuidle: qcom: Add SPM register data " Bartosz Dudziak @ 2021-05-13 18:24 ` Stephan Gerhold 2021-05-25 18:58 ` Bartosz Dudziak 0 siblings, 1 reply; 5+ messages in thread From: Stephan Gerhold @ 2021-05-13 18:24 UTC (permalink / raw) To: Bartosz Dudziak Cc: Rob Herring, Andy Gross, Bjorn Andersson, Rafael J. Wysocki, Daniel Lezcano, David Sterba, Jens Axboe, devicetree, linux-kernel, linux-arm-msm, linux-pm Hi, On Thu, May 13, 2021 at 05:01:50PM +0200, Bartosz Dudziak wrote: > Add APQ8026 and MSM8226 SoCs register data to SPM AVS Wrapper 2 (SAW2) > power controller driver. > > Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> > --- > drivers/cpuidle/cpuidle-qcom-spm.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c > index adf91a6e4d..9711a98d68 100644 > --- a/drivers/cpuidle/cpuidle-qcom-spm.c > +++ b/drivers/cpuidle/cpuidle-qcom-spm.c > @@ -87,6 +87,18 @@ static const struct spm_reg_data spm_reg_8974_8084_cpu = { > .start_index[PM_SLEEP_MODE_SPC] = 3, > }; > > +/* SPM register data for 8026, 8226 */ > +static const struct spm_reg_data spm_reg_8x26_cpu = { > + .reg_offset = spm_reg_offset_v2_1, > + .spm_cfg = 0x0, > + .spm_dly = 0x3C102800, > + .seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90, > + 0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B, > + 0x80, 0x10, 0x26, 0x30, 0x0F }, > + .start_index[PM_SLEEP_MODE_STBY] = 0, > + .start_index[PM_SLEEP_MODE_SPC] = 5, > +}; > + > static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = { > [SPM_REG_CFG] = 0x08, > [SPM_REG_SPM_CTL] = 0x20, > @@ -259,6 +271,10 @@ static struct spm_driver_data *spm_get_drv(struct platform_device *pdev, > } > > static const struct of_device_id spm_match_table[] = { > + { .compatible = "qcom,apq8026-saw2-v2.1-cpu", > + .data = &spm_reg_8x26_cpu }, > + { .compatible = "qcom,msm8226-saw2-v2.1-cpu", > + .data = &spm_reg_8x26_cpu }, What is the reason for having a separate compatible for APQ8026? If the difference between MSM8226 and APQ8026 is similar to other qcom SoCs (just lack of modem), both will end up using the same device tree include anyway. Then it's easier to have both use qcom,msm8226-saw2-v2.1-cpu. Thanks, Stephan ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] cpuidle: qcom: Add SPM register data for APQ8026 and MSM8226 2021-05-13 18:24 ` Stephan Gerhold @ 2021-05-25 18:58 ` Bartosz Dudziak 0 siblings, 0 replies; 5+ messages in thread From: Bartosz Dudziak @ 2021-05-25 18:58 UTC (permalink / raw) To: Stephan Gerhold Cc: Rob Herring, Andy Gross, Bjorn Andersson, Rafael J. Wysocki, Daniel Lezcano, David Sterba, Jens Axboe, devicetree, linux-kernel, linux-arm-msm, linux-pm Hi, On Thu, May 13, 2021 at 08:24:30PM +0200, Stephan Gerhold wrote: > Hi, > > On Thu, May 13, 2021 at 05:01:50PM +0200, Bartosz Dudziak wrote: > > Add APQ8026 and MSM8226 SoCs register data to SPM AVS Wrapper 2 (SAW2) > > power controller driver. > > > > Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> > > --- > > drivers/cpuidle/cpuidle-qcom-spm.c | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c > > index adf91a6e4d..9711a98d68 100644 > > --- a/drivers/cpuidle/cpuidle-qcom-spm.c > > +++ b/drivers/cpuidle/cpuidle-qcom-spm.c > > @@ -87,6 +87,18 @@ static const struct spm_reg_data spm_reg_8974_8084_cpu = { > > .start_index[PM_SLEEP_MODE_SPC] = 3, > > }; > > > > +/* SPM register data for 8026, 8226 */ > > +static const struct spm_reg_data spm_reg_8x26_cpu = { > > + .reg_offset = spm_reg_offset_v2_1, > > + .spm_cfg = 0x0, > > + .spm_dly = 0x3C102800, > > + .seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90, > > + 0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B, > > + 0x80, 0x10, 0x26, 0x30, 0x0F }, > > + .start_index[PM_SLEEP_MODE_STBY] = 0, > > + .start_index[PM_SLEEP_MODE_SPC] = 5, > > +}; > > + > > static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = { > > [SPM_REG_CFG] = 0x08, > > [SPM_REG_SPM_CTL] = 0x20, > > @@ -259,6 +271,10 @@ static struct spm_driver_data *spm_get_drv(struct platform_device *pdev, > > } > > > > static const struct of_device_id spm_match_table[] = { > > + { .compatible = "qcom,apq8026-saw2-v2.1-cpu", > > + .data = &spm_reg_8x26_cpu }, > > + { .compatible = "qcom,msm8226-saw2-v2.1-cpu", > > + .data = &spm_reg_8x26_cpu }, > > What is the reason for having a separate compatible for APQ8026? > > If the difference between MSM8226 and APQ8026 is similar to other qcom > SoCs (just lack of modem), both will end up using the same device tree > include anyway. Then it's easier to have both use qcom,msm8226-saw2-v2.1-cpu. > > Thanks, > Stephan You are right. There is no reason to have a seperate APQ8026 compatible because it will share the MSM8226 device tree. I will send later a v2 patch with only "qcom,msm8226-saw2-v2.1-cpu" option. Thanks, Bartosz ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 for APQ8026 and MSM8226 2021-05-13 15:01 [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 for APQ8026 and MSM8226 Bartosz Dudziak 2021-05-13 15:01 ` [PATCH 2/2] cpuidle: qcom: Add SPM register data " Bartosz Dudziak @ 2021-05-18 1:10 ` Rob Herring 1 sibling, 0 replies; 5+ messages in thread From: Rob Herring @ 2021-05-18 1:10 UTC (permalink / raw) To: Bartosz Dudziak Cc: linux-pm, devicetree, Andy Gross, David Sterba, Daniel Lezcano, linux-kernel, Rob Herring, Bjorn Andersson, Rafael J. Wysocki, linux-arm-msm, Jens Axboe On Thu, 13 May 2021 17:01:49 +0200, Bartosz Dudziak wrote: > Add the dt-binding compatible in the SPM AVS Wrapper 2 (SAW2) for the > APQ8026 and MSM8226 SoC platforms. > > Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> > --- > Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-05-25 18:58 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-05-13 15:01 [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 for APQ8026 and MSM8226 Bartosz Dudziak 2021-05-13 15:01 ` [PATCH 2/2] cpuidle: qcom: Add SPM register data " Bartosz Dudziak 2021-05-13 18:24 ` Stephan Gerhold 2021-05-25 18:58 ` Bartosz Dudziak 2021-05-18 1:10 ` [PATCH 1/2] dt-bindings: arm: msm: Add SAW2 " Rob Herring
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).