From: Johan Hovold <johan@kernel.org>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: andersson@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org,
agross@kernel.org, konrad.dybcio@linaro.org,
mturquette@baylibre.com, sboyd@kernel.org, conor+dt@kernel.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/6] dt-bindings: clock: Add YAML schemas for LPASS AUDIOCC and reset on SC8280XP
Date: Fri, 26 May 2023 14:08:36 +0200 [thread overview]
Message-ID: <ZHChRDuLrnQ-GwEK@hovoldconsulting.com> (raw)
In-Reply-To: <20230525122930.17141-3-srinivas.kandagatla@linaro.org>
On Thu, May 25, 2023 at 01:29:26PM +0100, Srinivas Kandagatla wrote:
> The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset
> support when it is under the control of Q6DSP.
>
> Add support for those resets and adds IDs for clients to request the reset.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 11 +++++++++++
> include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 5 +++++
> 2 files changed, 16 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
> index 08a9ae60a365..0557e74d3c3b 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
> @@ -21,6 +21,7 @@ properties:
>
> compatible:
> enum:
> + - qcom,sc8280xp-lpassaudiocc
> - qcom,sc8280xp-lpasscc
>
> qcom,adsp-pil-mode:
> @@ -45,6 +46,16 @@ required:
> additionalProperties: false
>
> examples:
> + - |
> + #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h>
> + lpass_audiocc: clock-controller@32a9000 {
> + compatible = "qcom,sc8280xp-lpassaudiocc";
> + reg = <0x032a9000 0x1000>;
> + qcom,adsp-pil-mode;
> + #reset-cells = <1>;
> + #clock-cells = <1>;
Nit: #clock before #reset
> + };
> +
> - |
> #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h>
> lpasscc: clock-controller@33e0000 {
> diff --git a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h
> index df800ea2741c..d190d57fc81a 100644
> --- a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h
> +++ b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h
> @@ -6,6 +6,11 @@
> #ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H
> #define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H
>
> +/* LPASS AUDIO CC CSR */
> +#define LPASS_AUDIO_SWR_RX_CGCR 0
> +#define LPASS_AUDIO_SWR_WSA_CGCR 1
> +#define LPASS_AUDIO_SWR_WSA2_CGCR 2
> +
> /* LPASS TCSR */
> #define LPASS_AUDIO_SWR_TX_CGCR 0
Should you have different prefixes for the CSR and TCSR defines?
Looks good to me otherwise:
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
next prev parent reply other threads:[~2023-05-26 12:08 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-25 12:29 [PATCH v2 0/6] clk: qcom: sc8280xp: add lpasscc reset control Srinivas Kandagatla
2023-05-25 12:29 ` [PATCH v2 1/6] dt-bindings: clock: Add YAML schemas for LPASSCC and reset on SC8280XP Srinivas Kandagatla
2023-05-26 12:04 ` Johan Hovold
2023-06-02 13:17 ` Krzysztof Kozlowski
2023-05-25 12:29 ` [PATCH v2 2/6] dt-bindings: clock: Add YAML schemas for LPASS AUDIOCC " Srinivas Kandagatla
2023-05-26 12:08 ` Johan Hovold [this message]
[not found] ` <ebe8dc00-d937-240f-e9a5-e9049fd278ad@linaro.org>
2023-06-07 13:15 ` Srinivas Kandagatla
2023-05-25 12:29 ` [PATCH v2 3/6] clk: qcom: Add lpass clock controller driver for SC8280XP Srinivas Kandagatla
2023-05-26 12:12 ` Johan Hovold
2023-06-02 13:17 ` Krzysztof Kozlowski
[not found] ` <098883dd-f517-d541-de00-1a7fc0ada017@linaro.org>
2023-06-07 13:19 ` Srinivas Kandagatla
2023-05-25 12:29 ` [PATCH v2 4/6] clk: qcom: Add lpass audio " Srinivas Kandagatla
2023-05-26 12:14 ` Johan Hovold
2023-05-25 12:29 ` [PATCH v2 5/6] arm64: dts: qcom: sc8280xp: add resets for soundwire controllers Srinivas Kandagatla
2023-05-26 12:16 ` Johan Hovold
2023-06-02 13:18 ` Krzysztof Kozlowski
[not found] ` <542a67da-5870-dda0-3604-9367a438e51b@linaro.org>
2023-06-07 13:31 ` Srinivas Kandagatla
2023-05-25 12:29 ` [PATCH v2 6/6] arm64: defconfig: Enable sc828x0xp lpasscc clock controller Srinivas Kandagatla
2023-05-26 12:17 ` Johan Hovold
2023-06-02 13:18 ` Krzysztof Kozlowski
2023-06-02 13:39 ` Konrad Dybcio
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