[PATCH V2 0/3] can: flexcan: fixes for freeze mode

[PATCH V2 0/3] can: flexcan: fixes for freeze mode

[Joakim Zhang]

Fixes for freeze mode.

---
ChangLogs:
V1->V2:
	* make use of existing functions flexcan_chip_freeze().
	* add patch #1 and #3.

Joakim Zhang (3):
  can: flexcan: assert FRZ bit in flexcan_chip_freeze()
  can: flexcan: enable RX FIFO after FRZ/HALT valid
  can: flexcan: invoke flexcan_chip_freeze() to enter freeze mode

 drivers/net/can/flexcan.c | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

-- 
2.17.1

[PATCH V2 1/3] can: flexcan: assert FRZ bit in flexcan_chip_freeze()

[Joakim Zhang]

Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is
asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although
the reset value is 1b'1. This is a prepare patch, later patch will
invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze
mode acknowledge.

Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze")
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/net/can/flexcan.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 038fe1036df2..737e594cb12c 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -662,7 +662,7 @@ static int flexcan_chip_freeze(struct flexcan_priv *priv)
 	u32 reg;
 
 	reg = priv->read(&regs->mcr);
-	reg |= FLEXCAN_MCR_HALT;
+	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;
 	priv->write(reg, &regs->mcr);
 
 	while (timeout-- && !(priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))
-- 
2.17.1

[PATCH V2 2/3] can: flexcan: enable RX FIFO after FRZ/HALT valid

[Joakim Zhang]

RX FIFO enable failed could happen when do system reboot stress test:

[    0.303958] flexcan 5a8d0000.can: 5a8d0000.can supply xceiver not found, using dummy regulator
[    0.304281] flexcan 5a8d0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
[    0.314640] flexcan 5a8d0000.can: registering netdev failed
[    0.320728] flexcan 5a8e0000.can: 5a8e0000.can supply xceiver not found, using dummy regulator
[    0.320991] flexcan 5a8e0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
[    0.331360] flexcan 5a8e0000.can: registering netdev failed
[    0.337444] flexcan 5a8f0000.can: 5a8f0000.can supply xceiver not found, using dummy regulator
[    0.337716] flexcan 5a8f0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
[    0.348117] flexcan 5a8f0000.can: registering netdev failed

RX FIFO should be enabled after the FRZ/HALT are valid. But the current
code enable RX FIFO and FRZ/HALT at the same time.

Fixes: e955cead03117 ("CAN: Add Flexcan CAN controller driver")
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/net/can/flexcan.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 737e594cb12c..84c98ea7dd55 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -1825,10 +1825,13 @@ static int register_flexcandev(struct net_device *dev)
 	if (err)
 		goto out_chip_disable;
 
-	/* set freeze, halt and activate FIFO, restrict register access */
-	reg = priv->read(&regs->mcr);
-	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT |
-		FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
+	/* set freeze, halt */
+	err = flexcan_chip_freeze(priv);
+	if (err)
+		goto out_chip_disable;
+
+	/* activate FIFO, restrict register access */
+	reg |=  FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
 	priv->write(reg, &regs->mcr);
 
 	/* Currently we only support newer versions of this core
-- 
2.17.1

Re: [PATCH V2 2/3] can: flexcan: enable RX FIFO after FRZ/HALT valid

[Marc Kleine-Budde]

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On 03.02.2021 18:02:54, Joakim Zhang wrote:
> RX FIFO enable failed could happen when do system reboot stress test:
> 
> [    0.303958] flexcan 5a8d0000.can: 5a8d0000.can supply xceiver not found, using dummy regulator
> [    0.304281] flexcan 5a8d0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
> [    0.314640] flexcan 5a8d0000.can: registering netdev failed
> [    0.320728] flexcan 5a8e0000.can: 5a8e0000.can supply xceiver not found, using dummy regulator
> [    0.320991] flexcan 5a8e0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
> [    0.331360] flexcan 5a8e0000.can: registering netdev failed
> [    0.337444] flexcan 5a8f0000.can: 5a8f0000.can supply xceiver not found, using dummy regulator
> [    0.337716] flexcan 5a8f0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
> [    0.348117] flexcan 5a8f0000.can: registering netdev failed
> 
> RX FIFO should be enabled after the FRZ/HALT are valid. But the current
> code enable RX FIFO and FRZ/HALT at the same time.
> 
> Fixes: e955cead03117 ("CAN: Add Flexcan CAN controller driver")
> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
> ---
>  drivers/net/can/flexcan.c | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
> index 737e594cb12c..84c98ea7dd55 100644
> --- a/drivers/net/can/flexcan.c
> +++ b/drivers/net/can/flexcan.c
> @@ -1825,10 +1825,13 @@ static int register_flexcandev(struct net_device *dev)
>  	if (err)
>  		goto out_chip_disable;
>  
> -	/* set freeze, halt and activate FIFO, restrict register access */
> -	reg = priv->read(&regs->mcr);
> -	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT |
> -		FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
> +	/* set freeze, halt */
> +	err = flexcan_chip_freeze(priv);
> +	if (err)
> +		goto out_chip_disable;
> +
> +	/* activate FIFO, restrict register access */
> +	reg |=  FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
>  	priv->write(reg, &regs->mcr);

You are basically writing the contents of the CTRL register into the mcr
register, that's not good.

Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde           |
Embedded Linux                   | https://www.pengutronix.de  |
Vertretung West/Dortmund         | Phone: +49-231-2826-924     |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-5555 |

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RE: [PATCH V2 2/3] can: flexcan: enable RX FIFO after FRZ/HALT valid

[Joakim Zhang]

> -----Original Message-----
> From: Marc Kleine-Budde <mkl@pengutronix.de>
> Sent: 2021年2月18日 18:22
> To: Joakim Zhang <qiangqing.zhang@nxp.com>
> Cc: linux-can@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH V2 2/3] can: flexcan: enable RX FIFO after FRZ/HALT valid
> 
> On 03.02.2021 18:02:54, Joakim Zhang wrote:
> > RX FIFO enable failed could happen when do system reboot stress test:
> >
> > [    0.303958] flexcan 5a8d0000.can: 5a8d0000.can supply xceiver not
> found, using dummy regulator
> > [    0.304281] flexcan 5a8d0000.can (unnamed net_device) (uninitialized):
> Could not enable RX FIFO, unsupported core
> > [    0.314640] flexcan 5a8d0000.can: registering netdev failed
> > [    0.320728] flexcan 5a8e0000.can: 5a8e0000.can supply xceiver not
> found, using dummy regulator
> > [    0.320991] flexcan 5a8e0000.can (unnamed net_device) (uninitialized):
> Could not enable RX FIFO, unsupported core
> > [    0.331360] flexcan 5a8e0000.can: registering netdev failed
> > [    0.337444] flexcan 5a8f0000.can: 5a8f0000.can supply xceiver not found,
> using dummy regulator
> > [    0.337716] flexcan 5a8f0000.can (unnamed net_device) (uninitialized):
> Could not enable RX FIFO, unsupported core
> > [    0.348117] flexcan 5a8f0000.can: registering netdev failed
> >
> > RX FIFO should be enabled after the FRZ/HALT are valid. But the
> > current code enable RX FIFO and FRZ/HALT at the same time.
> >
> > Fixes: e955cead03117 ("CAN: Add Flexcan CAN controller driver")
> > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
> > ---
> >  drivers/net/can/flexcan.c | 11 +++++++----
> >  1 file changed, 7 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
> > index 737e594cb12c..84c98ea7dd55 100644
> > --- a/drivers/net/can/flexcan.c
> > +++ b/drivers/net/can/flexcan.c
> > @@ -1825,10 +1825,13 @@ static int register_flexcandev(struct net_device
> *dev)
> >  	if (err)
> >  		goto out_chip_disable;
> >
> > -	/* set freeze, halt and activate FIFO, restrict register access */
> > -	reg = priv->read(&regs->mcr);
> > -	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT |
> > -		FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
> > +	/* set freeze, halt */
> > +	err = flexcan_chip_freeze(priv);
> > +	if (err)
> > +		goto out_chip_disable;
> > +
> > +	/* activate FIFO, restrict register access */
> > +	reg |=  FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
> >  	priv->write(reg, &regs->mcr);
> 
> You are basically writing the contents of the CTRL register into the mcr register,
> that's not good.

Hi Marc, thanks for your careful review, it is a mistake, I will correct and re-send.

Best Regards,
Joakim Zhang
> Marc
> 
> --
> Pengutronix e.K.                 | Marc Kleine-Budde           |
> Embedded Linux                   | https://www.pengutronix.de  |
> Vertretung West/Dortmund         | Phone: +49-231-2826-924     |
> Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-5555 |

[PATCH V2 3/3] can: flexcan: invoke flexcan_chip_freeze() to enter freeze mode

[Joakim Zhang]

Invoke flexcan_chip_freeze() to enter freeze mode, since need poll
freeze mode acknowledge.

Fixes: e955cead03117 ("CAN: Add Flexcan CAN controller driver")
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/net/can/flexcan.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 84c98ea7dd55..c1f28a5497e3 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -1440,10 +1440,13 @@ static int flexcan_chip_start(struct net_device *dev)
 
 	flexcan_set_bittiming(dev);
 
+	/* set freeze, halt */
+	err = flexcan_chip_freeze(priv);
+	if (err)
+		goto out_chip_disable;
+
 	/* MCR
 	 *
-	 * enable freeze
-	 * halt now
 	 * only supervisor access
 	 * enable warning int
 	 * enable individual RX masking
@@ -1452,9 +1455,8 @@ static int flexcan_chip_start(struct net_device *dev)
 	 */
 	reg_mcr = priv->read(&regs->mcr);
 	reg_mcr &= ~FLEXCAN_MCR_MAXMB(0xff);
-	reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT | FLEXCAN_MCR_SUPV |
-		FLEXCAN_MCR_WRN_EN | FLEXCAN_MCR_IRMQ | FLEXCAN_MCR_IDAM_C |
-		FLEXCAN_MCR_MAXMB(priv->tx_mb_idx);
+	reg_mcr |= FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | FLEXCAN_MCR_IRMQ |
+		FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_MAXMB(priv->tx_mb_idx);
 
 	/* MCR
 	 *
-- 
2.17.1

RE: [PATCH V2 0/3] can: flexcan: fixes for freeze mode

[Joakim Zhang]

Gentle pinging...

Best Regards,
Joakim Zhang

> -----Original Message-----
> From: Joakim Zhang <qiangqing.zhang@nxp.com>
> Sent: 2021年2月3日 18:03
> To: mkl@pengutronix.de
> Cc: linux-can@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>
> Subject: [PATCH V2 0/3] can: flexcan: fixes for freeze mode
> 
> Fixes for freeze mode.
> 
> ---
> ChangLogs:
> V1->V2:
> 	* make use of existing functions flexcan_chip_freeze().
> 	* add patch #1 and #3.
> 
> Joakim Zhang (3):
>   can: flexcan: assert FRZ bit in flexcan_chip_freeze()
>   can: flexcan: enable RX FIFO after FRZ/HALT valid
>   can: flexcan: invoke flexcan_chip_freeze() to enter freeze mode
> 
>  drivers/net/can/flexcan.c | 25 +++++++++++++++----------
>  1 file changed, 15 insertions(+), 10 deletions(-)
> 
> --
> 2.17.1

Re: [PATCH V2 0/3] can: flexcan: fixes for freeze mode

[Marc Kleine-Budde]

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On 03.02.2021 18:02:52, Joakim Zhang wrote:
> Fixes for freeze mode.
> 
> ---
> ChangLogs:
> V1->V2:
> 	* make use of existing functions flexcan_chip_freeze().
> 	* add patch #1 and #3.
> 
> Joakim Zhang (3):
>   can: flexcan: assert FRZ bit in flexcan_chip_freeze()
>   can: flexcan: enable RX FIFO after FRZ/HALT valid
>   can: flexcan: invoke flexcan_chip_freeze() to enter freeze mode

Patch 2 is broken, the others look ok.

Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde           |
Embedded Linux                   | https://www.pengutronix.de  |
Vertretung West/Dortmund         | Phone: +49-231-2826-924     |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-5555 |

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