From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <broonie@kernel.org>,
<lgirdwood@gmail.com>, <perex@perex.cz>, <tiwai@suse.com>,
<digetx@gmail.com>, <mperttunen@nvidia.com>,
<gregkh@linuxfoundation.org>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>
Cc: <pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>,
<spujar@nvidia.com>, <josephl@nvidia.com>,
<daniel.lezcano@linaro.org>, <mmaddireddy@nvidia.com>,
<markz@nvidia.com>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v8 03/22] clk: tegra: Add Tegra OSC to clock lookup
Date: Mon, 13 Jan 2020 23:24:08 -0800
Message-ID: <1578986667-16041-4-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1578986667-16041-1-git-send-email-skomatineni@nvidia.com>
OSC is one of the parent for Tegra PMC clocks clk_out_1, clk_out_2,
and clk_out_3.
This patch adds Tegra OSC to clock lookup.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/clk/tegra/clk-id.h | 1 +
drivers/clk/tegra/clk-tegra-fixed.c | 5 +++++
drivers/clk/tegra/clk-tegra114.c | 2 ++
drivers/clk/tegra/clk-tegra124.c | 2 ++
drivers/clk/tegra/clk-tegra210.c | 2 ++
drivers/clk/tegra/clk-tegra30.c | 2 ++
6 files changed, 14 insertions(+)
diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h
index 17d8b252cd0a..17c13d1aa6bc 100644
--- a/drivers/clk/tegra/clk-id.h
+++ b/drivers/clk/tegra/clk-id.h
@@ -46,6 +46,7 @@ enum clk_id {
tegra_clk_clk_m,
tegra_clk_clk_m_div2,
tegra_clk_clk_m_div4,
+ tegra_clk_osc,
tegra_clk_osc_div2,
tegra_clk_osc_div4,
tegra_clk_clk_out_1,
diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c
index 990106391334..0dc2d5f5cfb5 100644
--- a/drivers/clk/tegra/clk-tegra-fixed.c
+++ b/drivers/clk/tegra/clk-tegra-fixed.c
@@ -46,7 +46,12 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
return -EINVAL;
}
+ dt_clk = tegra_lookup_dt_id(tegra_clk_osc, clks);
+ if (!dt_clk)
+ return 0;
+
osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
+ *dt_clk = osc;
/* osc_div2 */
dt_clk = tegra_lookup_dt_id(tegra_clk_osc_div2, clks);
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index d44cb8db0ef6..e3c68eca54b7 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -737,6 +737,7 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {
[tegra_clk_clk_m] = { .dt_id = TEGRA114_CLK_CLK_M, .present = true },
[tegra_clk_clk_m_div2] = { .dt_id = TEGRA114_CLK_CLK_M_DIV2, .present = true },
[tegra_clk_clk_m_div4] = { .dt_id = TEGRA114_CLK_CLK_M_DIV4, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA114_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA114_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA114_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA114_CLK_PLL_REF, .present = true },
@@ -819,6 +820,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "clk_32k", .dt_id = TEGRA114_CLK_CLK_32K },
{ .con_id = "clk_m_div2", .dt_id = TEGRA114_CLK_CLK_M_DIV2 },
{ .con_id = "clk_m_div4", .dt_id = TEGRA114_CLK_CLK_M_DIV4 },
+ { .con_id = "osc", .dt_id = TEGRA114_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA114_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA114_CLK_OSC_DIV4 },
{ .con_id = "pll_c", .dt_id = TEGRA114_CLK_PLL_C },
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 32f3dd1ccbad..ef0f928f0259 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -862,6 +862,7 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
[tegra_clk_clk_m] = { .dt_id = TEGRA124_CLK_CLK_M, .present = true },
[tegra_clk_clk_m_div2] = { .dt_id = TEGRA124_CLK_CLK_M_DIV2, .present = true },
[tegra_clk_clk_m_div4] = { .dt_id = TEGRA124_CLK_CLK_M_DIV4, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA124_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA124_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA124_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA124_CLK_PLL_REF, .present = true },
@@ -945,6 +946,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "clk_32k", .dt_id = TEGRA124_CLK_CLK_32K },
{ .con_id = "clk_m_div2", .dt_id = TEGRA124_CLK_CLK_M_DIV2 },
{ .con_id = "clk_m_div4", .dt_id = TEGRA124_CLK_CLK_M_DIV4 },
+ { .con_id = "osc", .dt_id = TEGRA124_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA124_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA124_CLK_OSC_DIV4 },
{ .con_id = "pll_c", .dt_id = TEGRA124_CLK_PLL_C },
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 899d8ca68c4f..958f5f6c894d 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -2373,6 +2373,7 @@ static struct tegra_clk tegra210_clks[tegra_clk_max] __initdata = {
[tegra_clk_clk_m] = { .dt_id = TEGRA210_CLK_CLK_M, .present = true },
[tegra_clk_clk_m_div2] = { .dt_id = TEGRA210_CLK_CLK_M_DIV2, .present = true },
[tegra_clk_clk_m_div4] = { .dt_id = TEGRA210_CLK_CLK_M_DIV4, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA210_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA210_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA210_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA210_CLK_PLL_REF, .present = true },
@@ -2501,6 +2502,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "clk_32k", .dt_id = TEGRA210_CLK_CLK_32K },
{ .con_id = "clk_m_div2", .dt_id = TEGRA210_CLK_CLK_M_DIV2 },
{ .con_id = "clk_m_div4", .dt_id = TEGRA210_CLK_CLK_M_DIV4 },
+ { .con_id = "osc", .dt_id = TEGRA210_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA210_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA210_CLK_OSC_DIV4 },
{ .con_id = "pll_c", .dt_id = TEGRA210_CLK_PLL_C },
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index c2da1f1d2b58..5f3484758123 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -583,6 +583,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "clk_32k", .dt_id = TEGRA30_CLK_CLK_32K },
{ .con_id = "clk_m_div2", .dt_id = TEGRA30_CLK_CLK_M_DIV2 },
{ .con_id = "clk_m_div4", .dt_id = TEGRA30_CLK_CLK_M_DIV4 },
+ { .con_id = "osc", .dt_id = TEGRA30_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA30_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA30_CLK_OSC_DIV4 },
{ .con_id = "cml0", .dt_id = TEGRA30_CLK_CML0 },
@@ -687,6 +688,7 @@ static struct tegra_clk tegra30_clks[tegra_clk_max] __initdata = {
[tegra_clk_clk_m] = { .dt_id = TEGRA30_CLK_CLK_M, .present = true },
[tegra_clk_clk_m_div2] = { .dt_id = TEGRA30_CLK_CLK_M_DIV2, .present = true },
[tegra_clk_clk_m_div4] = { .dt_id = TEGRA30_CLK_CLK_M_DIV4, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA30_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA30_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA30_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA30_CLK_PLL_REF, .present = true },
--
2.7.4
next prev parent reply index
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-14 7:24 [PATCH v8 00/22] Move PMC clocks into Tegra PMC driver Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 01/22] dt-bindings: clock: tegra: Add IDs for OSC clocks Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 02/22] clk: tegra: Add support for OSC_DIV fixed clocks Sowjanya Komatineni
2020-01-14 7:24 ` Sowjanya Komatineni [this message]
2020-01-14 7:24 ` [PATCH v8 04/22] clk: tegra: Fix Tegra PMC clock out parents Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 05/22] clk: tegra: Remove CLK_M_DIV fixed clocks Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 06/22] dt-bindings: tegra: Convert Tegra PMC bindings to YAML Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 07/22] dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 08/22] soc: tegra: Add Tegra PMC clocks registration into PMC driver Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 09/22] dt-bindings: soc: tegra-pmc: Add id for Tegra PMC 32KHz blink clock Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 10/22] soc: tegra: Add support for " Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 11/22] ASoC: tegra: Add fallback implementation for audio mclk Sowjanya Komatineni
2020-01-19 15:08 ` Dmitry Osipenko
2020-01-23 23:56 ` Dmitry Osipenko
2020-02-17 9:29 ` Thierry Reding
2020-02-17 9:40 ` Thierry Reding
2020-01-14 7:24 ` [PATCH v8 12/22] ASoC: tegra: Use device managed resource APIs to get the clock Sowjanya Komatineni
2020-02-17 9:48 ` Thierry Reding
2020-01-14 7:24 ` [PATCH v8 13/22] ARM: dts: tegra: Add clock-cells property to pmc Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 14/22] arm64: tegra: Add clock-cells property to Tegra PMC node Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 15/22] ARM: tegra: Update sound node clocks in device tree Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 16/22] arm64: tegra: smaug: Change clk_out_2 provider to pmc Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 17/22] ASoC: nau8825: change Tegra clk_out_2 provider to tegra_pmc Sowjanya Komatineni
2020-02-17 9:52 ` Thierry Reding
2020-01-14 7:24 ` [PATCH v8 18/22] ASoC: tegra: Add audio mclk parent configuration Sowjanya Komatineni
2020-02-17 9:53 ` Thierry Reding
2020-01-14 7:24 ` [PATCH v8 19/22] ASoC: tegra: Enable audio mclk during tegra_asoc_utils_init Sowjanya Komatineni
2020-01-19 15:14 ` Dmitry Osipenko
2020-01-20 4:10 ` Sameer Pujar
2020-01-20 15:32 ` Dmitry Osipenko
2020-02-17 9:53 ` Thierry Reding
2020-01-14 7:24 ` [PATCH v8 20/22] clk: tegra: Remove tegra_pmc_clk_init along with clk ids Sowjanya Komatineni
2020-02-17 9:55 ` Thierry Reding
2020-01-14 7:24 ` [PATCH v8 21/22] dt-bindings: clock: tegra: Remove pmc clock ids from clock dt-bindings Sowjanya Komatineni
2020-01-14 7:24 ` [PATCH v8 22/22] clk: tegra: Remove audio clocks configuration from clock driver Sowjanya Komatineni
2020-01-19 15:04 ` Dmitry Osipenko
2020-01-21 16:19 ` Sowjanya Komatineni
2020-01-21 16:57 ` Dmitry Osipenko
2020-01-24 4:34 ` Dmitry Osipenko
2020-01-24 8:50 ` Ben Dooks
2020-02-17 9:59 ` [PATCH v8 00/22] Move PMC clocks into Tegra PMC driver Thierry Reding
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