From: Thierry Reding <thierry.reding@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: jonathanh@nvidia.com, tglx@linutronix.de, jason@lakedaemon.net,
marc.zyngier@arm.com, linus.walleij@linaro.org, stefan@agner.ch,
mark.rutland@arm.com, pdeschrijver@nvidia.com,
pgaikwad@nvidia.com, sboyd@kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, jckuo@nvidia.com, josephl@nvidia.com,
talho@nvidia.com, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, mperttunen@nvidia.com,
spatra@nvidia.com, robh+dt@kernel.org, digetx@gmail.com,
devicetree@vger.kernel.org
Subject: Re: [PATCH V3 02/17] pinctrl: tegra: add suspend and resume support
Date: Tue, 18 Jun 2019 13:31:09 +0200 [thread overview]
Message-ID: <20190618113109.GE28892@ulmo> (raw)
In-Reply-To: <1560843991-24123-3-git-send-email-skomatineni@nvidia.com>
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On Tue, Jun 18, 2019 at 12:46:16AM -0700, Sowjanya Komatineni wrote:
> This patch adds suspend and resume support for Tegra pinctrl driver
> and registers them to syscore so the pinmux settings are restored
> before the devices resume.
This no longer uses syscore ops, so you need to reflect that in the
commit message.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> drivers/pinctrl/tegra/pinctrl-tegra.c | 62 ++++++++++++++++++++++++++++++++
> drivers/pinctrl/tegra/pinctrl-tegra.h | 5 +++
> drivers/pinctrl/tegra/pinctrl-tegra114.c | 1 +
> drivers/pinctrl/tegra/pinctrl-tegra124.c | 1 +
> drivers/pinctrl/tegra/pinctrl-tegra20.c | 1 +
> drivers/pinctrl/tegra/pinctrl-tegra210.c | 13 +++++++
> drivers/pinctrl/tegra/pinctrl-tegra30.c | 1 +
> 7 files changed, 84 insertions(+)
>
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
> index 34596b246578..ceced30d8bd1 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
> @@ -20,11 +20,16 @@
> #include <linux/pinctrl/pinmux.h>
> #include <linux/pinctrl/pinconf.h>
> #include <linux/slab.h>
> +#include <linux/syscore_ops.h>
No longer needed.
>
> #include "../core.h"
> #include "../pinctrl-utils.h"
> #include "pinctrl-tegra.h"
>
> +#define EMMC2_PAD_CFGPADCTRL_0 0x1c8
> +#define EMMC4_PAD_CFGPADCTRL_0 0x1e0
> +#define EMMC_DPD_PARKING (0x1fff << 14)
> +
> static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg)
> {
> return readl(pmx->regs[bank] + reg);
> @@ -619,6 +624,48 @@ static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx)
> pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
> }
> }
> +
> + if (pmx->soc->has_park_padcfg) {
> + val = pmx_readl(pmx, 0, EMMC2_PAD_CFGPADCTRL_0);
> + val &= ~EMMC_DPD_PARKING;
> + pmx_writel(pmx, val, 0, EMMC2_PAD_CFGPADCTRL_0);
> +
> + val = pmx_readl(pmx, 0, EMMC4_PAD_CFGPADCTRL_0);
> + val &= ~EMMC_DPD_PARKING;
> + pmx_writel(pmx, val, 0, EMMC4_PAD_CFGPADCTRL_0);
> + }
> +}
> +
> +int __maybe_unused tegra_pinctrl_suspend(struct device *dev)
> +{
> + struct tegra_pmx *pmx = dev_get_drvdata(dev);
> + u32 *backup_regs = pmx->backup_regs;
> + u32 *regs;
> + int i, j;
Can be unsigned int.
> +
> + for (i = 0; i < pmx->nbanks; i++) {
> + regs = pmx->regs[i];
> + for (j = 0; j < pmx->reg_bank_size[i] / 4; j++)
> + *backup_regs++ = readl(regs++);
> + }
> +
> + return pinctrl_force_sleep(pmx->pctl);
> +}
> +
> +int __maybe_unused tegra_pinctrl_resume(struct device *dev)
> +{
> + struct tegra_pmx *pmx = dev_get_drvdata(dev);
> + u32 *backup_regs = pmx->backup_regs;
> + u32 *regs;
> + int i, j;
unsigned
> +
> + for (i = 0; i < pmx->nbanks; i++) {
> + regs = pmx->regs[i];
> + for (j = 0; j < pmx->reg_bank_size[i] / 4; j++)
> + writel(*backup_regs++, regs++);
> + }
> +
> + return 0;
> }
>
> static bool gpio_node_has_range(const char *compatible)
> @@ -645,6 +692,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
> int i;
> const char **group_pins;
> int fn, gn, gfn;
> + unsigned long backup_regs_size = 0;
>
> pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
> if (!pmx)
> @@ -697,6 +745,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
> res = platform_get_resource(pdev, IORESOURCE_MEM, i);
> if (!res)
> break;
> + backup_regs_size += resource_size(res);
> }
> pmx->nbanks = i;
>
> @@ -705,11 +754,24 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
> if (!pmx->regs)
> return -ENOMEM;
>
> + pmx->reg_bank_size = devm_kcalloc(&pdev->dev, pmx->nbanks,
> + sizeof(*pmx->reg_bank_size),
> + GFP_KERNEL);
> + if (!pmx->reg_bank_size)
> + return -ENOMEM;
> +
> + pmx->backup_regs = devm_kzalloc(&pdev->dev, backup_regs_size,
> + GFP_KERNEL);
> + if (!pmx->backup_regs)
> + return -ENOMEM;
> +
> for (i = 0; i < pmx->nbanks; i++) {
> res = platform_get_resource(pdev, IORESOURCE_MEM, i);
> pmx->regs[i] = devm_ioremap_resource(&pdev->dev, res);
> if (IS_ERR(pmx->regs[i]))
> return PTR_ERR(pmx->regs[i]);
> +
> + pmx->reg_bank_size[i] = resource_size(res);
> }
>
> pmx->pctl = devm_pinctrl_register(&pdev->dev, &tegra_pinctrl_desc, pmx);
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h
> index 287702660783..d63e472ee0e1 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra.h
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h
> @@ -17,6 +17,8 @@ struct tegra_pmx {
>
> int nbanks;
> void __iomem **regs;
> + size_t *reg_bank_size;
> + u32 *backup_regs;
> };
>
> enum tegra_pinconf_param {
> @@ -191,8 +193,11 @@ struct tegra_pinctrl_soc_data {
> bool hsm_in_mux;
> bool schmitt_in_mux;
> bool drvtype_in_mux;
> + bool has_park_padcfg;
> };
>
> int tegra_pinctrl_probe(struct platform_device *pdev,
> const struct tegra_pinctrl_soc_data *soc_data);
> +int __maybe_unused tegra_pinctrl_suspend(struct device *dev);
> +int __maybe_unused tegra_pinctrl_resume(struct device *dev);
> #endif
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra114.c b/drivers/pinctrl/tegra/pinctrl-tegra114.c
> index 762151f17a88..06ea8164df9d 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra114.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra114.c
> @@ -1841,6 +1841,7 @@ static const struct tegra_pinctrl_soc_data tegra114_pinctrl = {
> .hsm_in_mux = false,
> .schmitt_in_mux = false,
> .drvtype_in_mux = false,
> + .has_park_padcfg = false,
> };
>
> static int tegra114_pinctrl_probe(struct platform_device *pdev)
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra124.c b/drivers/pinctrl/tegra/pinctrl-tegra124.c
> index 930c43758c92..abc8fe92d154 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra124.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra124.c
> @@ -2053,6 +2053,7 @@ static const struct tegra_pinctrl_soc_data tegra124_pinctrl = {
> .hsm_in_mux = false,
> .schmitt_in_mux = false,
> .drvtype_in_mux = false,
> + .has_park_padcfg = false,
> };
>
> static int tegra124_pinctrl_probe(struct platform_device *pdev)
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c
> index 4b7837e38fb5..993b82cbfba7 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra20.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c
> @@ -2223,6 +2223,7 @@ static const struct tegra_pinctrl_soc_data tegra20_pinctrl = {
> .hsm_in_mux = false,
> .schmitt_in_mux = false,
> .drvtype_in_mux = false,
> + .has_park_padcfg = false,
> };
>
> static const char *cdev1_parents[] = {
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c b/drivers/pinctrl/tegra/pinctrl-tegra210.c
> index 0b56ad5c9c1c..10e8a2ec8094 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra210.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra210.c
> @@ -1555,6 +1555,7 @@ static const struct tegra_pinctrl_soc_data tegra210_pinctrl = {
> .hsm_in_mux = true,
> .schmitt_in_mux = true,
> .drvtype_in_mux = true,
> + .has_park_padcfg = true,
> };
>
> static int tegra210_pinctrl_probe(struct platform_device *pdev)
> @@ -1562,6 +1563,17 @@ static int tegra210_pinctrl_probe(struct platform_device *pdev)
> return tegra_pinctrl_probe(pdev, &tegra210_pinctrl);
> }
>
> +#ifdef CONFIG_PM_SLEEP
> +static const struct dev_pm_ops tegra_pinctrl_pm = {
> + .suspend = &tegra_pinctrl_suspend,
> + .resume = &tegra_pinctrl_resume
> +};
> +
> +#define TEGRA_PINCTRL_PM (&tegra_pinctrl_pm)
> +#else
> +#define TEGRA_PINCTRL_PM NULL
> +#endif
I think we can simplify this by just dropping the #ifdef. We don't allow
!PM on Tegra anymore and suspend/resume is something that most users
will want to enable. There's very little gain in making the dev_pm_ops
conditional, and keeping them around unconditionally make it simple.
> +
> static const struct of_device_id tegra210_pinctrl_of_match[] = {
> { .compatible = "nvidia,tegra210-pinmux", },
> { },
> @@ -1571,6 +1583,7 @@ static struct platform_driver tegra210_pinctrl_driver = {
> .driver = {
> .name = "tegra210-pinctrl",
> .of_match_table = tegra210_pinctrl_of_match,
> + .pm = TEGRA_PINCTRL_PM,
Please use a single space around '='. No need for arbitrary padding.
Thierry Reding
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next prev parent reply other threads:[~2019-06-18 11:31 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-18 7:46 [PATCH V3 00/17] SC7 entry and exit support for Tegra210 Sowjanya Komatineni
2019-06-18 7:46 ` [PATCH V3 01/17] irqchip: tegra: do not disable COP IRQ during suspend Sowjanya Komatineni
2019-06-18 9:19 ` Marc Zyngier
2019-06-18 10:58 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 02/17] pinctrl: tegra: add suspend and resume support Sowjanya Komatineni
2019-06-18 9:22 ` Dmitry Osipenko
2019-06-18 9:30 ` Dmitry Osipenko
2019-06-18 15:41 ` Stephen Warren
2019-06-18 16:50 ` Sowjanya Komatineni
2019-06-18 17:34 ` Sowjanya Komatineni
2019-06-18 20:00 ` Dmitry Osipenko
2019-06-18 20:04 ` Sowjanya Komatineni
2019-06-19 8:31 ` Thierry Reding
2019-06-19 8:40 ` Dmitry Osipenko
2019-06-19 8:33 ` Thierry Reding
2019-06-19 8:57 ` Thierry Reding
2019-06-18 11:31 ` Thierry Reding [this message]
2019-06-18 7:46 ` [PATCH V3 03/17] gpio: tegra: use resume_noirq for tegra gpio resume Sowjanya Komatineni
2019-06-18 11:39 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 04/17] clk: tegra: save and restore divider rate Sowjanya Komatineni
2019-06-18 11:40 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 05/17] clk: tegra: pllout: save and restore pllout context Sowjanya Komatineni
2019-06-18 11:41 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 06/17] clk: tegra: pll: save and restore pll context Sowjanya Komatineni
2019-06-18 11:45 ` Thierry Reding
2019-06-25 20:46 ` Stephen Boyd
2019-06-25 21:22 ` Sowjanya Komatineni
2019-06-18 7:46 ` [PATCH V3 07/17] clk: tegra: save and restore CPU and System clocks context Sowjanya Komatineni
2019-06-18 11:48 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 08/17] clk: tegra: add support for peripheral clock suspend and resume Sowjanya Komatineni
2019-06-18 11:50 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 09/17] clk: tegra: support for saving and restoring OSC clock context Sowjanya Komatineni
2019-06-18 11:51 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 10/17] clk: tegra: add suspend resume support for DFLL Sowjanya Komatineni
2019-06-18 11:59 ` Thierry Reding
2019-06-18 7:46 ` [PATCH V3 11/17] clk: tegra210: support for Tegra210 clocks suspend and resume Sowjanya Komatineni
2019-06-18 12:16 ` Thierry Reding
2019-06-18 17:58 ` Sowjanya Komatineni
2019-06-19 8:15 ` Thierry Reding
2019-06-21 20:44 ` Sowjanya Komatineni
2019-06-18 7:46 ` [PATCH V3 12/17] soc/tegra: pmc: allow support for more tegra wake Sowjanya Komatineni
2019-06-18 9:26 ` Marc Zyngier
2019-06-18 7:46 ` [PATCH V3 13/17] soc/tegra: pmc: add pmc wake support for tegra210 Sowjanya Komatineni
2019-06-18 7:46 ` [PATCH V3 14/17] arm64: tegra: enable wake from deep sleep on RTC alarm Sowjanya Komatineni
2019-06-18 7:46 ` [PATCH V3 15/17] soc/tegra: pmc: configure core power request polarity Sowjanya Komatineni
2019-06-18 7:46 ` [PATCH V3 16/17] soc/tegra: pmc: configure deep sleep control settings Sowjanya Komatineni
2019-06-18 7:46 ` [PATCH V3 17/17] arm64: dts: tegra210-p2180: Jetson TX1 SC7 timings Sowjanya Komatineni
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