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From: Maxime Ripard <maxime@cerno.tech>
To: Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org
Cc: Alexander Stein <alexander.stein@ew.tq-group.com>,
	Yassine Oudjana <y.oudjana@protonmail.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Naresh Kamboju <naresh.kamboju@linaro.org>,
	Tony Lindgren <tony@atomide.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v7 13/28] clk: tests: Add tests for mux with multiple parents
Date: Fri, 15 Jul 2022 17:59:59 +0200	[thread overview]
Message-ID: <20220715160014.2623107-14-maxime@cerno.tech> (raw)
In-Reply-To: <20220715160014.2623107-1-maxime@cerno.tech>

We'll need to test a few corner cases that occur when we have a mux
clock whose default parent is missing.

For now, let's create the context structure and the trivial ops, along
with a test suite that just tests trivial things for now, without
considering the orphan case.

Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mp
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> # exynos4210, meson g12b
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/clk/clk_test.c | 121 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 121 insertions(+)

diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c
index 06c9220873bb..1ccafd4fabff 100644
--- a/drivers/clk/clk_test.c
+++ b/drivers/clk/clk_test.c
@@ -108,6 +108,39 @@ static const struct clk_ops clk_dummy_single_parent_ops = {
 	.get_parent = clk_dummy_single_get_parent,
 };
 
+struct clk_multiple_parent_ctx {
+	struct clk_dummy_context parents_ctx[2];
+	struct clk_hw hw;
+	u8 current_parent;
+};
+
+static int clk_multiple_parents_mux_set_parent(struct clk_hw *hw, u8 index)
+{
+	struct clk_multiple_parent_ctx *ctx =
+		container_of(hw, struct clk_multiple_parent_ctx, hw);
+
+	if (index >= clk_hw_get_num_parents(hw))
+		return -EINVAL;
+
+	ctx->current_parent = index;
+
+	return 0;
+}
+
+static u8 clk_multiple_parents_mux_get_parent(struct clk_hw *hw)
+{
+	struct clk_multiple_parent_ctx *ctx =
+		container_of(hw, struct clk_multiple_parent_ctx, hw);
+
+	return ctx->current_parent;
+}
+
+static const struct clk_ops clk_multiple_parents_mux_ops = {
+	.get_parent = clk_multiple_parents_mux_get_parent,
+	.set_parent = clk_multiple_parents_mux_set_parent,
+	.determine_rate = __clk_mux_determine_rate_closest,
+};
+
 static int clk_test_init_with_ops(struct kunit *test, const struct clk_ops *ops)
 {
 	struct clk_dummy_context *ctx;
@@ -360,6 +393,93 @@ static struct kunit_suite clk_uncached_test_suite = {
 	.test_cases = clk_uncached_test_cases,
 };
 
+static int
+clk_multiple_parents_mux_test_init(struct kunit *test)
+{
+	struct clk_multiple_parent_ctx *ctx;
+	const char *parents[2] = { "parent-0", "parent-1"};
+	int ret;
+
+	ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
+	if (!ctx)
+		return -ENOMEM;
+	test->priv = ctx;
+
+	ctx->parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0",
+							    &clk_dummy_rate_ops,
+							    0);
+	ctx->parents_ctx[0].rate = DUMMY_CLOCK_RATE_1;
+	ret = clk_hw_register(NULL, &ctx->parents_ctx[0].hw);
+	if (ret)
+		return ret;
+
+	ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1",
+							    &clk_dummy_rate_ops,
+							    0);
+	ctx->parents_ctx[1].rate = DUMMY_CLOCK_RATE_2;
+	ret = clk_hw_register(NULL, &ctx->parents_ctx[1].hw);
+	if (ret)
+		return ret;
+
+	ctx->current_parent = 0;
+	ctx->hw.init = CLK_HW_INIT_PARENTS("test-mux", parents,
+					   &clk_multiple_parents_mux_ops,
+					   CLK_SET_RATE_PARENT);
+	ret = clk_hw_register(NULL, &ctx->hw);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static void
+clk_multiple_parents_mux_test_exit(struct kunit *test)
+{
+	struct clk_multiple_parent_ctx *ctx = test->priv;
+
+	clk_hw_unregister(&ctx->hw);
+	clk_hw_unregister(&ctx->parents_ctx[0].hw);
+	clk_hw_unregister(&ctx->parents_ctx[1].hw);
+}
+
+/*
+ * Test that for a clock with multiple parents, clk_get_parent()
+ * actually returns the current one.
+ */
+static void
+clk_test_multiple_parents_mux_get_parent(struct kunit *test)
+{
+	struct clk_multiple_parent_ctx *ctx = test->priv;
+	struct clk_hw *hw = &ctx->hw;
+	struct clk *clk = clk_hw_get_clk(hw, NULL);
+	struct clk *parent = clk_hw_get_clk(&ctx->parents_ctx[0].hw, NULL);
+
+	KUNIT_EXPECT_TRUE(test, clk_is_match(clk_get_parent(clk), parent));
+
+	clk_put(parent);
+	clk_put(clk);
+}
+
+static struct kunit_case clk_multiple_parents_mux_test_cases[] = {
+	KUNIT_CASE(clk_test_multiple_parents_mux_get_parent),
+	{}
+};
+
+/*
+ * Test suite for a basic mux clock with two parents, with
+ * CLK_SET_RATE_PARENT on the child.
+ *
+ * These tests exercise the consumer API and check that the state of the
+ * child and parents are sane and consistent.
+ */
+static struct kunit_suite
+clk_multiple_parents_mux_test_suite = {
+	.name = "clk-multiple-parents-mux-test",
+	.init = clk_multiple_parents_mux_test_init,
+	.exit = clk_multiple_parents_mux_test_exit,
+	.test_cases = clk_multiple_parents_mux_test_cases,
+};
+
 struct clk_single_parent_ctx {
 	struct clk_dummy_context parent_ctx;
 	struct clk_hw hw;
@@ -1339,6 +1459,7 @@ static struct kunit_suite clk_range_minimize_test_suite = {
 
 kunit_test_suites(
 	&clk_test_suite,
+	&clk_multiple_parents_mux_test_suite,
 	&clk_orphan_transparent_single_parent_test_suite,
 	&clk_range_test_suite,
 	&clk_range_maximize_test_suite,
-- 
2.36.1


  parent reply	other threads:[~2022-07-15 16:01 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-15 15:59 [PATCH v7 00/28] clk: More clock rate fixes and tests Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 01/28] clk: bcm: rpi: Create helper to retrieve private data Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 02/28] clk: bcm: rpi: Add a function to retrieve the maximum Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 03/28] drm/vc4: hdmi: Rework hdmi_enable_4kp60 detection Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 04/28] clk: test: Switch to clk_hw_get_clk Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 05/28] clk: Drop the rate range on clk_put() Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 06/28] clk: Skip clamping when rounding if there's no boundaries Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 07/28] clk: Mention that .recalc_rate can return 0 on error Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 08/28] clk: Clarify clk_get_rate() expectations Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 09/28] clk: tests: Add test suites description Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 10/28] clk: tests: Add reference to the orphan mux bug report Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 11/28] clk: tests: Add tests for uncached clock Maxime Ripard
2022-07-15 15:59 ` [PATCH v7 12/28] clk: tests: Add tests for single parent mux Maxime Ripard
2022-07-15 15:59 ` Maxime Ripard [this message]
2022-07-15 16:00 ` [PATCH v7 14/28] clk: tests: Add some tests for orphan with multiple parents Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 15/28] clk: Take into account uncached clocks in clk_set_rate_range() Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 16/28] clk: Set req_rate on reparenting Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 17/28] clk: Change clk_core_init_rate_req prototype Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 18/28] clk: Move clk_core_init_rate_req() from clk_core_round_rate_nolock() to its caller Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 19/28] clk: Introduce clk_hw_init_rate_request() Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 20/28] clk: Add our request boundaries in clk_core_init_rate_req Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 21/28] clk: Switch from __clk_determine_rate to clk_core_round_rate_nolock Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 22/28] clk: Introduce clk_core_has_parent() Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 23/28] clk: Constify clk_has_parent() Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 24/28] clk: Stop forwarding clk_rate_requests to the parent Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 25/28] clk: Zero the clk_rate_request structure Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 26/28] clk: Introduce the clk_hw_get_rate_range function Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 27/28] clk: qcom: clk-rcg2: Take clock boundaries into consideration for gfx3d Maxime Ripard
2022-07-15 16:00 ` [PATCH v7 28/28] clk: tests: Add missing test case for ranges Maxime Ripard

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