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* [PATCH] clk: ti: omap5: Add missing AESS clock
@ 2020-01-14 15:06 Tony Lindgren
  2020-01-15  8:56 ` Peter Ujfalusi
  0 siblings, 1 reply; 3+ messages in thread
From: Tony Lindgren @ 2020-01-14 15:06 UTC (permalink / raw)
  To: Michael Turquette, Stephen Boyd, Tero Kristo
  Cc: devicetree, linux-clk, linux-omap, H . Nikolaus Schaller,
	Matthijs van Duin, Peter Ujfalusi

Looks like we're missing AESS clock for omap5. This is similar to what
omap4 has.

Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 drivers/clk/ti/clk-54xx.c         | 15 +++++++++++++++
 include/dt-bindings/clock/omap5.h |  1 +
 2 files changed, 16 insertions(+)

diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -35,6 +35,20 @@ static const struct omap_clkctrl_reg_data omap5_dsp_clkctrl_regs[] __initconst =
 	{ 0 },
 };
 
+static const char * const omap5_aess_fclk_parents[] __initconst = {
+	"abe_clk",
+	NULL,
+};
+
+static const struct omap_clkctrl_div_data omap5_aess_fclk_data __initconst = {
+	.max_div = 2,
+};
+
+static const struct omap_clkctrl_bit_data omap5_aess_bit_data[] __initconst = {
+	{ 24, TI_CLK_DIVIDER, omap5_aess_fclk_parents, &omap5_aess_fclk_data },
+	{ 0 },
+};
+
 static const char * const omap5_dmic_gfclk_parents[] __initconst = {
 	"abe_cm:clk:0018:26",
 	"pad_clks_ck",
@@ -122,6 +136,7 @@ static const struct omap_clkctrl_bit_data omap5_timer8_bit_data[] __initconst =
 
 static const struct omap_clkctrl_reg_data omap5_abe_clkctrl_regs[] __initconst = {
 	{ OMAP5_L4_ABE_CLKCTRL, NULL, 0, "abe_iclk" },
+	{ OMAP5_AESS_CLKCTRL, omap5_aess_bit_data, CLKF_SW_SUP, "abe_cm:clk:0008:24" },
 	{ OMAP5_MCPDM_CLKCTRL, NULL, CLKF_SW_SUP, "pad_clks_ck" },
 	{ OMAP5_DMIC_CLKCTRL, omap5_dmic_bit_data, CLKF_SW_SUP, "abe_cm:clk:0018:24" },
 	{ OMAP5_MCBSP1_CLKCTRL, omap5_mcbsp1_bit_data, CLKF_SW_SUP, "abe_cm:clk:0028:24" },
diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h
--- a/include/dt-bindings/clock/omap5.h
+++ b/include/dt-bindings/clock/omap5.h
@@ -16,6 +16,7 @@
 
 /* abe clocks */
 #define OMAP5_L4_ABE_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x20)
+#define OMAP5_AESS_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x28)
 #define OMAP5_MCPDM_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x30)
 #define OMAP5_DMIC_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x38)
 #define OMAP5_MCBSP1_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x48)
-- 
2.24.1

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] clk: ti: omap5: Add missing AESS clock
  2020-01-14 15:06 [PATCH] clk: ti: omap5: Add missing AESS clock Tony Lindgren
@ 2020-01-15  8:56 ` Peter Ujfalusi
  2020-01-21  7:33   ` Tero Kristo
  0 siblings, 1 reply; 3+ messages in thread
From: Peter Ujfalusi @ 2020-01-15  8:56 UTC (permalink / raw)
  To: Tony Lindgren, Michael Turquette, Stephen Boyd, Tero Kristo
  Cc: devicetree, linux-clk, linux-omap, H . Nikolaus Schaller,
	Matthijs van Duin



On 14/01/2020 17.06, Tony Lindgren wrote:
> Looks like we're missing AESS clock for omap5. This is similar to what
> omap4 has.

Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>

> Cc: H. Nikolaus Schaller <hns@goldelico.com>
> Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
>  drivers/clk/ti/clk-54xx.c         | 15 +++++++++++++++
>  include/dt-bindings/clock/omap5.h |  1 +
>  2 files changed, 16 insertions(+)
> 
> diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
> --- a/drivers/clk/ti/clk-54xx.c
> +++ b/drivers/clk/ti/clk-54xx.c
> @@ -35,6 +35,20 @@ static const struct omap_clkctrl_reg_data omap5_dsp_clkctrl_regs[] __initconst =
>  	{ 0 },
>  };
>  
> +static const char * const omap5_aess_fclk_parents[] __initconst = {
> +	"abe_clk",
> +	NULL,
> +};
> +
> +static const struct omap_clkctrl_div_data omap5_aess_fclk_data __initconst = {
> +	.max_div = 2,
> +};
> +
> +static const struct omap_clkctrl_bit_data omap5_aess_bit_data[] __initconst = {
> +	{ 24, TI_CLK_DIVIDER, omap5_aess_fclk_parents, &omap5_aess_fclk_data },
> +	{ 0 },
> +};
> +
>  static const char * const omap5_dmic_gfclk_parents[] __initconst = {
>  	"abe_cm:clk:0018:26",
>  	"pad_clks_ck",
> @@ -122,6 +136,7 @@ static const struct omap_clkctrl_bit_data omap5_timer8_bit_data[] __initconst =
>  
>  static const struct omap_clkctrl_reg_data omap5_abe_clkctrl_regs[] __initconst = {
>  	{ OMAP5_L4_ABE_CLKCTRL, NULL, 0, "abe_iclk" },
> +	{ OMAP5_AESS_CLKCTRL, omap5_aess_bit_data, CLKF_SW_SUP, "abe_cm:clk:0008:24" },
>  	{ OMAP5_MCPDM_CLKCTRL, NULL, CLKF_SW_SUP, "pad_clks_ck" },
>  	{ OMAP5_DMIC_CLKCTRL, omap5_dmic_bit_data, CLKF_SW_SUP, "abe_cm:clk:0018:24" },
>  	{ OMAP5_MCBSP1_CLKCTRL, omap5_mcbsp1_bit_data, CLKF_SW_SUP, "abe_cm:clk:0028:24" },
> diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h
> --- a/include/dt-bindings/clock/omap5.h
> +++ b/include/dt-bindings/clock/omap5.h
> @@ -16,6 +16,7 @@
>  
>  /* abe clocks */
>  #define OMAP5_L4_ABE_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x20)
> +#define OMAP5_AESS_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x28)
>  #define OMAP5_MCPDM_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x30)
>  #define OMAP5_DMIC_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x38)
>  #define OMAP5_MCBSP1_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x48)
> 

- Péter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] clk: ti: omap5: Add missing AESS clock
  2020-01-15  8:56 ` Peter Ujfalusi
@ 2020-01-21  7:33   ` Tero Kristo
  0 siblings, 0 replies; 3+ messages in thread
From: Tero Kristo @ 2020-01-21  7:33 UTC (permalink / raw)
  To: Peter Ujfalusi, Tony Lindgren, Michael Turquette, Stephen Boyd
  Cc: devicetree, linux-clk, linux-omap, H . Nikolaus Schaller,
	Matthijs van Duin

On 15/01/2020 10:56, Peter Ujfalusi wrote:
> 
> 
> On 14/01/2020 17.06, Tony Lindgren wrote:
>> Looks like we're missing AESS clock for omap5. This is similar to what
>> omap4 has.
> 
> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>

Queued up for 5.6, thanks.

-Tero

> 
>> Cc: H. Nikolaus Schaller <hns@goldelico.com>
>> Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
>> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
>> Signed-off-by: Tony Lindgren <tony@atomide.com>
>> ---
>>   drivers/clk/ti/clk-54xx.c         | 15 +++++++++++++++
>>   include/dt-bindings/clock/omap5.h |  1 +
>>   2 files changed, 16 insertions(+)
>>
>> diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
>> --- a/drivers/clk/ti/clk-54xx.c
>> +++ b/drivers/clk/ti/clk-54xx.c
>> @@ -35,6 +35,20 @@ static const struct omap_clkctrl_reg_data omap5_dsp_clkctrl_regs[] __initconst =
>>   	{ 0 },
>>   };
>>   
>> +static const char * const omap5_aess_fclk_parents[] __initconst = {
>> +	"abe_clk",
>> +	NULL,
>> +};
>> +
>> +static const struct omap_clkctrl_div_data omap5_aess_fclk_data __initconst = {
>> +	.max_div = 2,
>> +};
>> +
>> +static const struct omap_clkctrl_bit_data omap5_aess_bit_data[] __initconst = {
>> +	{ 24, TI_CLK_DIVIDER, omap5_aess_fclk_parents, &omap5_aess_fclk_data },
>> +	{ 0 },
>> +};
>> +
>>   static const char * const omap5_dmic_gfclk_parents[] __initconst = {
>>   	"abe_cm:clk:0018:26",
>>   	"pad_clks_ck",
>> @@ -122,6 +136,7 @@ static const struct omap_clkctrl_bit_data omap5_timer8_bit_data[] __initconst =
>>   
>>   static const struct omap_clkctrl_reg_data omap5_abe_clkctrl_regs[] __initconst = {
>>   	{ OMAP5_L4_ABE_CLKCTRL, NULL, 0, "abe_iclk" },
>> +	{ OMAP5_AESS_CLKCTRL, omap5_aess_bit_data, CLKF_SW_SUP, "abe_cm:clk:0008:24" },
>>   	{ OMAP5_MCPDM_CLKCTRL, NULL, CLKF_SW_SUP, "pad_clks_ck" },
>>   	{ OMAP5_DMIC_CLKCTRL, omap5_dmic_bit_data, CLKF_SW_SUP, "abe_cm:clk:0018:24" },
>>   	{ OMAP5_MCBSP1_CLKCTRL, omap5_mcbsp1_bit_data, CLKF_SW_SUP, "abe_cm:clk:0028:24" },
>> diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h
>> --- a/include/dt-bindings/clock/omap5.h
>> +++ b/include/dt-bindings/clock/omap5.h
>> @@ -16,6 +16,7 @@
>>   
>>   /* abe clocks */
>>   #define OMAP5_L4_ABE_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x20)
>> +#define OMAP5_AESS_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x28)
>>   #define OMAP5_MCPDM_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x30)
>>   #define OMAP5_DMIC_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x38)
>>   #define OMAP5_MCBSP1_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x48)
>>
> 
> - Péter
> 
> 

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2020-01-14 15:06 [PATCH] clk: ti: omap5: Add missing AESS clock Tony Lindgren
2020-01-15  8:56 ` Peter Ujfalusi
2020-01-21  7:33   ` Tero Kristo

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