From: Brijesh Singh <brijesh.singh@amd.com>
To: <x86@kernel.org>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>, <linux-efi@vger.kernel.org>,
<platform-driver-x86@vger.kernel.org>,
<linux-coco@lists.linux.dev>, <linux-mm@kvack.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Joerg Roedel <jroedel@suse.de>,
Tom Lendacky <thomas.lendacky@amd.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Ard Biesheuvel <ardb@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
Jim Mattson <jmattson@google.com>,
"Andy Lutomirski" <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Sergio Lopez <slp@redhat.com>, Peter Gonda <pgonda@google.com>,
"Peter Zijlstra" <peterz@infradead.org>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
David Rientjes <rientjes@google.com>,
Dov Murik <dovmurik@linux.ibm.com>,
Tobin Feldman-Fitzthum <tobin@ibm.com>,
Borislav Petkov <bp@alien8.de>,
Michael Roth <michael.roth@amd.com>,
Vlastimil Babka <vbabka@suse.cz>,
"Kirill A . Shutemov" <kirill@shutemov.name>,
Andi Kleen <ak@linux.intel.com>,
"Dr . David Alan Gilbert" <dgilbert@redhat.com>,
<tony.luck@intel.com>, <marcorr@google.com>,
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: [PATCH v7 03/45] x86/mm: Extend cc_attr to include AMD SEV-SNP
Date: Wed, 10 Nov 2021 16:06:49 -0600 [thread overview]
Message-ID: <20211110220731.2396491-4-brijesh.singh@amd.com> (raw)
In-Reply-To: <20211110220731.2396491-1-brijesh.singh@amd.com>
The CC_ATTR_SEV_SNP can be used by the guest to query whether the SNP -
Secure Nested Paging feature is active.
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
arch/x86/include/asm/msr-index.h | 2 ++
arch/x86/kernel/cc_platform.c | 2 ++
arch/x86/mm/mem_encrypt.c | 4 ++++
include/linux/cc_platform.h | 8 ++++++++
4 files changed, 16 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 01e2650b9585..98a64b230447 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -481,8 +481,10 @@
#define MSR_AMD64_SEV 0xc0010131
#define MSR_AMD64_SEV_ENABLED_BIT 0
#define MSR_AMD64_SEV_ES_ENABLED_BIT 1
+#define MSR_AMD64_SEV_SNP_ENABLED_BIT 2
#define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT)
#define MSR_AMD64_SEV_ES_ENABLED BIT_ULL(MSR_AMD64_SEV_ES_ENABLED_BIT)
+#define MSR_AMD64_SEV_SNP_ENABLED BIT_ULL(MSR_AMD64_SEV_SNP_ENABLED_BIT)
#define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f
diff --git a/arch/x86/kernel/cc_platform.c b/arch/x86/kernel/cc_platform.c
index 03bb2f343ddb..e05310f5ec2f 100644
--- a/arch/x86/kernel/cc_platform.c
+++ b/arch/x86/kernel/cc_platform.c
@@ -50,6 +50,8 @@ static bool amd_cc_platform_has(enum cc_attr attr)
case CC_ATTR_GUEST_STATE_ENCRYPT:
return sev_status & MSR_AMD64_SEV_ES_ENABLED;
+ case CC_ATTR_SEV_SNP:
+ return sev_status & MSR_AMD64_SEV_SNP_ENABLED;
default:
return false;
}
diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
index 23d54b810f08..534c2c82fbec 100644
--- a/arch/x86/mm/mem_encrypt.c
+++ b/arch/x86/mm/mem_encrypt.c
@@ -433,6 +433,10 @@ static void print_mem_encrypt_feature_info(void)
if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
pr_cont(" SEV-ES");
+ /* Secure Nested Paging */
+ if (cc_platform_has(CC_ATTR_SEV_SNP))
+ pr_cont(" SEV-SNP");
+
pr_cont("\n");
}
diff --git a/include/linux/cc_platform.h b/include/linux/cc_platform.h
index a075b70b9a70..ef5e2209c9b8 100644
--- a/include/linux/cc_platform.h
+++ b/include/linux/cc_platform.h
@@ -61,6 +61,14 @@ enum cc_attr {
* Examples include SEV-ES.
*/
CC_ATTR_GUEST_STATE_ENCRYPT,
+
+ /**
+ * @CC_ATTR_SEV_SNP: Guest SNP is active.
+ *
+ * The platform/OS is running as a guest/virtual machine and actively
+ * using AMD SEV-SNP features.
+ */
+ CC_ATTR_SEV_SNP = 0x100,
};
#ifdef CONFIG_ARCH_HAS_CC_PLATFORM
--
2.25.1
next prev parent reply other threads:[~2021-11-10 22:08 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-10 22:06 [PATCH v7 00/45] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 01/45] x86/compressed/64: detect/setup SEV/SME features earlier in boot Brijesh Singh
2021-11-12 16:52 ` Borislav Petkov
2021-11-12 20:30 ` Michael Roth
2021-11-23 21:55 ` Venu Busireddy
2021-11-10 22:06 ` [PATCH v7 02/45] x86/sev: " Brijesh Singh
2021-11-15 19:12 ` Borislav Petkov
2021-11-15 20:17 ` Michael Roth
2021-11-17 13:11 ` Borislav Petkov
2021-12-06 23:47 ` Venu Busireddy
2021-11-10 22:06 ` Brijesh Singh [this message]
2021-11-10 22:06 ` [PATCH v7 04/45] x86/sev: Shorten GHCB terminate macro names Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 05/45] x86/sev: Get rid of excessive use of defines Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 06/45] x86/head64: Carve out the guest encryption postprocessing into a helper Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 07/45] x86/sev: Remove do_early_exception() forward declarations Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 08/45] x86/sev: Define the Linux specific guest termination reasons Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 09/45] x86/sev: Save the negotiated GHCB version Brijesh Singh
2021-12-07 12:51 ` Tianyu Lan
2021-12-07 13:17 ` Borislav Petkov
2021-12-07 16:58 ` Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 10/45] x86/sev: Add support for hypervisor feature VMGEXIT Brijesh Singh
2021-12-02 17:52 ` Borislav Petkov
2021-12-06 15:15 ` Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 11/45] x86/sev: Check SEV-SNP features support Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 12/45] x86/sev: Add a helper for the PVALIDATE instruction Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 13/45] x86/sev: Check the vmpl level Brijesh Singh
2021-12-06 18:25 ` Borislav Petkov
2021-11-10 22:07 ` [PATCH v7 14/45] x86/compressed: Add helper for validating pages in the decompression stage Brijesh Singh
2021-12-07 11:48 ` Borislav Petkov
2021-12-07 19:21 ` Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 15/45] x86/compressed: Register GHCB memory when SEV-SNP is active Brijesh Singh
2021-11-15 14:05 ` Jörg Rödel
2021-11-10 22:07 ` [PATCH v7 16/45] x86/sev: " Brijesh Singh
2021-12-08 17:41 ` Borislav Petkov
2021-11-10 22:07 ` [PATCH v7 17/45] x86/sev: Add helper for validating pages in early enc attribute changes Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 18/45] x86/kernel: Make the bss.decrypted section shared in RMP table Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 19/45] x86/kernel: Validate rom memory before accessing when SEV-SNP is active Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 20/45] x86/mm: Add support to validate memory when changing C-bit Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 21/45] KVM: SVM: Define sev_features and vmpl field in the VMSA Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 22/45] KVM: SVM: Create a separate mapping for the SEV-ES save area Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 23/45] KVM: SVM: Create a separate mapping for the GHCB " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 24/45] KVM: SVM: Update the SEV-ES save area mapping Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 25/45] x86/sev: Use SEV-SNP AP creation to start secondary CPUs Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 26/45] x86/head: re-enable stack protection for 32/64-bit builds Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 27/45] x86/sev: move MSR-based VMGEXITs for CPUID to helper Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 28/45] KVM: x86: move lookup of indexed CPUID leafs " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 29/45] x86/compressed/acpi: move EFI system table lookup " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 30/45] x86/compressed/acpi: move EFI config " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 31/45] x86/compressed/acpi: move EFI vendor " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 32/45] x86/boot: Add Confidential Computing type to setup_data Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 33/45] KVM: SEV: Add documentation for SEV-SNP CPUID Enforcement Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 34/45] x86/compressed/64: add support for SEV-SNP CPUID table in #VC handlers Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 35/45] x86/boot: add a pointer to Confidential Computing blob in bootparams Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 36/45] x86/compressed: add SEV-SNP feature detection/setup Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 37/45] x86/compressed: use firmware-validated CPUID for SEV-SNP guests Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 38/45] x86/compressed/64: add identity mapping for Confidential Computing blob Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 39/45] x86/sev: add SEV-SNP feature detection/setup Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 40/45] x86/sev: use firmware-validated CPUID for SEV-SNP guests Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 41/45] x86/sev: Provide support for SNP guest request NAEs Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 42/45] x86/sev: Register SNP guest request platform device Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 43/45] virt: Add SEV-SNP guest driver Brijesh Singh
2021-11-10 22:27 ` Randy Dunlap
2021-11-11 19:27 ` Brijesh Singh
2021-11-11 22:57 ` Randy Dunlap
2021-11-17 23:34 ` Peter Gonda
2021-11-18 17:08 ` Peter Gonda
2021-11-18 17:32 ` Brijesh Singh
2021-11-19 16:16 ` Peter Gonda
2021-11-20 0:28 ` Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 44/45] virt: sevguest: Add support to derive key Brijesh Singh
2021-11-18 16:43 ` Peter Gonda
2021-11-18 17:43 ` Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 45/45] virt: sevguest: Add support to get extended report Brijesh Singh
2021-11-15 15:56 ` [PATCH v7 00/45] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Venu Busireddy
2021-11-15 16:02 ` Brijesh Singh
2021-11-15 16:37 ` Venu Busireddy
2021-11-15 16:45 ` Brijesh Singh
2021-11-15 16:55 ` Venu Busireddy
2021-11-16 15:45 ` Venu Busireddy
2021-11-16 16:03 ` Brijesh Singh
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211110220731.2396491-4-brijesh.singh@amd.com \
--to=brijesh.singh@amd.com \
--cc=ak@linux.intel.com \
--cc=ardb@kernel.org \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=dgilbert@redhat.com \
--cc=dovmurik@linux.ibm.com \
--cc=hpa@zytor.com \
--cc=jmattson@google.com \
--cc=jroedel@suse.de \
--cc=kirill@shutemov.name \
--cc=kvm@vger.kernel.org \
--cc=linux-coco@lists.linux.dev \
--cc=linux-efi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=luto@kernel.org \
--cc=marcorr@google.com \
--cc=michael.roth@amd.com \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=pgonda@google.com \
--cc=platform-driver-x86@vger.kernel.org \
--cc=rientjes@google.com \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=seanjc@google.com \
--cc=slp@redhat.com \
--cc=srinivas.pandruvada@linux.intel.com \
--cc=tglx@linutronix.de \
--cc=thomas.lendacky@amd.com \
--cc=tobin@ibm.com \
--cc=tony.luck@intel.com \
--cc=vbabka@suse.cz \
--cc=vkuznets@redhat.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).