From: Ilia Lin <ilialin@codeaurora.org>
To: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, sboyd@codeaurora.org
Cc: devicetree@vger.kernel.org, mark.rutland@arm.com,
will.deacon@arm.com, rnayak@codeaurora.org,
qualcomm-lt@lists.linaro.org, ilialin@codeaurora.org,
celster@codeaurora.org, tfinkel@codeaurora.org
Subject: [PATCH 07/10] clk: qcom: clk-cpu-8996: Prepare PLLs on probe
Date: Tue, 12 Dec 2017 14:31:34 +0200 [thread overview]
Message-ID: <1513081897-31612-8-git-send-email-ilialin@codeaurora.org> (raw)
In-Reply-To: <1513081897-31612-1-git-send-email-ilialin@codeaurora.org>
The PLLs must be prepared enabled during the probe to be
accessible by the OPPs. Otherwise an OPP may switch
to non-enabled clock.
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
---
drivers/clk/qcom/clk-cpu-8996.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index 79db4e8..0d41fa9 100644
--- a/drivers/clk/qcom/clk-cpu-8996.c
+++ b/drivers/clk/qcom/clk-cpu-8996.c
@@ -15,7 +15,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
-
+#include <linux/clk-provider.h>
#include "clk-alpha-pll.h"
#define VCO(a, b, c) { \
@@ -159,7 +159,7 @@ static int clk_cpu_8996_mux_set_parent(struct clk_hw *hw, u8 index)
cpuclk->shift);
val = index;
- val = cpuclk->shift;
+ val <<= cpuclk->shift;
return regmap_update_bits(clkr->regmap, cpuclk->reg, mask, val);
}
@@ -268,7 +268,7 @@ int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
},
.num_parents = 4,
.ops = &clk_cpu_8996_mux_ops,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
},
};
@@ -284,12 +284,12 @@ int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
.parent_names = (const char *[]){
"perfcl_smux",
"perfcl_pll",
- "pwrcl_pll_acd",
+ "perfcl_pll_acd",
"perfcl_alt_pll",
},
.num_parents = 4,
.ops = &clk_cpu_8996_mux_ops,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
},
};
@@ -354,6 +354,18 @@ struct clk_hw_clks {
clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config);
clk_alpha_pll_configure(&pwrcl_alt_pll, regmap, &altpll_config);
+ /* Enable all PLLs and alt PLLs */
+ clk_prepare_enable(pwrcl_alt_pll.clkr.hw.clk);
+ clk_prepare_enable(perfcl_alt_pll.clkr.hw.clk);
+ clk_prepare_enable(pwrcl_pll.clkr.hw.clk);
+ clk_prepare_enable(perfcl_pll.clkr.hw.clk);
+
+ /* Set initial boot frequencies for power/perf PLLs */
+ clk_set_rate(pwrcl_alt_pll.clkr.hw.clk, 652800000);
+ clk_set_rate(perfcl_alt_pll.clkr.hw.clk, 652800000);
+ clk_set_rate(pwrcl_pll.clkr.hw.clk, 652800000);
+ clk_set_rate(perfcl_pll.clkr.hw.clk, 652800000);
+
ret = clk_notifier_register(pwrcl_pmux.clkr.hw.clk, &pwrcl_pmux.nb);
if (ret)
return ret;
--
1.9.1
next prev parent reply other threads:[~2017-12-12 12:31 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-12 12:31 [PATCH 00/10] clk: qcom: CPU clock driver for msm8996 Ilia Lin
2017-12-12 12:31 ` [PATCH 01/10] soc: qcom: Separate kryo l2 accessors from PMU driver Ilia Lin
2017-12-12 14:03 ` Mark Rutland
2017-12-22 2:06 ` Stephen Boyd
2018-01-04 11:15 ` ilialin
2018-01-04 11:13 ` ilialin
2017-12-12 12:31 ` [PATCH 02/10] clk: qcom: Fix .set_rate to handle alpha PLLs w/wo dynamic update Ilia Lin
[not found] ` <1513081897-31612-3-git-send-email-ilialin-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-12 15:05 ` Julien Thierry
2018-01-04 11:14 ` ilialin
2017-12-12 12:31 ` [PATCH 03/10] clk: qcom: Make clk_alpha_pll_configure available to modules Ilia Lin
2017-12-12 12:31 ` [PATCH 04/10] clk: qcom: Add CPU clock driver for msm8996 Ilia Lin
2017-12-15 22:35 ` Rob Herring
2018-01-04 11:15 ` ilialin
[not found] ` <1513081897-31612-1-git-send-email-ilialin-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-12 12:31 ` [PATCH 05/10] clk: qcom: cpu-8996: Add support to switch to alternate PLL Ilia Lin
2017-12-12 12:31 ` [PATCH 06/10] clk: qcom: cpu-8996: Add support to switch below 600Mhz Ilia Lin
2017-12-12 12:31 ` [PATCH 08/10] clk: qcom: Add ACD path to CPU clock driver for msm8996 Ilia Lin
2017-12-12 12:31 ` Ilia Lin [this message]
2017-12-12 12:31 ` [PATCH 09/10] DT: QCOM: Add cpufreq-dt to msm8996 Ilia Lin
2017-12-12 12:31 ` [PATCH 10/10] DT: QCOM: Add thermal mitigation " Ilia Lin
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