From: "Mylène Josserand" <mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
wens-jdAy2FN1RRM@public.gmane.org,
linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org
Subject: [PATCH 2/4] arm: dts: sun8i: a83t: Add registers needed for MCPM
Date: Mon, 11 Dec 2017 08:49:59 +0100 [thread overview]
Message-ID: <20171211075001.6100-3-mylene.josserand@free-electrons.com> (raw)
In-Reply-To: <20171211075001.6100-1-mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Add 3 registers needed for MCPM (ie SMP): prcm, cpucfg and r_cpucfg.
prcm and cpucfg are identical with sun9i-a80. The only difference
is the r_cpucfg that does not exist on sun9i.
Signed-off-by: Mylène Josserand <mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index a384b766f3dc..eeb2e7d0d6dc 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -323,6 +323,16 @@
#reset-cells = <1>;
};
+ cpucfg@01700000 {
+ compatible = "allwinner,sun9i-a80-cpucfg";
+ reg = <0x01700000 0x100>;
+ };
+
+ r_cpucfg@1f01c00 {
+ compatible = "allwinner,sun8i-a83t-r-cpucfg";
+ reg = <0x1f01c00 0x100>;
+ };
+
pio: pinctrl@1c20800 {
compatible = "allwinner,sun8i-a83t-pinctrl";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
@@ -493,6 +503,11 @@
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
+ prcm@1f01400 {
+ compatible = "allwinner,sun9i-a80-prcm";
+ reg = <0x1f01400 0x200>;
+ };
+
r_ccu: clock@1f01400 {
compatible = "allwinner,sun8i-a83t-r-ccu";
reg = <0x01f01400 0x400>;
--
2.11.0
--
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next prev parent reply other threads:[~2017-12-11 7:49 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-11 7:49 [PATCH 0/4] Sunxi: Add SMP support on A83T Mylène Josserand
2017-12-11 7:49 ` [PATCH 1/4] ARM: sunxi: mcpm: Add support for A83T Mylène Josserand
[not found] ` <20171211075001.6100-1-mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-11 7:49 ` Mylène Josserand [this message]
2017-12-13 10:50 ` [PATCH 2/4] arm: dts: sun8i: a83t: Add registers needed for MCPM Maxime Ripard
2017-12-11 19:35 ` [PATCH 0/4] Sunxi: Add SMP support on A83T Corentin Labbe
2017-12-12 8:19 ` Mylene JOSSERAND
2017-12-12 8:24 ` Maxime Ripard
2017-12-15 6:10 ` Corentin Labbe
2017-12-27 15:07 ` Mylene JOSSERAND
[not found] ` <20171227160729.4509bec5-K8i4uRanGBt8XcdJbWeDu7NAH6kLmebB@public.gmane.org>
2017-12-28 20:31 ` Corentin Labbe
2017-12-29 11:04 ` Mylene JOSSERAND
2017-12-12 9:40 ` Mylene JOSSERAND
[not found] ` <20171212104025.0bba3685-K8i4uRanGBt8XcdJbWeDu7NAH6kLmebB@public.gmane.org>
2017-12-12 10:01 ` Mylene JOSSERAND
2017-12-11 7:50 ` [PATCH 3/4] arm: dts: sun8i: a83t: Add CCI-400 node Mylène Josserand
[not found] ` <20171211075001.6100-4-mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-13 10:52 ` Maxime Ripard
2017-12-11 7:50 ` [PATCH 4/4] arm: dts: sun8i: a83t: Set timer node to use phy timer Mylène Josserand
2017-12-13 10:59 ` Maxime Ripard
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