From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: "Mylène Josserand" <mylene.josserand@free-electrons.com>
Cc: wens@csie.org, linux@armlinux.org.uk, robh+dt@kernel.org,
mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
thomas.petazzoni@free-electrons.com
Subject: Re: [PATCH 2/4] arm: dts: sun8i: a83t: Add registers needed for MCPM
Date: Wed, 13 Dec 2017 11:50:04 +0100 [thread overview]
Message-ID: <20171213105004.k2hlnl3dzvs2plhh@flea.lan> (raw)
In-Reply-To: <20171211075001.6100-3-mylene.josserand@free-electrons.com>
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Hi,
On Mon, Dec 11, 2017 at 08:49:59AM +0100, Mylène Josserand wrote:
> Add 3 registers needed for MCPM (ie SMP): prcm, cpucfg and r_cpucfg.
> prcm and cpucfg are identical with sun9i-a80. The only difference
> is the r_cpucfg that does not exist on sun9i.
>
> Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index a384b766f3dc..eeb2e7d0d6dc 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -323,6 +323,16 @@
> #reset-cells = <1>;
> };
> + cpucfg@01700000 {
Please drop the leading zero here, it generates a warning in dtc.
> + compatible = "allwinner,sun9i-a80-cpucfg";
There's some significant differences between the A83t and the A80 IPs,
you should use a different compatible.
> + reg = <0x01700000 0x100>;
the size is 1k (0x400)
> + };
> +
> + r_cpucfg@1f01c00 {
> + compatible = "allwinner,sun8i-a83t-r-cpucfg";
> + reg = <0x1f01c00 0x100>;
You should order the nodes by physical address
> + };
> +
> pio: pinctrl@1c20800 {
> compatible = "allwinner,sun8i-a83t-pinctrl";
> interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> @@ -493,6 +503,11 @@
> interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + prcm@1f01400 {
> + compatible = "allwinner,sun9i-a80-prcm";
That block is significantly different on the A83t. Please use a
different compatible.
> + reg = <0x1f01400 0x200>;
> + };
> +
The size is 1k, again.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2017-12-13 10:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-11 7:49 [PATCH 0/4] Sunxi: Add SMP support on A83T Mylène Josserand
2017-12-11 7:49 ` [PATCH 1/4] ARM: sunxi: mcpm: Add support for A83T Mylène Josserand
[not found] ` <20171211075001.6100-1-mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-11 7:49 ` [PATCH 2/4] arm: dts: sun8i: a83t: Add registers needed for MCPM Mylène Josserand
2017-12-13 10:50 ` Maxime Ripard [this message]
2017-12-11 19:35 ` [PATCH 0/4] Sunxi: Add SMP support on A83T Corentin Labbe
2017-12-12 8:19 ` Mylene JOSSERAND
2017-12-12 8:24 ` Maxime Ripard
2017-12-15 6:10 ` Corentin Labbe
2017-12-27 15:07 ` Mylene JOSSERAND
[not found] ` <20171227160729.4509bec5-K8i4uRanGBt8XcdJbWeDu7NAH6kLmebB@public.gmane.org>
2017-12-28 20:31 ` Corentin Labbe
2017-12-29 11:04 ` Mylene JOSSERAND
2017-12-12 9:40 ` Mylene JOSSERAND
[not found] ` <20171212104025.0bba3685-K8i4uRanGBt8XcdJbWeDu7NAH6kLmebB@public.gmane.org>
2017-12-12 10:01 ` Mylene JOSSERAND
2017-12-11 7:50 ` [PATCH 3/4] arm: dts: sun8i: a83t: Add CCI-400 node Mylène Josserand
[not found] ` <20171211075001.6100-4-mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-13 10:52 ` Maxime Ripard
2017-12-11 7:50 ` [PATCH 4/4] arm: dts: sun8i: a83t: Set timer node to use phy timer Mylène Josserand
2017-12-13 10:59 ` Maxime Ripard
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