devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v2 1/6] pinctrl: sunxi: support pin controllers with holes among IRQ banks
Date: Wed, 7 Feb 2018 09:51:46 +0100	[thread overview]
Message-ID: <20180207085146.dvgwkdjq7ybhohwh@flea> (raw)
In-Reply-To: <20180203154942.63566-2-icenowy-h8G6r0blFSE@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 1767 bytes --]

Hi,

On Sat, Feb 03, 2018 at 11:49:37PM +0800, Icenowy Zheng wrote:
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> index 11b128f54ed2..fae732c8c548 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> @@ -110,7 +110,7 @@ struct sunxi_pinctrl_desc {
>  	int				npins;
>  	unsigned			pin_base;
>  	unsigned			irq_banks;
> -	unsigned			irq_bank_base;
> +	const unsigned int		*irq_bank_map;
>  	bool				irq_read_needs_mux;
>  	bool				disable_strict_mode;
>  };
> @@ -263,12 +263,21 @@ static inline u32 sunxi_pull_offset(u16 pin)
>  	return pin_num * PULL_PINS_BITS;
>  }
>  
> -static inline u32 sunxi_irq_cfg_reg(u16 irq, unsigned bank_base)
> +static inline u32 sunxi_irq_hw_bank_num(u8 bank, const unsigned int *bank_map)
> +{
> +	if (!bank_map)
> +		return bank;
> +	else
> +		return bank_map[bank];
> +}

From a function API PoV, I guess it would make more sense and be
cleaner to simply pass the sunxi_pinctrl_desc structure (as the first
argument) and have the function there read that structure and act upon
it.

Giving it just a blank pointer, without any size indication, and
either dereferencing it without any boundary check, or changing the
behaviour based on whether it's null or not seems pretty fragile.

I guess you could do it in two patches. One to change the function
prototypes to call the sunxi_irq_cfg_reg function (and all its caller)
to have the prototype (struct sunxi_pinctrl_desc *desc, u16 irq).

And then in a later patch change the behaviour to introduce the map.

Thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  parent reply	other threads:[~2018-02-07  8:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-03 15:49 [PATCH v2 0/6] Initial Allwinner H6 support Icenowy Zheng
2018-02-03 15:49 ` [PATCH v2 3/6] clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks Icenowy Zheng
     [not found] ` <20180203154942.63566-1-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-03 15:49   ` [PATCH v2 1/6] pinctrl: sunxi: support pin controllers with holes among IRQ banks Icenowy Zheng
     [not found]     ` <20180203154942.63566-2-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-07  8:51       ` Maxime Ripard [this message]
2018-02-03 15:49   ` [PATCH v2 2/6] pinctrl: sunxi: add support for the Allwinner H6 main pin controller Icenowy Zheng
     [not found]     ` <20180203154942.63566-3-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-08 20:16       ` Rob Herring
2018-02-13  0:38       ` [linux-sunxi] " André Przywara
2018-02-03 15:49   ` [PATCH v2 4/6] clk: sunxi-ng: add support for the Allwinner H6 CCU Icenowy Zheng
2018-02-07  9:02     ` Maxime Ripard
2018-02-07  9:11       ` Icenowy Zheng
2018-02-07 18:49         ` Maxime Ripard
2018-02-08 20:18     ` Rob Herring
2018-02-03 15:49   ` [PATCH v2 5/6] arm64: allwinner: h6: add the basical Allwinner H6 DTSI file Icenowy Zheng
2018-02-11 23:26     ` [linux-sunxi] " André Przywara
2018-02-12  9:16       ` Philippe Ombredanne
2018-02-03 15:49   ` [PATCH v2 6/6] arm64: allwinner: h6: add support for Pine H64 board Icenowy Zheng
     [not found]     ` <20180203154942.63566-7-icenowy-h8G6r0blFSE@public.gmane.org>
2018-02-11 23:26       ` André Przywara
2018-02-22 12:43   ` [PATCH v2 0/6] Initial Allwinner H6 support Linus Walleij

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180207085146.dvgwkdjq7ybhohwh@flea \
    --to=maxime.ripard-ldxbnhwyfcjbdgjk7y7tuq@public.gmane.org \
    --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=icenowy-h8G6r0blFSE@public.gmane.org \
    --cc=linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org \
    --cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
    --cc=wens-jdAy2FN1RRM@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).