From: Bjorn Helgaas <helgaas@kernel.org>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Jingoo Han <jingoohan1@gmail.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
William Wu <william.wu@rock-chips.com>,
Simon Xue <xxm@rock-chips.com>,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 5/6] PCI: rockchip: add DesignWare based PCIe controller
Date: Wed, 15 Jan 2020 11:24:30 -0600 [thread overview]
Message-ID: <20200115172430.GA180494@google.com> (raw)
In-Reply-To: <1578986701-72072-1-git-send-email-shawn.lin@rock-chips.com>
Follow subject line convention.
On Tue, Jan 14, 2020 at 03:25:01PM +0800, Shawn Lin wrote:
> From: Simon Xue <xxm@rock-chips.com>
Needs a commit log. Please describe the relationship with the
existing drivers/pci/controller/pcie-rockchip-host.c. Are they for
different devices? Does this supercede the other?
> Signed-off-by: Simon Xue <xxm@rock-chips.com>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
>
> drivers/pci/controller/dwc/Kconfig | 9 +
> drivers/pci/controller/dwc/Makefile | 1 +
> drivers/pci/controller/dwc/pcie-dw-rockchip.c | 441 ++++++++++++++++++++++++++
> 3 files changed, 451 insertions(+)
> create mode 100644 drivers/pci/controller/dwc/pcie-dw-rockchip.c
>
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index 0830dfc..9160264 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -82,6 +82,15 @@ config PCIE_DW_PLAT_EP
> order to enable device-specific features PCI_DW_PLAT_EP must be
> selected.
>
> +config PCIE_DW_ROCKCHIP
> + bool "Rockchip DesignWare PCIe controller"
> + select PCIE_DW
> + select PCIE_DW_HOST
> + depends on ARCH_ROCKCHIP
> + depends on OF
> + help
> + Enables support for the DW PCIe controller in the Rockchip SoC.
A user needs to be able to tell whether to enable
CONFIG_PCIE_ROCKCHIP_HOST or CONFIG_PCIE_DW_ROCKCHIP. Is there an
endpoint driver coming? Should this be named PCIE_DW_ROCKCHIP_HOST?
> + ret = rockchip_pcie_reset_grant_ctrl(rockchip, true);
> + if (ret)
> + goto deinit_clk;
> +
> +// if (rockchip->mode == DW_PCIE_RC_TYPE)
> +// ret = rk_add_pcie_port(rockchip);
Remove commented-out code. I do like an "if" statement better than
the complicated assignment/ternary thing below, though.
> + ret = rockchip->mode == DW_PCIE_RC_TYPE ?
> + rk_add_pcie_port(rockchip) : -EINVAL;
> +
> + if (ret)
> + goto deinit_clk;
next prev parent reply other threads:[~2020-01-15 17:24 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-14 7:22 [PATCH 0/6] Add Rockchip new PCIe controller and combo phy support Shawn Lin
2020-01-14 7:22 ` [PATCH 1/6] dt-bindings: add binding for Rockchip combo phy using an Innosilicon IP Shawn Lin
2020-01-14 23:43 ` Rob Herring
2020-01-16 0:03 ` [PATCH 1/6] dt-bindings: add binding for Rockchip combo phy using an Innosilicon IP【请注意，邮件由linux-rockchip-bounces+shawn.lin=rock-chips.com@lists.infradead.org代发】 Shawn Lin
2020-01-14 7:22 ` [PATCH 2/6] phy/rockchip: inno-combophy: Add initial support Shawn Lin
2020-01-14 7:22 ` [PATCH 3/6] PCI: dwc: Skip allocating own MSI domain if using external MSI domain Shawn Lin
2020-01-14 7:22 ` [PATCH 4/6] dt-bindings: rockchip: Add DesignWare based PCIe controller Shawn Lin
2020-01-15 0:05 ` Rob Herring
2020-01-14 7:25 ` [PATCH 5/6] PCI: rockchip: add " Shawn Lin
2020-01-15 17:24 ` Bjorn Helgaas [this message]
2020-01-16 0:14 ` Shawn Lin
2020-01-16 21:36 ` Jingoo Han
2020-01-18 16:36 ` Francesco Lavra
2020-01-20 0:55 ` Shawn Lin
2020-01-14 7:25 ` [PATCH 6/6] MAINTAINERS: Update PCIe drivers for Rockchip Shawn Lin
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