From: Lucas Stach <l.stach@pengutronix.de>
To: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>,
Fabio Estevam <festevam@gmail.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Marek Vasut <marex@denx.de>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
kernel@pengutronix.de, patchwork-lst@pengutronix.de
Subject: [PATCH 04/11] soc: imx: gpcv2: wait for ADB400 handshake
Date: Wed, 30 Sep 2020 17:49:59 +0200 [thread overview]
Message-ID: <20200930155006.535712-5-l.stach@pengutronix.de> (raw)
In-Reply-To: <20200930155006.535712-1-l.stach@pengutronix.de>
New reference manuals show that there is actually a status bit for
the ADB400 handshake. Add a poll loop to wait for the ADB400 to
acknowledge our request.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/soc/imx/gpcv2.c | 43 +++++++++++++++++++++++++++++++++--------
1 file changed, 35 insertions(+), 8 deletions(-)
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index f91063c9fb92..3cfb8b51c23e 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -69,6 +69,9 @@
#define GPC_PU_PWRHSK 0x1fc
+#define IMX8M_GPU_HSK_PWRDNACKN BIT(26)
+#define IMX8M_VPU_HSK_PWRDNACKN BIT(25)
+#define IMX8M_DISP_HSK_PWRDNACKN BIT(24)
#define IMX8M_GPU_HSK_PWRDNREQN BIT(6)
#define IMX8M_VPU_HSK_PWRDNREQN BIT(5)
#define IMX8M_DISP_HSK_PWRDNREQN BIT(4)
@@ -114,7 +117,8 @@ struct imx_pgc_domain {
const struct {
u32 pxx;
u32 map;
- u32 hsk;
+ u32 hskreq;
+ u32 hskack;
} bits;
const int voltage;
@@ -176,9 +180,19 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
GPC_PGC_CTRL_PCR, 0);
/* request the ADB400 to power up */
- if (domain->bits.hsk)
+ if (domain->bits.hskreq) {
regmap_update_bits(domain->regmap, GPC_PU_PWRHSK,
- domain->bits.hsk, domain->bits.hsk);
+ domain->bits.hskreq, domain->bits.hskreq);
+
+ ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
+ reg_val,
+ (reg_val & domain->bits.hskack),
+ 0, USEC_PER_MSEC);
+ if (ret) {
+ dev_err(domain->dev, "failed to power up ADB400\n");
+ goto out_clk_disable;
+ }
+ }
/* Disable reset clocks for all devices in the domain */
for (i = 0; i < domain->num_clks; i++)
@@ -211,9 +225,19 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd)
}
/* request the ADB400 to power down */
- if (domain->bits.hsk)
+ if (domain->bits.hskreq) {
regmap_update_bits(domain->regmap, GPC_PU_PWRHSK,
- domain->bits.hsk, 0);
+ domain->bits.hskreq, 0);
+
+ ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
+ reg_val,
+ !(reg_val & domain->bits.hskack),
+ 0, USEC_PER_MSEC);
+ if (ret) {
+ dev_err(domain->dev, "failed to power down ADB400\n");
+ goto out_clk_disable;
+ }
+ }
/* enable power control */
regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
@@ -378,7 +402,8 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.bits = {
.pxx = IMX8M_GPU_SW_Pxx_REQ,
.map = IMX8M_GPU_A53_DOMAIN,
- .hsk = IMX8M_GPU_HSK_PWRDNREQN,
+ .hskreq = IMX8M_GPU_HSK_PWRDNREQN,
+ .hskack = IMX8M_GPU_HSK_PWRDNACKN,
},
.pgc = IMX8M_PGC_GPU,
},
@@ -390,7 +415,8 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.bits = {
.pxx = IMX8M_VPU_SW_Pxx_REQ,
.map = IMX8M_VPU_A53_DOMAIN,
- .hsk = IMX8M_VPU_HSK_PWRDNREQN,
+ .hskreq = IMX8M_VPU_HSK_PWRDNREQN,
+ .hskack = IMX8M_VPU_HSK_PWRDNACKN,
},
.pgc = IMX8M_PGC_VPU,
},
@@ -402,7 +428,8 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.bits = {
.pxx = IMX8M_DISP_SW_Pxx_REQ,
.map = IMX8M_DISP_A53_DOMAIN,
- .hsk = IMX8M_DISP_HSK_PWRDNREQN,
+ .hskreq = IMX8M_DISP_HSK_PWRDNREQN,
+ .hskack = IMX8M_DISP_HSK_PWRDNACKN,
},
.pgc = IMX8M_PGC_DISP,
},
--
2.20.1
next prev parent reply other threads:[~2020-09-30 15:50 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 15:49 [PATCH 00/11] i.MX8MM power domain support Lucas Stach
2020-09-30 15:49 ` [PATCH 01/11] soc: imx: gpcv2: move to more ideomatic error handling in probe Lucas Stach
2020-09-30 16:04 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 02/11] soc: imx: gpcv2: move domain mapping to domain driver probe Lucas Stach
2020-09-30 16:07 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 03/11] soc: imx: gpcv2: split power up and power down sequence control Lucas Stach
2020-09-30 16:10 ` Marek Vasut
2020-09-30 15:49 ` Lucas Stach [this message]
2020-09-30 16:11 ` [PATCH 04/11] soc: imx: gpcv2: wait for ADB400 handshake Marek Vasut
2020-09-30 16:19 ` Lucas Stach
2020-09-30 16:23 ` Marek Vasut
2020-10-09 3:05 ` Jacky Bai
2020-10-09 7:27 ` Marek Vasut
2020-10-09 7:51 ` Jacky Bai
2020-10-09 8:19 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 05/11] soc: imx: gpcv2: add runtime PM support for power-domains Lucas Stach
2020-09-30 16:14 ` Marek Vasut
2020-09-30 16:20 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 06/11] soc: imx: gpcv2: allow domains without power-sequence control Lucas Stach
2020-10-09 7:54 ` Jacky Bai
2020-10-09 7:57 ` Jacky Bai
2020-09-30 15:50 ` [PATCH 07/11] soc: imx: gpcv2: add support for optional resets Lucas Stach
2020-09-30 16:15 ` Marek Vasut
2020-09-30 16:23 ` Lucas Stach
2020-09-30 16:30 ` Marek Vasut
2020-09-30 16:34 ` Lucas Stach
2020-09-30 16:38 ` Marek Vasut
2020-10-01 8:59 ` Krzysztof Kozlowski
2020-10-06 19:42 ` Rob Herring
2020-09-30 15:50 ` [PATCH 08/11] dt-bindings: add defines for i.MX8MM power domains Lucas Stach
2020-10-01 8:54 ` Krzysztof Kozlowski
2020-10-06 19:47 ` Rob Herring
2020-09-30 15:50 ` [PATCH 09/11] soc: imx: gpcv2: add support " Lucas Stach
2020-09-30 16:18 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 10/11] arm64: dts: imx8mm: add GPC node and " Lucas Stach
2020-09-30 16:20 ` Marek Vasut
2020-10-01 8:51 ` Krzysztof Kozlowski
2020-10-23 13:22 ` Adam Ford
2020-10-23 14:39 ` Jacky Bai
2020-10-26 10:56 ` Abel Vesa
2020-10-26 11:01 ` Abel Vesa
2020-10-26 11:13 ` Adam Ford
2020-10-26 11:02 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 11/11] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2020-10-01 7:46 ` [PATCH 00/11] i.MX8MM power domain support Frieder Schrempf
2020-10-03 18:03 ` Adam Ford
[not found] ` <CAHCN7xKjWEwQr9y0QLrR6KVT=ut=v=coqt4beAvrz1kQSGbX1g@mail.gmail.com>
2020-10-03 18:08 ` Marek Vasut
2020-10-03 18:11 ` Adam Ford
2020-10-08 20:47 ` Adam Ford
2020-10-09 3:00 ` Jacky Bai
2020-10-09 11:12 ` Lucas Stach
2020-10-09 12:57 ` Adam Ford
2020-10-10 2:16 ` Jacky Bai
2020-10-13 18:26 ` Lucas Stach
2020-10-14 1:23 ` Peng Fan
2020-10-22 8:24 ` Lucas Stach
2020-10-22 16:36 ` Fabio Estevam
2020-10-28 13:50 ` Peng Fan
2020-10-31 13:56 ` Adam Ford
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