From: Jacky Bai <ping.bai@nxp.com>
To: Lucas Stach <l.stach@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: dl-linux-imx <linux-imx@nxp.com>,
Fabio Estevam <festevam@gmail.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Marek Vasut <marex@denx.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"patchwork-lst@pengutronix.de" <patchwork-lst@pengutronix.de>
Subject: RE: [PATCH 06/11] soc: imx: gpcv2: allow domains without power-sequence control
Date: Fri, 9 Oct 2020 07:57:36 +0000 [thread overview]
Message-ID: <AM0PR04MB4915BCE944298083EE04EA1C87080@AM0PR04MB4915.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <AM0PR04MB491542FC0615C59FB36F7B8E87080@AM0PR04MB4915.eurprd04.prod.outlook.com>
Sorry, my fault, ignore this comment.
BR
Jacky Bai
> -----Original Message-----
> From: Jacky Bai
> Sent: Friday, October 9, 2020 3:54 PM
> To: Lucas Stach <l.stach@pengutronix.de>; Shawn Guo
> <shawnguo@kernel.org>; Rob Herring <robh+dt@kernel.org>
> Cc: dl-linux-imx <linux-imx@nxp.com>; Fabio Estevam
> <festevam@gmail.com>; Frieder Schrempf <frieder.schrempf@kontron.de>;
> Marek Vasut <marex@denx.de>; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; kernel@pengutronix.de;
> patchwork-lst@pengutronix.de
> Subject: RE: [PATCH 06/11] soc: imx: gpcv2: allow domains without
> power-sequence control
>
> > -----Original Message-----
> > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > Sent: Wednesday, September 30, 2020 11:50 PM
> > To: Shawn Guo <shawnguo@kernel.org>; Rob Herring
> <robh+dt@kernel.org>
> > Cc: dl-linux-imx <linux-imx@nxp.com>; Fabio Estevam
> > <festevam@gmail.com>; Frieder Schrempf <frieder.schrempf@kontron.de>;
> > Marek Vasut <marex@denx.de>; linux-arm-kernel@lists.infradead.org;
> > devicetree@vger.kernel.org; kernel@pengutronix.de;
> > patchwork-lst@pengutronix.de
> > Subject: [PATCH 06/11] soc: imx: gpcv2: allow domains without
> > power-sequence control
> >
> > Some of the PGC domains only control the handshake with the ADB400 and
> > don't have any power sequence controls. Make such domains work by
> > allowing the pxx and map bits to be empty and skip all actions using
> > those controls.
> >
> > Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> > ---
> > drivers/soc/imx/gpcv2.c | 89
> > +++++++++++++++++++++++------------------
> > 1 file changed, 49 insertions(+), 40 deletions(-)
> >
> > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index
> > 5bb7b1cc7c10..db93fef0c76b 100644
> > --- a/drivers/soc/imx/gpcv2.c
> > +++ b/drivers/soc/imx/gpcv2.c
> > @@ -167,24 +167,27 @@ static int imx_pgc_power_up(struct
> > generic_pm_domain *genpd)
> > }
> > }
> >
> > - /* request the domain to power up */
> > - regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
> > - domain->bits.pxx, domain->bits.pxx);
> > - /*
> > - * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> > - * for PUP_REQ/PDN_REQ bit to be cleared
> > - */
> > - ret = regmap_read_poll_timeout(domain->regmap,
> > GPC_PU_PGC_SW_PUP_REQ,
> > - reg_val, !(reg_val & domain->bits.pxx),
> > - 0, USEC_PER_MSEC);
> > - if (ret) {
> > - dev_err(domain->dev, "failed to command PGC\n");
> > - goto out_clk_disable;
> > - }
> > + if (domain->bits.pxx) {
>
> What if the power domain's PUP/PDN control bit define is zero, for example,
> IMX8M_MIPI_SW_Pxx_REQ?
>
> BR
> Jacky Bai
>
> > + /* request the domain to power up */
> > + regmap_update_bits(domain->regmap,
> > GPC_PU_PGC_SW_PUP_REQ,
> > + domain->bits.pxx, domain->bits.pxx);
> > + /*
> > + * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> > + * for PUP_REQ/PDN_REQ bit to be cleared
> > + */
> > + ret = regmap_read_poll_timeout(domain->regmap,
> > + GPC_PU_PGC_SW_PUP_REQ, reg_val,
> > + !(reg_val & domain->bits.pxx),
> > + 0, USEC_PER_MSEC);
> > + if (ret) {
> > + dev_err(domain->dev, "failed to command PGC\n");
> > + goto out_clk_disable;
> > + }
> >
> > - /* disable power control */
> > - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
> > - GPC_PGC_CTRL_PCR, 0);
> > + /* disable power control */
> > + regmap_update_bits(domain->regmap,
> > GPC_PGC_CTRL(domain->pgc),
> > + GPC_PGC_CTRL_PCR, 0);
> > + }
> >
> > /* request the ADB400 to power up */
> > if (domain->bits.hskreq) {
> > @@ -248,23 +251,26 @@ static int imx_pgc_power_down(struct
> > generic_pm_domain *genpd)
> > }
> > }
> >
> > - /* enable power control */
> > - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
> > - GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR);
> > -
> > - /* request the domain to power down */
> > - regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ,
> > - domain->bits.pxx, domain->bits.pxx);
> > - /*
> > - * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> > - * for PUP_REQ/PDN_REQ bit to be cleared
> > - */
> > - ret = regmap_read_poll_timeout(domain->regmap,
> > GPC_PU_PGC_SW_PDN_REQ,
> > - reg_val, !(reg_val & domain->bits.pxx),
> > - 0, USEC_PER_MSEC);
> > - if (ret) {
> > - dev_err(domain->dev, "failed to command PGC\n");
> > - goto out_clk_disable;
> > + if (domain->bits.pxx) {
> > + /* enable power control */
> > + regmap_update_bits(domain->regmap,
> > GPC_PGC_CTRL(domain->pgc),
> > + GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR);
> > +
> > + /* request the domain to power down */
> > + regmap_update_bits(domain->regmap,
> > GPC_PU_PGC_SW_PDN_REQ,
> > + domain->bits.pxx, domain->bits.pxx);
> > + /*
> > + * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> > + * for PUP_REQ/PDN_REQ bit to be cleared
> > + */
> > + ret = regmap_read_poll_timeout(domain->regmap,
> > + GPC_PU_PGC_SW_PDN_REQ, reg_val,
> > + !(reg_val & domain->bits.pxx),
> > + 0, USEC_PER_MSEC);
> > + if (ret) {
> > + dev_err(domain->dev, "failed to command PGC\n");
> > + goto out_clk_disable;
> > + }
> > }
> >
> > /* Disable reset clocks for all devices in the domain */ @@ -580,8
> > +586,9 @@ static int imx_pgc_domain_probe(struct platform_device
> > +*pdev)
> >
> > pm_runtime_enable(domain->dev);
> >
> > - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> > - domain->bits.map, domain->bits.map);
> > + if (domain->bits.map)
> > + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> > + domain->bits.map, domain->bits.map);
> >
> > ret = pm_genpd_init(&domain->genpd, NULL, true);
> > if (ret) {
> > @@ -601,8 +608,9 @@ static int imx_pgc_domain_probe(struct
> > platform_device *pdev)
> > out_genpd_remove:
> > pm_genpd_remove(&domain->genpd);
> > out_domain_unmap:
> > - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> > - domain->bits.map, 0);
> > + if (domain->bits.map)
> > + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> > + domain->bits.map, 0);
> > pm_runtime_disable(domain->dev);
> > imx_pgc_put_clocks(domain);
> >
> > @@ -616,8 +624,9 @@ static int imx_pgc_domain_remove(struct
> > platform_device *pdev)
> > of_genpd_del_provider(domain->dev->of_node);
> > pm_genpd_remove(&domain->genpd);
> >
> > - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> > - domain->bits.map, 0);
> > + if (domain->bits.map)
> > + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> > + domain->bits.map, 0);
> >
> > pm_runtime_disable(domain->dev);
> >
> > --
> > 2.20.1
next prev parent reply other threads:[~2020-10-09 7:57 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 15:49 [PATCH 00/11] i.MX8MM power domain support Lucas Stach
2020-09-30 15:49 ` [PATCH 01/11] soc: imx: gpcv2: move to more ideomatic error handling in probe Lucas Stach
2020-09-30 16:04 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 02/11] soc: imx: gpcv2: move domain mapping to domain driver probe Lucas Stach
2020-09-30 16:07 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 03/11] soc: imx: gpcv2: split power up and power down sequence control Lucas Stach
2020-09-30 16:10 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 04/11] soc: imx: gpcv2: wait for ADB400 handshake Lucas Stach
2020-09-30 16:11 ` Marek Vasut
2020-09-30 16:19 ` Lucas Stach
2020-09-30 16:23 ` Marek Vasut
2020-10-09 3:05 ` Jacky Bai
2020-10-09 7:27 ` Marek Vasut
2020-10-09 7:51 ` Jacky Bai
2020-10-09 8:19 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 05/11] soc: imx: gpcv2: add runtime PM support for power-domains Lucas Stach
2020-09-30 16:14 ` Marek Vasut
2020-09-30 16:20 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 06/11] soc: imx: gpcv2: allow domains without power-sequence control Lucas Stach
2020-10-09 7:54 ` Jacky Bai
2020-10-09 7:57 ` Jacky Bai [this message]
2020-09-30 15:50 ` [PATCH 07/11] soc: imx: gpcv2: add support for optional resets Lucas Stach
2020-09-30 16:15 ` Marek Vasut
2020-09-30 16:23 ` Lucas Stach
2020-09-30 16:30 ` Marek Vasut
2020-09-30 16:34 ` Lucas Stach
2020-09-30 16:38 ` Marek Vasut
2020-10-01 8:59 ` Krzysztof Kozlowski
2020-10-06 19:42 ` Rob Herring
2020-09-30 15:50 ` [PATCH 08/11] dt-bindings: add defines for i.MX8MM power domains Lucas Stach
2020-10-01 8:54 ` Krzysztof Kozlowski
2020-10-06 19:47 ` Rob Herring
2020-09-30 15:50 ` [PATCH 09/11] soc: imx: gpcv2: add support " Lucas Stach
2020-09-30 16:18 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 10/11] arm64: dts: imx8mm: add GPC node and " Lucas Stach
2020-09-30 16:20 ` Marek Vasut
2020-10-01 8:51 ` Krzysztof Kozlowski
2020-10-23 13:22 ` Adam Ford
2020-10-23 14:39 ` Jacky Bai
2020-10-26 10:56 ` Abel Vesa
2020-10-26 11:01 ` Abel Vesa
2020-10-26 11:13 ` Adam Ford
2020-10-26 11:02 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 11/11] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2020-10-01 7:46 ` [PATCH 00/11] i.MX8MM power domain support Frieder Schrempf
2020-10-03 18:03 ` Adam Ford
[not found] ` <CAHCN7xKjWEwQr9y0QLrR6KVT=ut=v=coqt4beAvrz1kQSGbX1g@mail.gmail.com>
2020-10-03 18:08 ` Marek Vasut
2020-10-03 18:11 ` Adam Ford
2020-10-08 20:47 ` Adam Ford
2020-10-09 3:00 ` Jacky Bai
2020-10-09 11:12 ` Lucas Stach
2020-10-09 12:57 ` Adam Ford
2020-10-10 2:16 ` Jacky Bai
2020-10-13 18:26 ` Lucas Stach
2020-10-14 1:23 ` Peng Fan
2020-10-22 8:24 ` Lucas Stach
2020-10-22 16:36 ` Fabio Estevam
2020-10-28 13:50 ` Peng Fan
2020-10-31 13:56 ` Adam Ford
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