From: Damien Le Moal <damien.lemoal@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
devicetree@vger.kernel.org, Serge Semin <fancer.lancer@gmail.com>,
Mark Brown <broonie@kernel.org>,
linux-spi@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sean Anderson <seanga2@gmail.com>
Subject: [PATCH 19/32] riscv: Add Kendryte K210 SoC reset controller
Date: Sat, 7 Nov 2020 17:14:07 +0900 [thread overview]
Message-ID: <20201107081420.60325-20-damien.lemoal@wdc.com> (raw)
In-Reply-To: <20201107081420.60325-1-damien.lemoal@wdc.com>
Add a reset controller driver for the Kendryte K210 SoC. This driver
relies on its syscon compatible parent node for its register mapping.
Automatically select this driver for compilation when the SOC_KENDRYTE
option is selected.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
arch/riscv/Kconfig.socs | 3 +
drivers/reset/Kconfig | 9 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-k210.c | 186 +++++++++++++++++++++++++++++++++++++
4 files changed, 199 insertions(+)
create mode 100644 drivers/reset/reset-k210.c
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index a4c851ffc6b0..4d8e66d0556a 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -31,6 +31,9 @@ config SOC_KENDRYTE
select SIFIVE_PLIC
select SOC_K210
select CLK_K210
+ select ARCH_HAS_RESET_CONTROLLER
+ select RESET_CONTROLLER
+ select RESET_K210
help
This enables support for Kendryte K210 SoC platform hardware.
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 07d162b179fc..c943051b5fc8 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -245,6 +245,15 @@ config RESET_ZYNQ
help
This enables the reset controller driver for Xilinx Zynq SoCs.
+config RESET_K210
+ bool "Reset controller driver for Kendryte K210 SoC"
+ depends on RISCV && SOC_KENDRYTE
+ depends on OF && MFD_SYSCON
+ help
+ Support for the Kendryte K210 RISC-V SoC reset controller. If
+ Say Y if you want to control reset signals provided by this
+ controller.
+
source "drivers/reset/sti/Kconfig"
source "drivers/reset/hisilicon/Kconfig"
source "drivers/reset/tegra/Kconfig"
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 16947610cc3b..1730a31e6871 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -33,4 +33,5 @@ obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o
obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o
+obj-$(CONFIG_RESET_K210) += reset-k210.o
diff --git a/drivers/reset/reset-k210.c b/drivers/reset/reset-k210.c
new file mode 100644
index 000000000000..b6401aef2923
--- /dev/null
+++ b/drivers/reset/reset-k210.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ */
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/delay.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+
+#include <dt-bindings/mfd/k210-sysctl.h>
+#include <dt-bindings/reset/k210-rst.h>
+
+struct k210_rst {
+ struct regmap *map;
+ u32 offset;
+ u32 mask;
+ u32 assert_high;
+ struct reset_controller_dev rcdev;
+};
+
+static inline struct k210_rst *
+to_k210_rst(struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct k210_rst, rcdev);
+}
+
+static inline int k210_rst_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct k210_rst *ksr = to_k210_rst(rcdev);
+ u32 bit = BIT(id);
+
+ if (!(bit & ksr->mask)) {
+ dev_err(rcdev->dev, "Invalid assert id %lu\n", id);
+ return -EINVAL;
+ }
+
+ dev_dbg(rcdev->dev, "assert %s %lu\n",
+ ksr->assert_high ? "high" : "low", id);
+
+ regmap_update_bits(ksr->map, ksr->offset, bit,
+ ksr->assert_high ? bit : 0);
+
+ return 0;
+}
+
+static inline int k210_rst_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct k210_rst *ksr = to_k210_rst(rcdev);
+ u32 bit = BIT(id);
+
+ if (!(bit & ksr->mask)) {
+ dev_err(rcdev->dev, "Invalid deassert id %lu\n", id);
+ return -EINVAL;
+ }
+
+ dev_dbg(rcdev->dev, "deassert %s %lu\n",
+ ksr->assert_high ? "high" : "low", id);
+
+ regmap_update_bits(ksr->map, ksr->offset, bit,
+ ksr->assert_high ? 0 : bit);
+
+ return 0;
+}
+
+static int k210_rst_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct k210_rst *ksr = to_k210_rst(rcdev);
+ int ret;
+
+ dev_dbg(rcdev->dev, "reset %s %lu\n",
+ ksr->assert_high ? "high" : "low", id);
+
+ ret = k210_rst_assert(rcdev, id);
+ if (ret == 0) {
+ udelay(10);
+ ret = k210_rst_deassert(rcdev, id);
+ }
+
+ return ret;
+}
+
+static int k210_rst_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct k210_rst *ksr = to_k210_rst(rcdev);
+ u32 reg, bit = BIT(id);
+ int ret;
+
+ if (!(bit & ksr->mask)) {
+ dev_err(rcdev->dev, "Invalid reset %lx\n", id);
+ return -EINVAL;
+ }
+
+ ret = regmap_read(ksr->map, ksr->offset, ®);
+ if (ret)
+ return ret;
+
+ if (ksr->assert_high)
+ return ret & bit;
+
+ return !(ret & bit);
+}
+
+static const struct reset_control_ops k210_rst_ops = {
+ .assert = k210_rst_assert,
+ .deassert = k210_rst_deassert,
+ .reset = k210_rst_reset,
+ .status = k210_rst_status,
+};
+
+static int __init k210_rst_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct k210_rst *ksr;
+ int ret, nr_resets;
+
+ dev_info(dev, "K210 reset controller\n");
+
+ ksr = devm_kzalloc(dev, sizeof(*ksr), GFP_KERNEL);
+ if (!ksr)
+ return -ENOMEM;
+
+ ksr->map = syscon_regmap_lookup_by_phandle(dev->of_node, "regmap");
+ if (IS_ERR(ksr->map)) {
+ ksr->map = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(ksr->map)) {
+ dev_err(dev, "get register map failed\n");
+ return PTR_ERR(ksr->map);
+ }
+ }
+
+ ret = of_property_read_u32(dev->of_node, "offset", &ksr->offset);
+ ret = of_property_read_u32(dev->of_node, "assert-high",
+ &ksr->assert_high);
+ if (ret) {
+ dev_err(dev, "unable to read 'offset' and 'assert-high'\n");
+ return -EINVAL;
+ }
+
+ ret = of_property_read_u32(dev->of_node, "mask", &ksr->mask);
+ if (ret) {
+ /* Use default mask */
+ ksr->mask = 0x27FFFFFF;
+ }
+ nr_resets = fls(ksr->mask);
+ if (!nr_resets) {
+ dev_err(dev, "Invalid mask 0x%08x\n", ksr->mask);
+ return -EINVAL;
+ }
+
+ ksr->rcdev.owner = THIS_MODULE;
+ ksr->rcdev.dev = dev;
+ ksr->rcdev.of_node = dev->of_node;
+ ksr->rcdev.nr_resets = nr_resets;
+ ksr->rcdev.ops = &k210_rst_ops;
+
+ return devm_reset_controller_register(dev, &ksr->rcdev);
+}
+
+static const struct of_device_id k210_rst_dt_ids[] = {
+ { .compatible = "kendryte,k210-rst" },
+};
+
+static struct platform_driver k210_rst_driver = {
+ .probe = k210_rst_probe,
+ .driver = {
+ .name = "k210-rst",
+ .of_match_table = k210_rst_dt_ids,
+ },
+};
+
+/*
+ * Most devices on the K210 SoC need reset as part of their initialization.
+ * So initialize this driver early as part of the post core initialization.
+ */
+static int __init k210_rst_init(void)
+{
+ return platform_driver_register(&k210_rst_driver);
+}
+postcore_initcall(k210_rst_init);
--
2.28.0
next prev parent reply other threads:[~2020-11-07 8:15 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-07 8:13 [PATCH 00/32] RISC-V Kendryte K210 support improvments Damien Le Moal
2020-11-07 8:13 ` [PATCH 01/32] of: Fix property supplier parsing Damien Le Moal
2020-11-09 15:05 ` Serge Semin
2020-11-09 15:14 ` Andy Shevchenko
2020-11-09 17:44 ` Serge Semin
2020-11-09 20:52 ` Rob Herring
2020-11-16 7:30 ` Damien Le Moal
2020-11-16 22:06 ` Serge Semin
2020-11-07 8:13 ` [PATCH 02/32] spi: dw: Add support for 32-bits ctrlr0 layout Damien Le Moal
2020-11-07 13:28 ` Sean Anderson
2020-11-09 14:25 ` Serge Semin
2020-11-09 14:33 ` Sean Anderson
2020-11-09 14:35 ` Sean Anderson
2020-11-09 14:40 ` Andy Shevchenko
2020-11-09 14:41 ` Andy Shevchenko
2020-11-09 14:49 ` Sean Anderson
2020-11-09 15:10 ` Andy Shevchenko
2020-11-09 14:36 ` Andy Shevchenko
2020-11-09 17:56 ` Serge Semin
2020-11-07 8:13 ` [PATCH 03/32] spi: dw: Fix driving MOSI low while recieving Damien Le Moal
2020-11-07 13:30 ` Sean Anderson
2020-11-09 13:29 ` Mark Brown
2020-11-09 13:47 ` Sean Anderson
2020-11-09 14:14 ` Mark Brown
2020-11-09 14:48 ` Serge Semin
2020-11-09 16:45 ` Mark Brown
2020-11-09 19:19 ` Serge Semin
2020-11-09 19:40 ` Sean Anderson
2020-11-09 20:17 ` Serge Semin
2020-11-09 20:29 ` Mark Brown
2020-11-09 20:20 ` Mark Brown
2020-11-09 21:05 ` Serge Semin
2020-11-10 13:43 ` Mark Brown
2020-11-07 8:13 ` [PATCH 04/32] spi: dw: Introduce polling device tree property Damien Le Moal
2020-11-09 16:04 ` Mark Brown
2020-11-09 19:59 ` Serge Semin
2020-11-07 8:13 ` [PATCH 05/32] spi: dw: Introduce DW_SPI_CAP_POLL_NODELAY Damien Le Moal
2020-11-09 14:03 ` Mark Brown
2020-11-09 20:45 ` Serge Semin
2020-11-07 8:13 ` [PATCH 06/32] spi: dw: Add support for the Kendryte K210 SoC Damien Le Moal
2020-11-07 13:31 ` Sean Anderson
2020-11-07 13:42 ` Damien Le Moal
2020-11-07 13:52 ` Sean Anderson
2020-11-09 14:15 ` Mark Brown
2020-11-09 21:21 ` Serge Semin
2020-11-09 21:39 ` Damien Le Moal
2020-11-09 21:55 ` Rob Herring
2020-11-09 22:00 ` Damien Le Moal
2020-11-09 23:07 ` Rob Herring
2020-11-10 0:35 ` Damien Le Moal
2020-11-07 8:13 ` [PATCH 07/32] dt-bindings: Update DW SPI device tree bindings Damien Le Moal
2020-11-07 8:13 ` [PATCH 08/32] riscv: Fix kernel time_init() Damien Le Moal
2020-11-12 7:21 ` Atish Patra
2020-11-13 7:31 ` Stephen Boyd
2020-11-13 7:40 ` Damien Le Moal
2020-11-13 7:53 ` Stephen Boyd
2020-11-13 7:57 ` Damien Le Moal
2020-11-13 8:11 ` Stephen Boyd
2020-11-13 8:23 ` Damien Le Moal
2020-11-16 7:06 ` Stephen Boyd
2020-11-07 8:13 ` [PATCH 09/32] riscv: Fix SiFive gpio probe Damien Le Moal
2020-11-10 14:39 ` Linus Walleij
2020-11-07 8:13 ` [PATCH 10/32] riscv: Fix sifive serial driver Damien Le Moal
2020-11-07 8:13 ` [PATCH 11/32] riscv: Enable interrupts during syscalls with M-Mode Damien Le Moal
2020-11-07 8:14 ` [PATCH 12/32] riscv: Automatically select sysctl config options Damien Le Moal
2020-11-07 8:14 ` [PATCH 13/32] riscv: Fix builtin DTB handling Damien Le Moal
2020-11-15 4:17 ` kernel test robot
2020-11-07 8:14 ` [PATCH 14/32] dt-bindings: Define all Kendryte K210 clock IDs Damien Le Moal
2020-11-07 13:33 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 15/32] dt-bindings: Define Kendryte K210 sysctl registers Damien Le Moal
2020-11-07 13:34 ` Sean Anderson
2020-11-09 21:59 ` Rob Herring
2020-11-09 22:10 ` Sean Anderson
2020-11-09 23:01 ` Rob Herring
2020-11-07 8:14 ` [PATCH 16/32] dt-bindings: Define Kendryte K210 pin functions Damien Le Moal
2020-11-07 13:38 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 17/32] dt-bindings: Define Kendryte K210 reset signals Damien Le Moal
2020-11-07 13:38 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 18/32] riscv: Add Kendryte K210 SoC clock driver Damien Le Moal
2020-11-07 13:48 ` Sean Anderson
2020-11-07 8:14 ` Damien Le Moal [this message]
2020-11-07 13:58 ` [PATCH 19/32] riscv: Add Kendryte K210 SoC reset controller Sean Anderson
2020-11-07 8:14 ` [PATCH 20/32] riscv: Add Kendryte K210 FPIOA pinctrl driver Damien Le Moal
2020-11-09 18:48 ` kernel test robot
2020-11-15 0:28 ` kernel test robot
2020-11-24 8:43 ` Linus Walleij
2020-11-24 8:53 ` Damien Le Moal
2020-11-29 21:33 ` Linus Walleij
2020-11-30 3:13 ` Damien Le Moal
2020-11-30 7:05 ` Serge Semin
2020-11-30 7:27 ` Damien Le Moal
2020-11-24 8:56 ` Damien Le Moal
2020-11-07 8:14 ` [PATCH 21/32] dt-bindings: Add Kendryte and Canaan vendor prefix Damien Le Moal
2020-11-07 14:03 ` Sean Anderson
2020-11-13 8:17 ` Damien Le Moal
2020-11-09 22:01 ` Rob Herring
2020-11-09 22:04 ` Damien Le Moal
2020-11-07 8:14 ` [PATCH 22/32] dt-binding: Document kendryte,k210-sysctl bindings Damien Le Moal
2020-11-07 14:05 ` Sean Anderson
2020-11-09 15:32 ` Rob Herring
2020-11-07 8:14 ` [PATCH 23/32] dt-binding: Document kendryte,k210-clk bindings Damien Le Moal
2020-11-07 14:05 ` Sean Anderson
2020-11-09 21:58 ` Rob Herring
2020-11-07 8:14 ` [PATCH 24/32] dt-bindings: Document kendryte,k210-fpioa bindings Damien Le Moal
2020-11-07 14:06 ` Sean Anderson
2020-11-09 15:32 ` Rob Herring
2020-11-09 15:36 ` Rob Herring
2020-11-09 15:45 ` Sean Anderson
2020-11-11 14:32 ` Rob Herring
2020-11-11 15:06 ` Damien Le Moal
2020-11-12 11:03 ` Damien Le Moal
2020-11-19 10:57 ` Geert Uytterhoeven
2020-11-19 11:22 ` Damien Le Moal
2020-11-07 8:14 ` [PATCH 25/32] dt-bindings: Document kendryte,k210-rst bindings Damien Le Moal
2020-11-07 14:07 ` Sean Anderson
2020-11-09 15:37 ` Rob Herring
2020-11-09 15:41 ` Rob Herring
2020-11-07 8:14 ` [PATCH 26/32] riscv: Update Kendryte K210 device tree Damien Le Moal
2020-11-07 14:08 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 27/32] riscv: Add SiPeed MAIX BiT board " Damien Le Moal
2020-11-07 14:13 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 28/32] riscv: Add SiPeed MAIX DOCK " Damien Le Moal
2020-11-07 8:14 ` [PATCH 29/32] riscv: Add SiPeed MAIX GO " Damien Le Moal
2020-11-07 8:14 ` [PATCH 30/32] riscv: Add SiPeed MAIXDUINO " Damien Le Moal
2020-11-07 14:14 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 31/32] riscv: Add Kendryte KD233 " Damien Le Moal
2020-11-07 8:14 ` [PATCH 32/32] riscv: Update Kendryte K210 defconfig Damien Le Moal
2020-11-09 12:51 ` [PATCH 00/32] RISC-V Kendryte K210 support improvments Mark Brown
2020-11-09 12:55 ` Damien Le Moal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201107081420.60325-20-damien.lemoal@wdc.com \
--to=damien.lemoal@wdc.com \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=fancer.lancer@gmail.com \
--cc=frowand.list@gmail.com \
--cc=linus.walleij@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=seanga2@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).