From: Damien Le Moal <damien.lemoal@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
devicetree@vger.kernel.org, Serge Semin <fancer.lancer@gmail.com>,
Mark Brown <broonie@kernel.org>,
linux-spi@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sean Anderson <seanga2@gmail.com>
Subject: [PATCH 02/32] spi: dw: Add support for 32-bits ctrlr0 layout
Date: Sat, 7 Nov 2020 17:13:50 +0900 [thread overview]
Message-ID: <20201107081420.60325-3-damien.lemoal@wdc.com> (raw)
In-Reply-To: <20201107081420.60325-1-damien.lemoal@wdc.com>
Synopsis DesignWare DW_apb_ssi version 4 defines a 32-bit layout of
the ctrlr0 register for SPI masters. The layout of ctrlr0 is:
| 31 .. 23 | 22 .. 21 | 20 .. 16 |
| other stuff | spi_frf | dfs_32 |
| 15 .. 10 | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff | tmod | mode | frf | dfs |
Th main difference of this layout with the 16-bits version is the data
frame format field which resides in bits 16..20 instead of bits 3..0.
Introduce the DW SPI capability flag DW_SPI_CAP_DFS_32 to let a
platform signal that this layout is in use. Modify
dw_spi_update_config() to test this capability flag to set the data
frame format field at the correct register location.
Suggested-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
drivers/spi/spi-dw-core.c | 8 ++++++--
drivers/spi/spi-dw.h | 9 +++++++++
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 2e50cc0a9291..841c85247f01 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -311,8 +311,12 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi,
u32 speed_hz;
u16 clk_div;
- /* CTRLR0[ 4/3: 0] Data Frame Size */
- cr0 |= (cfg->dfs - 1);
+ if (!(dws->caps & DW_SPI_CAP_DFS_32))
+ /* CTRLR0[ 4/3: 0] Data Frame Size */
+ cr0 |= (cfg->dfs - 1);
+ else
+ /* CTRLR0[20: 16] Data Frame Size */
+ cr0 |= (cfg->dfs - 1) << DWC_APB_CTRLR0_32_DFS_OFFSET;
if (!(dws->caps & DW_SPI_CAP_DWC_SSI))
/* CTRLR0[ 9:8] Transfer Mode */
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index faf40cb66498..48a11a51a407 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -9,6 +9,7 @@
#include <linux/io.h>
#include <linux/scatterlist.h>
#include <linux/spi/spi-mem.h>
+#include <linux/bitfield.h>
/* Register offsets */
#define DW_SPI_CTRLR0 0x00
@@ -72,6 +73,13 @@
#define DWC_SSI_CTRLR0_FRF_OFFSET 6
#define DWC_SSI_CTRLR0_DFS_OFFSET 0
+/*
+ * Bit fields in CTRLR0 for DWC_apb_ssi v4 32-bits ctrlr0.
+ * Based on DW_apb_ssi Databook v4.02a.
+ */
+#define DWC_APB_CTRLR0_32_DFS_OFFSET 16
+#define DWC_APB_CTRLR0_32_DFS_MASK GENMASK(20, 16)
+
/*
* For Keem Bay, CTRLR0[31] is used to select controller mode.
* 0: SSI is slave
@@ -121,6 +129,7 @@ enum dw_ssi_type {
#define DW_SPI_CAP_CS_OVERRIDE BIT(0)
#define DW_SPI_CAP_KEEMBAY_MST BIT(1)
#define DW_SPI_CAP_DWC_SSI BIT(2)
+#define DW_SPI_CAP_DFS_32 BIT(3)
/* Slave spi_transfer/spi_mem_op related */
struct dw_spi_cfg {
--
2.28.0
next prev parent reply other threads:[~2020-11-07 8:14 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-07 8:13 [PATCH 00/32] RISC-V Kendryte K210 support improvments Damien Le Moal
2020-11-07 8:13 ` [PATCH 01/32] of: Fix property supplier parsing Damien Le Moal
2020-11-09 15:05 ` Serge Semin
2020-11-09 15:14 ` Andy Shevchenko
2020-11-09 17:44 ` Serge Semin
2020-11-09 20:52 ` Rob Herring
2020-11-16 7:30 ` Damien Le Moal
2020-11-16 22:06 ` Serge Semin
2020-11-07 8:13 ` Damien Le Moal [this message]
2020-11-07 13:28 ` [PATCH 02/32] spi: dw: Add support for 32-bits ctrlr0 layout Sean Anderson
2020-11-09 14:25 ` Serge Semin
2020-11-09 14:33 ` Sean Anderson
2020-11-09 14:35 ` Sean Anderson
2020-11-09 14:40 ` Andy Shevchenko
2020-11-09 14:41 ` Andy Shevchenko
2020-11-09 14:49 ` Sean Anderson
2020-11-09 15:10 ` Andy Shevchenko
2020-11-09 14:36 ` Andy Shevchenko
2020-11-09 17:56 ` Serge Semin
2020-11-07 8:13 ` [PATCH 03/32] spi: dw: Fix driving MOSI low while recieving Damien Le Moal
2020-11-07 13:30 ` Sean Anderson
2020-11-09 13:29 ` Mark Brown
2020-11-09 13:47 ` Sean Anderson
2020-11-09 14:14 ` Mark Brown
2020-11-09 14:48 ` Serge Semin
2020-11-09 16:45 ` Mark Brown
2020-11-09 19:19 ` Serge Semin
2020-11-09 19:40 ` Sean Anderson
2020-11-09 20:17 ` Serge Semin
2020-11-09 20:29 ` Mark Brown
2020-11-09 20:20 ` Mark Brown
2020-11-09 21:05 ` Serge Semin
2020-11-10 13:43 ` Mark Brown
2020-11-07 8:13 ` [PATCH 04/32] spi: dw: Introduce polling device tree property Damien Le Moal
2020-11-09 16:04 ` Mark Brown
2020-11-09 19:59 ` Serge Semin
2020-11-07 8:13 ` [PATCH 05/32] spi: dw: Introduce DW_SPI_CAP_POLL_NODELAY Damien Le Moal
2020-11-09 14:03 ` Mark Brown
2020-11-09 20:45 ` Serge Semin
2020-11-07 8:13 ` [PATCH 06/32] spi: dw: Add support for the Kendryte K210 SoC Damien Le Moal
2020-11-07 13:31 ` Sean Anderson
2020-11-07 13:42 ` Damien Le Moal
2020-11-07 13:52 ` Sean Anderson
2020-11-09 14:15 ` Mark Brown
2020-11-09 21:21 ` Serge Semin
2020-11-09 21:39 ` Damien Le Moal
2020-11-09 21:55 ` Rob Herring
2020-11-09 22:00 ` Damien Le Moal
2020-11-09 23:07 ` Rob Herring
2020-11-10 0:35 ` Damien Le Moal
2020-11-07 8:13 ` [PATCH 07/32] dt-bindings: Update DW SPI device tree bindings Damien Le Moal
2020-11-07 8:13 ` [PATCH 08/32] riscv: Fix kernel time_init() Damien Le Moal
2020-11-12 7:21 ` Atish Patra
2020-11-13 7:31 ` Stephen Boyd
2020-11-13 7:40 ` Damien Le Moal
2020-11-13 7:53 ` Stephen Boyd
2020-11-13 7:57 ` Damien Le Moal
2020-11-13 8:11 ` Stephen Boyd
2020-11-13 8:23 ` Damien Le Moal
2020-11-16 7:06 ` Stephen Boyd
2020-11-07 8:13 ` [PATCH 09/32] riscv: Fix SiFive gpio probe Damien Le Moal
2020-11-10 14:39 ` Linus Walleij
2020-11-07 8:13 ` [PATCH 10/32] riscv: Fix sifive serial driver Damien Le Moal
2020-11-07 8:13 ` [PATCH 11/32] riscv: Enable interrupts during syscalls with M-Mode Damien Le Moal
2020-11-07 8:14 ` [PATCH 12/32] riscv: Automatically select sysctl config options Damien Le Moal
2020-11-07 8:14 ` [PATCH 13/32] riscv: Fix builtin DTB handling Damien Le Moal
2020-11-15 4:17 ` kernel test robot
2020-11-07 8:14 ` [PATCH 14/32] dt-bindings: Define all Kendryte K210 clock IDs Damien Le Moal
2020-11-07 13:33 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 15/32] dt-bindings: Define Kendryte K210 sysctl registers Damien Le Moal
2020-11-07 13:34 ` Sean Anderson
2020-11-09 21:59 ` Rob Herring
2020-11-09 22:10 ` Sean Anderson
2020-11-09 23:01 ` Rob Herring
2020-11-07 8:14 ` [PATCH 16/32] dt-bindings: Define Kendryte K210 pin functions Damien Le Moal
2020-11-07 13:38 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 17/32] dt-bindings: Define Kendryte K210 reset signals Damien Le Moal
2020-11-07 13:38 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 18/32] riscv: Add Kendryte K210 SoC clock driver Damien Le Moal
2020-11-07 13:48 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 19/32] riscv: Add Kendryte K210 SoC reset controller Damien Le Moal
2020-11-07 13:58 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 20/32] riscv: Add Kendryte K210 FPIOA pinctrl driver Damien Le Moal
2020-11-09 18:48 ` kernel test robot
2020-11-15 0:28 ` kernel test robot
2020-11-24 8:43 ` Linus Walleij
2020-11-24 8:53 ` Damien Le Moal
2020-11-29 21:33 ` Linus Walleij
2020-11-30 3:13 ` Damien Le Moal
2020-11-30 7:05 ` Serge Semin
2020-11-30 7:27 ` Damien Le Moal
2020-11-24 8:56 ` Damien Le Moal
2020-11-07 8:14 ` [PATCH 21/32] dt-bindings: Add Kendryte and Canaan vendor prefix Damien Le Moal
2020-11-07 14:03 ` Sean Anderson
2020-11-13 8:17 ` Damien Le Moal
2020-11-09 22:01 ` Rob Herring
2020-11-09 22:04 ` Damien Le Moal
2020-11-07 8:14 ` [PATCH 22/32] dt-binding: Document kendryte,k210-sysctl bindings Damien Le Moal
2020-11-07 14:05 ` Sean Anderson
2020-11-09 15:32 ` Rob Herring
2020-11-07 8:14 ` [PATCH 23/32] dt-binding: Document kendryte,k210-clk bindings Damien Le Moal
2020-11-07 14:05 ` Sean Anderson
2020-11-09 21:58 ` Rob Herring
2020-11-07 8:14 ` [PATCH 24/32] dt-bindings: Document kendryte,k210-fpioa bindings Damien Le Moal
2020-11-07 14:06 ` Sean Anderson
2020-11-09 15:32 ` Rob Herring
2020-11-09 15:36 ` Rob Herring
2020-11-09 15:45 ` Sean Anderson
2020-11-11 14:32 ` Rob Herring
2020-11-11 15:06 ` Damien Le Moal
2020-11-12 11:03 ` Damien Le Moal
2020-11-19 10:57 ` Geert Uytterhoeven
2020-11-19 11:22 ` Damien Le Moal
2020-11-07 8:14 ` [PATCH 25/32] dt-bindings: Document kendryte,k210-rst bindings Damien Le Moal
2020-11-07 14:07 ` Sean Anderson
2020-11-09 15:37 ` Rob Herring
2020-11-09 15:41 ` Rob Herring
2020-11-07 8:14 ` [PATCH 26/32] riscv: Update Kendryte K210 device tree Damien Le Moal
2020-11-07 14:08 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 27/32] riscv: Add SiPeed MAIX BiT board " Damien Le Moal
2020-11-07 14:13 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 28/32] riscv: Add SiPeed MAIX DOCK " Damien Le Moal
2020-11-07 8:14 ` [PATCH 29/32] riscv: Add SiPeed MAIX GO " Damien Le Moal
2020-11-07 8:14 ` [PATCH 30/32] riscv: Add SiPeed MAIXDUINO " Damien Le Moal
2020-11-07 14:14 ` Sean Anderson
2020-11-07 8:14 ` [PATCH 31/32] riscv: Add Kendryte KD233 " Damien Le Moal
2020-11-07 8:14 ` [PATCH 32/32] riscv: Update Kendryte K210 defconfig Damien Le Moal
2020-11-09 12:51 ` [PATCH 00/32] RISC-V Kendryte K210 support improvments Mark Brown
2020-11-09 12:55 ` Damien Le Moal
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