* [PATCH v2 1/4] clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical
2021-07-04 2:40 [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Shawn Guo
@ 2021-07-04 2:40 ` Shawn Guo
2021-08-06 1:53 ` Stephen Boyd
2021-07-04 2:40 ` [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name Shawn Guo
` (4 subsequent siblings)
5 siblings, 1 reply; 15+ messages in thread
From: Shawn Guo @ 2021-07-04 2:40 UTC (permalink / raw)
To: Stephen Boyd
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk, Shawn Guo
The clock source for MSM8916 cpu cores is like below.
|\
a53pll --------| \ a53mux +------+
| |------------| cpus |
gpll0_vote --------| / +------+
|/
So a53mux rather than a53pll is actually the parent clock of cpu cores.
It makes more sense to flag a53mux as critical instead, so that when
either a53pll or gpll0_vote is used by cpu cores, the clock will be kept
enabled while the other can be disabled.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/clk/qcom/a53-pll.c | 1 -
drivers/clk/qcom/apcs-msm8916.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
index af6ac17c7dae..d6756bd777ce 100644
--- a/drivers/clk/qcom/a53-pll.c
+++ b/drivers/clk/qcom/a53-pll.c
@@ -70,7 +70,6 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
init.parent_names = (const char *[]){ "xo" };
init.num_parents = 1;
init.ops = &clk_pll_sr2_ops;
- init.flags = CLK_IS_CRITICAL;
pll->clkr.hw.init = &init;
ret = devm_clk_register_regmap(dev, &pll->clkr);
diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
index cf69a97d0439..d7ac6d6b15b6 100644
--- a/drivers/clk/qcom/apcs-msm8916.c
+++ b/drivers/clk/qcom/apcs-msm8916.c
@@ -65,7 +65,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
init.parent_data = pdata;
init.num_parents = ARRAY_SIZE(pdata);
init.ops = &clk_regmap_mux_div_ops;
- init.flags = CLK_SET_RATE_PARENT;
+ init.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT;
a53cc->clkr.hw.init = &init;
a53cc->clkr.regmap = regmap;
--
2.17.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name
2021-07-04 2:40 [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Shawn Guo
2021-07-04 2:40 ` [PATCH v2 1/4] clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical Shawn Guo
@ 2021-07-04 2:40 ` Shawn Guo
2021-07-10 5:17 ` Bjorn Andersson
2021-08-06 1:53 ` Stephen Boyd
2021-07-04 2:40 ` [PATCH v2 3/4] dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support Shawn Guo
` (3 subsequent siblings)
5 siblings, 2 replies; 15+ messages in thread
From: Shawn Guo @ 2021-07-04 2:40 UTC (permalink / raw)
To: Stephen Boyd
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk, Shawn Guo
Different from MSM8916 which has only one a53pll/mux clock, MSM8939 gets
three for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache
Coherent Interconnect). That said, a53pll/mux clock needs to be named
uniquely. Append @unit-address of device node to the clock name, so
that a53pll/mux will be named like below on MSM8939.
a53pll@b016000
a53pll@b116000
a53pll@b1d0000
a53mux@b1d1000
a53mux@b011000
a53mux@b111000
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/clk/qcom/a53-pll.c | 8 +++++++-
drivers/clk/qcom/apcs-msm8916.c | 8 +++++++-
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
index d6756bd777ce..96a118be912d 100644
--- a/drivers/clk/qcom/a53-pll.c
+++ b/drivers/clk/qcom/a53-pll.c
@@ -37,6 +37,7 @@ static const struct regmap_config a53pll_regmap_config = {
static int qcom_a53pll_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
struct regmap *regmap;
struct resource *res;
struct clk_pll *pll;
@@ -66,7 +67,12 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
pll->status_bit = 16;
pll->freq_tbl = a53pll_freq;
- init.name = "a53pll";
+ /* Use an unique name by appending @unit-address */
+ init.name = devm_kasprintf(dev, GFP_KERNEL, "a53pll%s",
+ strchrnul(np->full_name, '@'));
+ if (!init.name)
+ return -ENOMEM;
+
init.parent_names = (const char *[]){ "xo" };
init.num_parents = 1;
init.ops = &clk_pll_sr2_ops;
diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
index d7ac6d6b15b6..89e0730810ac 100644
--- a/drivers/clk/qcom/apcs-msm8916.c
+++ b/drivers/clk/qcom/apcs-msm8916.c
@@ -46,6 +46,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device *parent = dev->parent;
+ struct device_node *np = parent->of_node;
struct clk_regmap_mux_div *a53cc;
struct regmap *regmap;
struct clk_init_data init = { };
@@ -61,7 +62,12 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
if (!a53cc)
return -ENOMEM;
- init.name = "a53mux";
+ /* Use an unique name by appending parent's @unit-address */
+ init.name = devm_kasprintf(dev, GFP_KERNEL, "a53mux%s",
+ strchrnul(np->full_name, '@'));
+ if (!init.name)
+ return -ENOMEM;
+
init.parent_data = pdata;
init.num_parents = ARRAY_SIZE(pdata);
init.ops = &clk_regmap_mux_div_ops;
--
2.17.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name
2021-07-04 2:40 ` [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name Shawn Guo
@ 2021-07-10 5:17 ` Bjorn Andersson
2021-07-10 7:34 ` Shawn Guo
2021-08-06 1:53 ` Stephen Boyd
1 sibling, 1 reply; 15+ messages in thread
From: Bjorn Andersson @ 2021-07-10 5:17 UTC (permalink / raw)
To: Shawn Guo
Cc: Stephen Boyd, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk
On Sat 03 Jul 21:40 CDT 2021, Shawn Guo wrote:
> Different from MSM8916 which has only one a53pll/mux clock, MSM8939 gets
> three for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache
> Coherent Interconnect). That said, a53pll/mux clock needs to be named
> uniquely. Append @unit-address of device node to the clock name, so
> that a53pll/mux will be named like below on MSM8939.
>
> a53pll@b016000
> a53pll@b116000
> a53pll@b1d0000
>
> a53mux@b1d1000
> a53mux@b011000
> a53mux@b111000
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> drivers/clk/qcom/a53-pll.c | 8 +++++++-
> drivers/clk/qcom/apcs-msm8916.c | 8 +++++++-
> 2 files changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
> index d6756bd777ce..96a118be912d 100644
> --- a/drivers/clk/qcom/a53-pll.c
> +++ b/drivers/clk/qcom/a53-pll.c
> @@ -37,6 +37,7 @@ static const struct regmap_config a53pll_regmap_config = {
> static int qcom_a53pll_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> struct regmap *regmap;
> struct resource *res;
> struct clk_pll *pll;
> @@ -66,7 +67,12 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
> pll->status_bit = 16;
> pll->freq_tbl = a53pll_freq;
>
> - init.name = "a53pll";
> + /* Use an unique name by appending @unit-address */
> + init.name = devm_kasprintf(dev, GFP_KERNEL, "a53pll%s",
> + strchrnul(np->full_name, '@'));
While the result is nice, this isn't...
Is your dev_name() reasonable? What about "%s:a53pll", dev_name(dev) ?
Regards,
Bjorn
> + if (!init.name)
> + return -ENOMEM;
> +
> init.parent_names = (const char *[]){ "xo" };
> init.num_parents = 1;
> init.ops = &clk_pll_sr2_ops;
> diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
> index d7ac6d6b15b6..89e0730810ac 100644
> --- a/drivers/clk/qcom/apcs-msm8916.c
> +++ b/drivers/clk/qcom/apcs-msm8916.c
> @@ -46,6 +46,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> struct device *parent = dev->parent;
> + struct device_node *np = parent->of_node;
> struct clk_regmap_mux_div *a53cc;
> struct regmap *regmap;
> struct clk_init_data init = { };
> @@ -61,7 +62,12 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
> if (!a53cc)
> return -ENOMEM;
>
> - init.name = "a53mux";
> + /* Use an unique name by appending parent's @unit-address */
> + init.name = devm_kasprintf(dev, GFP_KERNEL, "a53mux%s",
> + strchrnul(np->full_name, '@'));
> + if (!init.name)
> + return -ENOMEM;
> +
> init.parent_data = pdata;
> init.num_parents = ARRAY_SIZE(pdata);
> init.ops = &clk_regmap_mux_div_ops;
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name
2021-07-10 5:17 ` Bjorn Andersson
@ 2021-07-10 7:34 ` Shawn Guo
0 siblings, 0 replies; 15+ messages in thread
From: Shawn Guo @ 2021-07-10 7:34 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Stephen Boyd, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk
On Sat, Jul 10, 2021 at 12:17:33AM -0500, Bjorn Andersson wrote:
> On Sat 03 Jul 21:40 CDT 2021, Shawn Guo wrote:
>
> > Different from MSM8916 which has only one a53pll/mux clock, MSM8939 gets
> > three for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache
> > Coherent Interconnect). That said, a53pll/mux clock needs to be named
> > uniquely. Append @unit-address of device node to the clock name, so
> > that a53pll/mux will be named like below on MSM8939.
> >
> > a53pll@b016000
> > a53pll@b116000
> > a53pll@b1d0000
> >
> > a53mux@b1d1000
> > a53mux@b011000
> > a53mux@b111000
> >
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
> > drivers/clk/qcom/a53-pll.c | 8 +++++++-
> > drivers/clk/qcom/apcs-msm8916.c | 8 +++++++-
> > 2 files changed, 14 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
> > index d6756bd777ce..96a118be912d 100644
> > --- a/drivers/clk/qcom/a53-pll.c
> > +++ b/drivers/clk/qcom/a53-pll.c
> > @@ -37,6 +37,7 @@ static const struct regmap_config a53pll_regmap_config = {
> > static int qcom_a53pll_probe(struct platform_device *pdev)
> > {
> > struct device *dev = &pdev->dev;
> > + struct device_node *np = dev->of_node;
> > struct regmap *regmap;
> > struct resource *res;
> > struct clk_pll *pll;
> > @@ -66,7 +67,12 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
> > pll->status_bit = 16;
> > pll->freq_tbl = a53pll_freq;
> >
> > - init.name = "a53pll";
> > + /* Use an unique name by appending @unit-address */
> > + init.name = devm_kasprintf(dev, GFP_KERNEL, "a53pll%s",
> > + strchrnul(np->full_name, '@'));
>
> While the result is nice, this isn't...
>
> Is your dev_name() reasonable? What about "%s:a53pll", dev_name(dev) ?
dev_name() is somehow reasonable for a53pll.
b016000.clock-controller:a53pll
b116000.clock-controller:a53pll
b1d0000.clock-controller:a53pll
But I prefer to the existing names, because I would like to use the same
naming schema for both a53pll and a53mux. If using dev_name() on a53mux,
we will get the following which is less reasonable.
qcom-apcs-msm8916-clk.1.auto:a53mux
qcom-apcs-msm8916-clk.2.auto:a53mux
qcom-apcs-msm8916-clk.3.auto:a53mux
Shawn
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name
2021-07-04 2:40 ` [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name Shawn Guo
2021-07-10 5:17 ` Bjorn Andersson
@ 2021-08-06 1:53 ` Stephen Boyd
1 sibling, 0 replies; 15+ messages in thread
From: Stephen Boyd @ 2021-08-06 1:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk, Shawn Guo
Quoting Shawn Guo (2021-07-03 19:40:30)
> Different from MSM8916 which has only one a53pll/mux clock, MSM8939 gets
> three for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache
> Coherent Interconnect). That said, a53pll/mux clock needs to be named
> uniquely. Append @unit-address of device node to the clock name, so
> that a53pll/mux will be named like below on MSM8939.
>
> a53pll@b016000
> a53pll@b116000
> a53pll@b1d0000
>
> a53mux@b1d1000
> a53mux@b011000
> a53mux@b111000
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
Applied to clk-next
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 3/4] dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
2021-07-04 2:40 [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Shawn Guo
2021-07-04 2:40 ` [PATCH v2 1/4] clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical Shawn Guo
2021-07-04 2:40 ` [PATCH v2 2/4] clk: qcom: a53pll/mux: Use unique clock name Shawn Guo
@ 2021-07-04 2:40 ` Shawn Guo
2021-07-12 14:58 ` Rob Herring
2021-08-06 1:53 ` Stephen Boyd
2021-07-04 2:40 ` [PATCH v2 4/4] clk: qcom: a53-pll: Add MSM8939 a53pll support Shawn Guo
` (2 subsequent siblings)
5 siblings, 2 replies; 15+ messages in thread
From: Shawn Guo @ 2021-07-04 2:40 UTC (permalink / raw)
To: Stephen Boyd
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk, Shawn Guo
Update qcom,a53pll bindings for MSM8939 support:
- Add optional operating-points-v2 property
- Add MSM8939 specific compatible
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
Documentation/devicetree/bindings/clock/qcom,a53pll.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
index db3d0ea6bc7a..fbd758470b88 100644
--- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
@@ -18,6 +18,7 @@ properties:
enum:
- qcom,ipq6018-a53pll
- qcom,msm8916-a53pll
+ - qcom,msm8939-a53pll
reg:
maxItems: 1
@@ -33,6 +34,8 @@ properties:
items:
- const: xo
+ operating-points-v2: true
+
required:
- compatible
- reg
--
2.17.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
2021-07-04 2:40 ` [PATCH v2 3/4] dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support Shawn Guo
@ 2021-07-12 14:58 ` Rob Herring
2021-08-06 1:53 ` Stephen Boyd
1 sibling, 0 replies; 15+ messages in thread
From: Rob Herring @ 2021-07-12 14:58 UTC (permalink / raw)
To: Shawn Guo
Cc: Stephen Boyd, linux-arm-msm, Benjamin Li, linux-clk,
Sivaprakash Murugesan, Rob Herring, devicetree, Bjorn Andersson
On Sun, 04 Jul 2021 10:40:31 +0800, Shawn Guo wrote:
> Update qcom,a53pll bindings for MSM8939 support:
>
> - Add optional operating-points-v2 property
> - Add MSM8939 specific compatible
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> Documentation/devicetree/bindings/clock/qcom,a53pll.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
2021-07-04 2:40 ` [PATCH v2 3/4] dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support Shawn Guo
2021-07-12 14:58 ` Rob Herring
@ 2021-08-06 1:53 ` Stephen Boyd
1 sibling, 0 replies; 15+ messages in thread
From: Stephen Boyd @ 2021-08-06 1:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk, Shawn Guo
Quoting Shawn Guo (2021-07-03 19:40:31)
> Update qcom,a53pll bindings for MSM8939 support:
>
> - Add optional operating-points-v2 property
> - Add MSM8939 specific compatible
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
Applied to clk-next
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 4/4] clk: qcom: a53-pll: Add MSM8939 a53pll support
2021-07-04 2:40 [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Shawn Guo
` (2 preceding siblings ...)
2021-07-04 2:40 ` [PATCH v2 3/4] dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support Shawn Guo
@ 2021-07-04 2:40 ` Shawn Guo
2021-08-06 1:53 ` Stephen Boyd
2021-07-07 21:34 ` [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Vincent Knecht
2021-08-04 8:47 ` Shawn Guo
5 siblings, 1 reply; 15+ messages in thread
From: Shawn Guo @ 2021-07-04 2:40 UTC (permalink / raw)
To: Stephen Boyd
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk, Shawn Guo
MSM8939 has 3 a53pll clocks with different frequency table for Cluster0,
Cluster1 and CCI. It adds function qcom_a53pll_get_freq_tbl() to create
pll_freq_tbl from OPP, so that those a53pll frequencies can be defined
in DT with operating-points-v2 bindings rather than being coded in the
driver. In this case, one compatible rather than three would be needed
for these 3 a53pll clocks.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/clk/qcom/a53-pll.c | 59 +++++++++++++++++++++++++++++++++++++-
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
index 96a118be912d..9e6decb9c26f 100644
--- a/drivers/clk/qcom/a53-pll.c
+++ b/drivers/clk/qcom/a53-pll.c
@@ -6,9 +6,11 @@
* Author: Georgi Djakov <georgi.djakov@linaro.org>
*/
+#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/pm_opp.h>
#include <linux/regmap.h>
#include <linux/module.h>
@@ -34,6 +36,55 @@ static const struct regmap_config a53pll_regmap_config = {
.fast_io = true,
};
+static struct pll_freq_tbl *qcom_a53pll_get_freq_tbl(struct device *dev)
+{
+ struct pll_freq_tbl *freq_tbl;
+ unsigned long xo_freq;
+ unsigned long freq;
+ struct clk *xo_clk;
+ int count;
+ int ret;
+ int i;
+
+ xo_clk = devm_clk_get(dev, "xo");
+ if (IS_ERR(xo_clk))
+ return NULL;
+
+ xo_freq = clk_get_rate(xo_clk);
+
+ ret = devm_pm_opp_of_add_table(dev);
+ if (ret)
+ return NULL;
+
+ count = dev_pm_opp_get_opp_count(dev);
+ if (count <= 0)
+ return NULL;
+
+ freq_tbl = devm_kcalloc(dev, count + 1, sizeof(*freq_tbl), GFP_KERNEL);
+ if (!freq_tbl)
+ return NULL;
+
+ for (i = 0, freq = 0; i < count; i++, freq++) {
+ struct dev_pm_opp *opp;
+
+ opp = dev_pm_opp_find_freq_ceil(dev, &freq);
+ if (IS_ERR(opp))
+ return NULL;
+
+ /* Skip the freq that is not divisible */
+ if (freq % xo_freq)
+ continue;
+
+ freq_tbl[i].freq = freq;
+ freq_tbl[i].l = freq / xo_freq;
+ freq_tbl[i].n = 1;
+
+ dev_pm_opp_put(opp);
+ }
+
+ return freq_tbl;
+}
+
static int qcom_a53pll_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -65,7 +116,12 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
pll->mode_reg = 0x00;
pll->status_reg = 0x1c;
pll->status_bit = 16;
- pll->freq_tbl = a53pll_freq;
+
+ pll->freq_tbl = qcom_a53pll_get_freq_tbl(dev);
+ if (!pll->freq_tbl) {
+ /* Fall on a53pll_freq if no freq_tbl is found from OPP */
+ pll->freq_tbl = a53pll_freq;
+ }
/* Use an unique name by appending @unit-address */
init.name = devm_kasprintf(dev, GFP_KERNEL, "a53pll%s",
@@ -96,6 +152,7 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
static const struct of_device_id qcom_a53pll_match_table[] = {
{ .compatible = "qcom,msm8916-a53pll" },
+ { .compatible = "qcom,msm8939-a53pll" },
{ }
};
MODULE_DEVICE_TABLE(of, qcom_a53pll_match_table);
--
2.17.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 4/4] clk: qcom: a53-pll: Add MSM8939 a53pll support
2021-07-04 2:40 ` [PATCH v2 4/4] clk: qcom: a53-pll: Add MSM8939 a53pll support Shawn Guo
@ 2021-08-06 1:53 ` Stephen Boyd
0 siblings, 0 replies; 15+ messages in thread
From: Stephen Boyd @ 2021-08-06 1:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk, Shawn Guo
Quoting Shawn Guo (2021-07-03 19:40:32)
> MSM8939 has 3 a53pll clocks with different frequency table for Cluster0,
> Cluster1 and CCI. It adds function qcom_a53pll_get_freq_tbl() to create
> pll_freq_tbl from OPP, so that those a53pll frequencies can be defined
> in DT with operating-points-v2 bindings rather than being coded in the
> driver. In this case, one compatible rather than three would be needed
> for these 3 a53pll clocks.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
Applied to clk-next
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support
2021-07-04 2:40 [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Shawn Guo
` (3 preceding siblings ...)
2021-07-04 2:40 ` [PATCH v2 4/4] clk: qcom: a53-pll: Add MSM8939 a53pll support Shawn Guo
@ 2021-07-07 21:34 ` Vincent Knecht
2021-07-09 2:13 ` Shawn Guo
2021-08-04 8:47 ` Shawn Guo
5 siblings, 1 reply; 15+ messages in thread
From: Vincent Knecht @ 2021-07-07 21:34 UTC (permalink / raw)
To: Shawn Guo, Stephen Boyd
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk
Le dimanche 04 juillet 2021 à 10:40 +0800, Shawn Guo a écrit :
> This series adds MSM8939 APCS/A53PLL clock support. Most outstanding
> thing about MSM8939 is that it integrates 3 APCS instances, for Cluster0
> (little cores), Cluster1 (big cores) and CCI (Cache Coherent Interconnect)
> respectively.
>
> Changes for v2:
> - Reword the commit log of first patch as suggested by Stephen.
> - Drop 'clock-output-names' bindings and use @unit-address to get unique
> a53pll/mux clock names.
> - Use 'operating-points-v2' bindings to pass frequency table via OPP, so
> that we can use one single compatible for all 3 MSM8939 a53pll.
>
> Shawn Guo (4):
> clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical
> clk: qcom: a53pll/mux: Use unique clock name
> dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
> clk: qcom: a53-pll: Add MSM8939 a53pll support
>
> .../bindings/clock/qcom,a53pll.yaml | 3 +
> drivers/clk/qcom/a53-pll.c | 68 ++++++++++++++++++-
> drivers/clk/qcom/apcs-msm8916.c | 10 ++-
> 3 files changed, 76 insertions(+), 5 deletions(-)
Hello,
would you have a msm8939 dtsi/dts reference file working with all recent
contributions for this SoC ?
We the msm8939-focused PostmarketOS gang would be happy to boot our devices
and test patches but we're not able to boot anything more recent that 5.9...
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support
2021-07-07 21:34 ` [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Vincent Knecht
@ 2021-07-09 2:13 ` Shawn Guo
0 siblings, 0 replies; 15+ messages in thread
From: Shawn Guo @ 2021-07-09 2:13 UTC (permalink / raw)
To: Vincent Knecht
Cc: Stephen Boyd, Bjorn Andersson, Rob Herring,
Sivaprakash Murugesan, Benjamin Li, devicetree, linux-arm-msm,
linux-clk
On Wed, Jul 07, 2021 at 11:34:19PM +0200, Vincent Knecht wrote:
> Le dimanche 04 juillet 2021 à 10:40 +0800, Shawn Guo a écrit :
> > This series adds MSM8939 APCS/A53PLL clock support. Most outstanding
> > thing about MSM8939 is that it integrates 3 APCS instances, for Cluster0
> > (little cores), Cluster1 (big cores) and CCI (Cache Coherent Interconnect)
> > respectively.
> >
> > Changes for v2:
> > - Reword the commit log of first patch as suggested by Stephen.
> > - Drop 'clock-output-names' bindings and use @unit-address to get unique
> > a53pll/mux clock names.
> > - Use 'operating-points-v2' bindings to pass frequency table via OPP, so
> > that we can use one single compatible for all 3 MSM8939 a53pll.
> >
> > Shawn Guo (4):
> > clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical
> > clk: qcom: a53pll/mux: Use unique clock name
> > dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
> > clk: qcom: a53-pll: Add MSM8939 a53pll support
> >
> > .../bindings/clock/qcom,a53pll.yaml | 3 +
> > drivers/clk/qcom/a53-pll.c | 68 ++++++++++++++++++-
> > drivers/clk/qcom/apcs-msm8916.c | 10 ++-
> > 3 files changed, 76 insertions(+), 5 deletions(-)
>
> Hello,
>
> would you have a msm8939 dtsi/dts reference file working with all recent
> contributions for this SoC ?
Yes, the dts will be posted once it's ready for public review.
Shawn
> We the msm8939-focused PostmarketOS gang would be happy to boot our devices
> and test patches but we're not able to boot anything more recent that 5.9...
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support
2021-07-04 2:40 [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Shawn Guo
` (4 preceding siblings ...)
2021-07-07 21:34 ` [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Vincent Knecht
@ 2021-08-04 8:47 ` Shawn Guo
5 siblings, 0 replies; 15+ messages in thread
From: Shawn Guo @ 2021-08-04 8:47 UTC (permalink / raw)
To: Stephen Boyd
Cc: Bjorn Andersson, Rob Herring, Sivaprakash Murugesan, Benjamin Li,
devicetree, linux-arm-msm, linux-clk
On Sun, Jul 04, 2021 at 10:40:28AM +0800, Shawn Guo wrote:
> This series adds MSM8939 APCS/A53PLL clock support. Most outstanding
> thing about MSM8939 is that it integrates 3 APCS instances, for Cluster0
> (little cores), Cluster1 (big cores) and CCI (Cache Coherent Interconnect)
> respectively.
>
> Changes for v2:
> - Reword the commit log of first patch as suggested by Stephen.
> - Drop 'clock-output-names' bindings and use @unit-address to get unique
> a53pll/mux clock names.
> - Use 'operating-points-v2' bindings to pass frequency table via OPP, so
> that we can use one single compatible for all 3 MSM8939 a53pll.
Hi Stephen,
Any comments on this version?
Shawn
^ permalink raw reply [flat|nested] 15+ messages in thread