devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: <conor.dooley@microchip.com>
To: <linus.walleij@linaro.org>, <bgolaszewski@baylibre.com>,
	<robh+dt@kernel.org>, <jassisinghbrar@gmail.com>,
	<paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	<aou@eecs.berkeley.edu>, <a.zummo@towertech.it>,
	<alexandre.belloni@bootlin.com>, <broonie@kernel.org>,
	<gregkh@linuxfoundation.org>, <lewis.hanly@microchip.com>,
	<conor.dooley@microchip.com>, <daire.mcnamara@microchip.com>,
	<atish.patra@wdc.com>, <ivan.griffin@microchip.com>,
	<linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-crypto@vger.kernel.org>,
	<linux-rtc@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<linux-usb@vger.kernel.org>
Cc: <krzysztof.kozlowski@canonical.com>, <geert@linux-m68k.org>,
	<bin.meng@windriver.com>
Subject: [PATCH 01/13] dt-bindings: interrupt-controller: create a header for RISC-V interrupts
Date: Mon, 8 Nov 2021 15:05:42 +0000	[thread overview]
Message-ID: <20211108150554.4457-2-conor.dooley@microchip.com> (raw)
In-Reply-To: <20211108150554.4457-1-conor.dooley@microchip.com>

From: Ivan Griffin <ivan.griffin@microchip.com>

Provide named identifiers for device tree for RISC-V interrupts.

Licensed under GPL and MIT, as this file may be useful to any OS that
uses device tree.

Signed-off-by: Ivan Griffin <ivan.griffin@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../interrupt-controller/riscv-hart.h         | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 include/dt-bindings/interrupt-controller/riscv-hart.h

diff --git a/include/dt-bindings/interrupt-controller/riscv-hart.h b/include/dt-bindings/interrupt-controller/riscv-hart.h
new file mode 100644
index 000000000000..e1c32f6090ac
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/riscv-hart.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (C) 2021 Microchip Technology Inc.  All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H
+
+#define HART_INT_U_SOFT   0
+#define HART_INT_S_SOFT   1
+#define HART_INT_M_SOFT   3
+#define HART_INT_U_TIMER  4
+#define HART_INT_S_TIMER  5
+#define HART_INT_M_TIMER  7
+#define HART_INT_U_EXT    8
+#define HART_INT_S_EXT    9
+#define HART_INT_M_EXT    11
+
+#endif /* _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H */
-- 
2.33.1


  reply	other threads:[~2021-11-08 15:06 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-08 15:05 [PATCH 00/13]Update the icicle kit device tree conor.dooley
2021-11-08 15:05 ` conor.dooley [this message]
2021-11-23 11:07   ` [PATCH 01/13] dt-bindings: interrupt-controller: create a header for RISC-V interrupts Heiko Stübner
2021-11-23 11:35     ` Anup Patel
2021-11-29 19:57   ` Rob Herring
2021-11-08 15:05 ` [PATCH 02/13] dt-bindings: interrupt-controller: add defines for mpfs-plic conor.dooley
2021-11-23 11:17   ` Heiko Stübner
2021-11-29 19:56   ` Rob Herring
2021-11-30  8:15     ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 03/13] dt-bindings: soc/microchip: update sys ctrlr compat string conor.dooley
2021-11-08 21:09   ` Krzysztof Kozlowski
2021-11-09  8:33   ` Geert Uytterhoeven
2021-11-09 15:20     ` Conor.Dooley
2021-11-29 20:03   ` Rob Herring
2021-11-30  8:35     ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 04/13] dt-bindings: riscv: update microchip polarfire binds conor.dooley
2021-11-08 21:10   ` Krzysztof Kozlowski
2021-11-09  8:34   ` Geert Uytterhoeven
2021-11-09 12:08     ` Conor.Dooley
2021-11-09 13:04       ` Geert Uytterhoeven
2021-11-23 11:24         ` Heiko Stübner
2021-11-08 15:05 ` [PATCH 05/13] dt-bindings: i2c: add bindings for microchip mpfs i2c conor.dooley
2021-11-08 21:13   ` Krzysztof Kozlowski
2021-11-09  4:06   ` Rob Herring
2021-11-08 15:05 ` [PATCH 06/13] dt-bindings: rng: add bindings for microchip mpfs rng conor.dooley
2021-11-08 21:16   ` Krzysztof Kozlowski
2021-11-09 12:54     ` Conor.Dooley
2021-11-09 12:56       ` Krzysztof Kozlowski
2021-11-09 13:36         ` Conor.Dooley
2021-11-10  7:43           ` Krzysztof Kozlowski
2021-11-10  9:46             ` Conor.Dooley
2021-11-29 20:08               ` Rob Herring
2021-11-09  8:37   ` Geert Uytterhoeven
2021-11-09 11:55     ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 07/13] dt-bindings: rtc: add bindings for microchip mpfs rtc conor.dooley
2021-11-08 21:20   ` Krzysztof Kozlowski
2021-11-09  4:06   ` Rob Herring
2021-11-09  8:39   ` Geert Uytterhoeven
2021-11-08 15:05 ` [PATCH 08/13] dt-bindings: soc/microchip: add bindings for mpfs system services conor.dooley
2021-11-08 21:20   ` Krzysztof Kozlowski
2021-11-08 15:05 ` [PATCH 09/13] dt-bindings: gpio: add bindings for microchip mpfs gpio conor.dooley
2021-11-08 21:22   ` Krzysztof Kozlowski
2021-11-09  4:06   ` Rob Herring
2021-11-09  8:43   ` Geert Uytterhoeven
2021-11-08 15:05 ` [PATCH 10/13] dt-bindings: spi: add bindings for microchip mpfs spi conor.dooley
2021-11-08 21:24   ` Krzysztof Kozlowski
2021-11-09  4:06   ` Rob Herring
2021-11-09 12:16     ` Conor.Dooley
2021-11-09 12:53       ` Krzysztof Kozlowski
2021-11-09 12:58         ` Conor.Dooley
2021-11-09 13:04           ` Krzysztof Kozlowski
2021-11-09 13:20             ` Conor.Dooley
2021-11-10  7:45               ` Krzysztof Kozlowski
2021-11-09  8:45   ` Geert Uytterhoeven
2021-11-09 10:56     ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 11/13] dt-bindings: usb: add bindings for microchip mpfs musb conor.dooley
2021-11-08 21:27   ` Krzysztof Kozlowski
2021-11-09  4:06   ` Rob Herring
2021-11-09  8:48   ` Geert Uytterhoeven
2021-11-08 15:05 ` [PATCH 12/13] riscv: icicle-kit: update microchip icicle kit device tree conor.dooley
2021-11-08 21:40   ` Krzysztof Kozlowski
2021-11-10 12:07     ` Conor.Dooley
2021-11-09  9:04   ` Geert Uytterhoeven
2021-11-10 14:19     ` Conor.Dooley
2021-11-10 14:58       ` Geert Uytterhoeven
2021-11-10 15:07         ` Conor.Dooley
2021-11-15 15:39         ` Conor.Dooley
2021-11-15 16:17           ` Geert Uytterhoeven
2021-11-17 12:17             ` Daire.McNamara
2021-11-08 15:05 ` [PATCH 13/13] MAINTAINERS: update riscv/microchip entry conor.dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211108150554.4457-2-conor.dooley@microchip.com \
    --to=conor.dooley@microchip.com \
    --cc=a.zummo@towertech.it \
    --cc=alexandre.belloni@bootlin.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=atish.patra@wdc.com \
    --cc=bgolaszewski@baylibre.com \
    --cc=bin.meng@windriver.com \
    --cc=broonie@kernel.org \
    --cc=daire.mcnamara@microchip.com \
    --cc=devicetree@vger.kernel.org \
    --cc=geert@linux-m68k.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=ivan.griffin@microchip.com \
    --cc=jassisinghbrar@gmail.com \
    --cc=krzysztof.kozlowski@canonical.com \
    --cc=lewis.hanly@microchip.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-i2c@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=linux-rtc@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=linux-usb@vger.kernel.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).