From: Anup Patel <anup@brainfault.org>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: Linus Walleij <linus.walleij@linaro.org>,
bgolaszewski@baylibre.com, Rob Herring <robh+dt@kernel.org>,
jassisinghbrar@gmail.com,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
a.zummo@towertech.it, alexandre.belloni@bootlin.com,
broonie@kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
lewis.hanly@microchip.com, conor.dooley@microchip.com,
Daire McNamara <daire.mcnamara@microchip.com>,
Atish Patra <atish.patra@wdc.com>,
ivan.griffin@microchip.com, linux-gpio@vger.kernel.org,
DTML <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
linux-i2c@vger.kernel.org,
linux-riscv <linux-riscv@lists.infradead.org>,
linux-crypto@vger.kernel.org, linux-rtc@vger.kernel.org,
linux-spi@vger.kernel.org, linux-usb@vger.kernel.org,
krzysztof.kozlowski@canonical.com,
Geert Uytterhoeven <geert@linux-m68k.org>,
Bin Meng <bin.meng@windriver.com>
Subject: Re: [PATCH 01/13] dt-bindings: interrupt-controller: create a header for RISC-V interrupts
Date: Tue, 23 Nov 2021 17:05:38 +0530 [thread overview]
Message-ID: <CAAhSdy2yr+a7=7Crk7s3pAVbVcYjTdOtRfAaQXBkTVsUpfG20g@mail.gmail.com> (raw)
In-Reply-To: <272946671.hFph3VMliC@diego>
On Tue, Nov 23, 2021 at 4:38 PM Heiko Stübner <heiko@sntech.de> wrote:
>
> Am Montag, 8. November 2021, 16:05:42 CET schrieb conor.dooley@microchip.com:
> > From: Ivan Griffin <ivan.griffin@microchip.com>
> >
> > Provide named identifiers for device tree for RISC-V interrupts.
> >
> > Licensed under GPL and MIT, as this file may be useful to any OS that
> > uses device tree.
> >
> > Signed-off-by: Ivan Griffin <ivan.griffin@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > .../interrupt-controller/riscv-hart.h | 19 +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> > create mode 100644 include/dt-bindings/interrupt-controller/riscv-hart.h
> >
> > diff --git a/include/dt-bindings/interrupt-controller/riscv-hart.h b/include/dt-bindings/interrupt-controller/riscv-hart.h
> > new file mode 100644
> > index 000000000000..e1c32f6090ac
> > --- /dev/null
> > +++ b/include/dt-bindings/interrupt-controller/riscv-hart.h
> > @@ -0,0 +1,19 @@
> > +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> > +/*
> > + * Copyright (C) 2021 Microchip Technology Inc. All rights reserved.
> > + */
> > +
> > +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H
> > +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H
> > +
> > +#define HART_INT_U_SOFT 0
> > +#define HART_INT_S_SOFT 1
> > +#define HART_INT_M_SOFT 3
> > +#define HART_INT_U_TIMER 4
> > +#define HART_INT_S_TIMER 5
> > +#define HART_INT_M_TIMER 7
> > +#define HART_INT_U_EXT 8
> > +#define HART_INT_S_EXT 9
> > +#define HART_INT_M_EXT 11
>
> (1) From checking clic doc [0] I see an additional
> 12 CLIC software interrupt
> defined.
Local IRQ #12 is for S-mode guest external interrupts as-per
the ratified H-extension specification.
I guess CLIC spec needs to be updated.
Regards,
Anup
>
> (2) The doc states that the ordering is a recommendation and
> "not mandatory in all incarnations of the CLIC"
> Is that clarified somewhere else that this more than recommended?
>
> Thanks
> Heiko
>
>
> [0] https://github.com/riscv/riscv-fast-interrupt/blob/master/clic.adoc
>
> > +
> > +#endif /* _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H */
> >
>
>
>
>
next prev parent reply other threads:[~2021-11-23 11:35 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-08 15:05 [PATCH 00/13]Update the icicle kit device tree conor.dooley
2021-11-08 15:05 ` [PATCH 01/13] dt-bindings: interrupt-controller: create a header for RISC-V interrupts conor.dooley
2021-11-23 11:07 ` Heiko Stübner
2021-11-23 11:35 ` Anup Patel [this message]
2021-11-29 19:57 ` Rob Herring
2021-11-08 15:05 ` [PATCH 02/13] dt-bindings: interrupt-controller: add defines for mpfs-plic conor.dooley
2021-11-23 11:17 ` Heiko Stübner
2021-11-29 19:56 ` Rob Herring
2021-11-30 8:15 ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 03/13] dt-bindings: soc/microchip: update sys ctrlr compat string conor.dooley
2021-11-08 21:09 ` Krzysztof Kozlowski
2021-11-09 8:33 ` Geert Uytterhoeven
2021-11-09 15:20 ` Conor.Dooley
2021-11-29 20:03 ` Rob Herring
2021-11-30 8:35 ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 04/13] dt-bindings: riscv: update microchip polarfire binds conor.dooley
2021-11-08 21:10 ` Krzysztof Kozlowski
2021-11-09 8:34 ` Geert Uytterhoeven
2021-11-09 12:08 ` Conor.Dooley
2021-11-09 13:04 ` Geert Uytterhoeven
2021-11-23 11:24 ` Heiko Stübner
2021-11-08 15:05 ` [PATCH 05/13] dt-bindings: i2c: add bindings for microchip mpfs i2c conor.dooley
2021-11-08 21:13 ` Krzysztof Kozlowski
2021-11-09 4:06 ` Rob Herring
2021-11-08 15:05 ` [PATCH 06/13] dt-bindings: rng: add bindings for microchip mpfs rng conor.dooley
2021-11-08 21:16 ` Krzysztof Kozlowski
2021-11-09 12:54 ` Conor.Dooley
2021-11-09 12:56 ` Krzysztof Kozlowski
2021-11-09 13:36 ` Conor.Dooley
2021-11-10 7:43 ` Krzysztof Kozlowski
2021-11-10 9:46 ` Conor.Dooley
2021-11-29 20:08 ` Rob Herring
2021-11-09 8:37 ` Geert Uytterhoeven
2021-11-09 11:55 ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 07/13] dt-bindings: rtc: add bindings for microchip mpfs rtc conor.dooley
2021-11-08 21:20 ` Krzysztof Kozlowski
2021-11-09 4:06 ` Rob Herring
2021-11-09 8:39 ` Geert Uytterhoeven
2021-11-08 15:05 ` [PATCH 08/13] dt-bindings: soc/microchip: add bindings for mpfs system services conor.dooley
2021-11-08 21:20 ` Krzysztof Kozlowski
2021-11-08 15:05 ` [PATCH 09/13] dt-bindings: gpio: add bindings for microchip mpfs gpio conor.dooley
2021-11-08 21:22 ` Krzysztof Kozlowski
2021-11-09 4:06 ` Rob Herring
2021-11-09 8:43 ` Geert Uytterhoeven
2021-11-08 15:05 ` [PATCH 10/13] dt-bindings: spi: add bindings for microchip mpfs spi conor.dooley
2021-11-08 21:24 ` Krzysztof Kozlowski
2021-11-09 4:06 ` Rob Herring
2021-11-09 12:16 ` Conor.Dooley
2021-11-09 12:53 ` Krzysztof Kozlowski
2021-11-09 12:58 ` Conor.Dooley
2021-11-09 13:04 ` Krzysztof Kozlowski
2021-11-09 13:20 ` Conor.Dooley
2021-11-10 7:45 ` Krzysztof Kozlowski
2021-11-09 8:45 ` Geert Uytterhoeven
2021-11-09 10:56 ` Conor.Dooley
2021-11-08 15:05 ` [PATCH 11/13] dt-bindings: usb: add bindings for microchip mpfs musb conor.dooley
2021-11-08 21:27 ` Krzysztof Kozlowski
2021-11-09 4:06 ` Rob Herring
2021-11-09 8:48 ` Geert Uytterhoeven
2021-11-08 15:05 ` [PATCH 12/13] riscv: icicle-kit: update microchip icicle kit device tree conor.dooley
2021-11-08 21:40 ` Krzysztof Kozlowski
2021-11-10 12:07 ` Conor.Dooley
2021-11-09 9:04 ` Geert Uytterhoeven
2021-11-10 14:19 ` Conor.Dooley
2021-11-10 14:58 ` Geert Uytterhoeven
2021-11-10 15:07 ` Conor.Dooley
2021-11-15 15:39 ` Conor.Dooley
2021-11-15 16:17 ` Geert Uytterhoeven
2021-11-17 12:17 ` Daire.McNamara
2021-11-08 15:05 ` [PATCH 13/13] MAINTAINERS: update riscv/microchip entry conor.dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAAhSdy2yr+a7=7Crk7s3pAVbVcYjTdOtRfAaQXBkTVsUpfG20g@mail.gmail.com' \
--to=anup@brainfault.org \
--cc=a.zummo@towertech.it \
--cc=alexandre.belloni@bootlin.com \
--cc=aou@eecs.berkeley.edu \
--cc=atish.patra@wdc.com \
--cc=bgolaszewski@baylibre.com \
--cc=bin.meng@windriver.com \
--cc=broonie@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=geert@linux-m68k.org \
--cc=gregkh@linuxfoundation.org \
--cc=heiko@sntech.de \
--cc=ivan.griffin@microchip.com \
--cc=jassisinghbrar@gmail.com \
--cc=krzysztof.kozlowski@canonical.com \
--cc=lewis.hanly@microchip.com \
--cc=linus.walleij@linaro.org \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-i2c@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-rtc@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).