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From: Roger Lu <roger.lu@mediatek.com>
To: AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Enric Balletbo Serra <eballetbo@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Nicolas Boichat <drinkcat@google.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: Fan Chen <fan.chen@mediatek.com>,
	HenryC Chen <HenryC.Chen@mediatek.com>,
	YT Lee <yt.lee@mediatek.com>,
	Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
	Charles Yang <Charles.Yang@mediatek.com>,
	Angus Lin <Angus.Lin@mediatek.com>,
	Mark Rutland <mark.rutland@arm.com>, Nishanth Menon <nm@ti.com>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Guenter Roeck <linux@roeck-us.net>
Subject: Re: [PATCH v21 5/8] soc: mediatek: SVS: add debug commands
Date: Mon, 24 Jan 2022 18:40:15 +0800	[thread overview]
Message-ID: <2404cea17479df35b5a5d55a923a96b10ebae909.camel@mediatek.com> (raw)
In-Reply-To: <47bcbffc-42f6-335e-dfab-990e0ab5f103@collabora.com>

Hi AngeloGioacchino,

Sorry for the late reply and thanks for the advice.

On Fri, 2022-01-07 at 15:34 +0100, AngeloGioacchino Del Regno wrote:
> Il 07/01/22 10:51, Roger Lu ha scritto:
> > The purpose of SVS is to help find the suitable voltages
> > for DVFS. Therefore, if SVS bank voltages are concerned
> > to be wrong, we can adjust SVS bank voltages by this patch.
> > 
> > Signed-off-by: Roger Lu <roger.lu@mediatek.com>
> > ---
> >   drivers/soc/mediatek/mtk-svs.c | 321 ++++++++++++++++++++++++++++++++-
> >   1 file changed, 318 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c
> > index 042c6e8e9069..93cdaecadd6d 100644
> > --- a/drivers/soc/mediatek/mtk-svs.c
> > +++ b/drivers/soc/mediatek/mtk-svs.c
> 
> ..snip..
> 
> > @@ -605,6 +896,16 @@ static void svs_set_bank_phase(struct svs_platform
> > *svsp,
> >   	}
> >   }
> >   
> > +static inline void svs_save_bank_register_data(struct svs_platform *svsp,
> > +					       enum svsb_phase phase)
> > +{
> > +	struct svs_bank *svsb = svsp->pbank;
> > +	enum svs_reg_index rg_i;
> > +
> 
> I think that it'd be a good idea to add an `enable` parameter, so that we
> don't always do a register dump; after all, this is a debugging feature and
> it's going to be completely irrelevant to the user, so keeping this disabled
> by default would ensure to get no performance degradation (even if small)
> unless really wanted.
> 
> So, in this case, here we'd have
> 
> 	if (!svsp->debug_enabled)
> 		return;

Thanks for pointing out the concern. Excuse us, we really need this to be
enabled by default. If we add a enable flag here, we'll face below problems and
make debug more difficult.

1. If we enable it afterward by cmd, init0[1~2] registers' data cannot be
recorded expectedly because the init flow has been finished already and won't be
run anymore. So, it doesn't work by using cmd to enable the flag.
2. If we add a enable flag here, it means we have to re-build the kernel load in
order to enable this flag. However, we cannot re-build the kernel load and needs
to debug directly sometimes. It's a sad situation... :(

> 
> > +	for (rg_i = DESCHAR; rg_i < SVS_REG_MAX; rg_i++)
> > +		svsb->reg_data[phase][rg_i] = svs_readl_relaxed(svsp, rg_i);
> > +}
> > +
> 
> Of course, this implies adding a new debugfs entry to enable/disable the
> debugging.
> Everything else looks good :)

Oh, excuse us, we have to keep the old design for better instant support and
thanks for the understanding.

> >   static inline void svs_error_isr_handler(struct svs_platform *svsp)
> >   {
> >   	struct svs_bank *svsb = svsp->pbank;
> > @@ -619,6 +920,8 @@ static inline void svs_error_isr_handler(struct
> > svs_platform *svsp)
> >   		svs_readl_relaxed(svsp, SMSTATE1));
> >   	dev_err(svsb->dev, "TEMP = 0x%08x\n", svs_readl_relaxed(svsp, TEMP));
> >   
> > +	svs_save_bank_register_data(svsp, SVSB_PHASE_ERROR);
> > +
> >   	svsb->mode_support = SVSB_MODE_ALL_DISABLE;
> >   	svsb->phase = SVSB_PHASE_ERROR;

[snip]



  reply	other threads:[~2022-01-24 10:40 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-07  9:51 [PATCH v21 0/8] soc: mediatek: SVS: introduce MTK SVS engine Roger Lu
2022-01-07  9:51 ` [PATCH v21 1/8] dt-bindings: soc: mediatek: add mtk svs dt-bindings Roger Lu
2022-01-07 19:01   ` Rob Herring
2022-01-07  9:51 ` [PATCH v21 2/8] arm64: dts: mt8183: add svs device information Roger Lu
2022-01-07 14:33   ` AngeloGioacchino Del Regno
2022-01-07  9:51 ` [PATCH v21 3/8] soc: mediatek: SVS: introduce MTK SVS engine Roger Lu
2022-01-07 14:33   ` AngeloGioacchino Del Regno
2022-01-24  6:39     ` Roger Lu
2022-01-07  9:51 ` [PATCH v21 4/8] soc: mediatek: SVS: add monitor mode Roger Lu
2022-01-07 14:34   ` AngeloGioacchino Del Regno
2022-01-24  7:28     ` Roger Lu
2022-01-07  9:51 ` [PATCH v21 5/8] soc: mediatek: SVS: add debug commands Roger Lu
2022-01-07 14:34   ` AngeloGioacchino Del Regno
2022-01-24 10:40     ` Roger Lu [this message]
2022-01-07  9:51 ` [PATCH v21 6/8] dt-bindings: soc: mediatek: add mt8192 svs dt-bindings Roger Lu
2022-01-12  1:48   ` Rob Herring
2022-01-07  9:51 ` [PATCH v21 7/8] arm64: dts: mt8192: add svs device information Roger Lu
2022-01-07 14:33   ` AngeloGioacchino Del Regno
2022-01-24 10:48     ` Roger Lu
2022-01-24 11:49       ` AngeloGioacchino Del Regno
2022-01-07  9:52 ` [PATCH v21 8/8] soc: mediatek: SVS: add mt8192 SVS GPU driver Roger Lu
2022-01-07 14:33   ` AngeloGioacchino Del Regno
2022-01-26  7:49     ` Roger Lu

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