From: <Conor.Dooley@microchip.com>
To: <conor@kernel.org>, <prabhakar.csengg@gmail.com>
Cc: <geert+renesas@glider.be>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<magnus.damm@gmail.com>, <heiko@sntech.de>, <guoren@kernel.org>,
<philipp.tomsich@vrull.eu>, <nathan@kernel.org>,
<atishp@rivosinc.com>, <apatel@ventanamicro.com>,
<linux-renesas-soc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<biju.das.jz@bp.renesas.com>,
<prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [RFC PATCH v2 2/2] soc: renesas: Add L2 cache management for RZ/Five SoC
Date: Wed, 5 Oct 2022 09:17:09 +0000 [thread overview]
Message-ID: <5254a42c-9233-6f9a-eff8-33324a184d20@microchip.com> (raw)
In-Reply-To: <F0B6C609-6C39-4080-8F07-7FEFFAFEA993@kernel.org>
On 05/10/2022 09:58, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 5 October 2022 09:44:56 IST, "Lad, Prabhakar" <prabhakar.csengg@gmail.com> wrote:
>> Hi Conor,
>>
>> Thank you for the review.
>>
>> On Tue, Oct 4, 2022 at 6:43 PM Conor Dooley <conor@kernel.org> wrote:
>
>>>> +static void cpu_dcache_wb_range(unsigned long start,
>>>> + unsigned long end,
>>>> + int line_size)
>>>> +{
>>>> + bool ucctl_ok = false;
>>>> + unsigned long pa;
>>>> + int mhartid = 0;
>>>> +#ifdef CONFIG_SMP
>>>> + mhartid = smp_processor_id();
>>>> +#endif
>>>
>>> Won't this produce complaints from your if you compile with CONFIG_SMP
>>> set?
>>>
>> No I dont see a build issue with SMP enabled, do you see any reason
>> why it should fail?
>
> Not fail but complain about the unused variable.
>
Not unused variable, sorry but the unused 0 that it was initialised with*
next prev parent reply other threads:[~2022-10-05 9:17 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-03 22:32 [RFC PATCH v2 0/2] AX45MP: Add support to non-coherent DMA Prabhakar
2022-10-03 22:32 ` [RFC PATCH v2 1/2] dt-bindings: soc: renesas: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller Prabhakar
2022-10-04 6:41 ` Geert Uytterhoeven
2022-10-04 7:26 ` Lad, Prabhakar
2022-10-04 7:31 ` Conor Dooley
2022-10-04 7:59 ` Lad, Prabhakar
2022-10-04 9:12 ` Geert Uytterhoeven
2022-10-04 9:31 ` Lad, Prabhakar
2022-10-04 7:33 ` Conor Dooley
2022-10-03 22:32 ` [RFC PATCH v2 2/2] soc: renesas: Add L2 cache management for RZ/Five SoC Prabhakar
2022-10-04 17:42 ` Conor Dooley
2022-10-05 8:44 ` Lad, Prabhakar
2022-10-05 8:58 ` Conor Dooley
2022-10-05 9:17 ` Conor.Dooley [this message]
2022-10-05 10:20 ` Lad, Prabhakar
2022-10-05 10:29 ` Conor Dooley
2022-10-05 9:57 ` Arnd Bergmann
2022-10-05 10:14 ` Lad, Prabhakar
2022-10-05 1:28 ` Guo Ren
2022-10-05 12:53 ` Lad, Prabhakar
2022-10-05 14:23 ` Guo Ren
2022-10-05 15:02 ` Lad, Prabhakar
2022-10-06 0:59 ` Guo Ren
2022-10-06 15:36 ` Lad, Prabhakar
2022-10-11 9:38 ` Lad, Prabhakar
2022-10-11 13:10 ` Guo Ren
2022-10-17 9:39 ` Lad, Prabhakar
2022-10-17 12:36 ` Guo Ren
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